592 vm_exit_during_initialization("Unknown x64 processor: SSE2 not supported"); 593 } 594 // in 64 bit the use of SSE2 is the minimum 595 if (UseSSE < 2) UseSSE = 2; 596 #endif 597 598 #ifdef AMD64 599 // flush_icache_stub have to be generated first. 600 // That is why Icache line size is hard coded in ICache class, 601 // see icache_x86.hpp. It is also the reason why we can't use 602 // clflush instruction in 32-bit VM since it could be running 603 // on CPU which does not support it. 604 // 605 // The only thing we can do is to verify that flushed 606 // ICache::line_size has correct value. 607 guarantee(_cpuid_info.std_cpuid1_edx.bits.clflush != 0, "clflush is not supported"); 608 // clflush_size is size in quadwords (8 bytes). 609 guarantee(_cpuid_info.std_cpuid1_ebx.bits.clflush_size == 8, "such clflush size is not supported"); 610 #endif 611 612 // If the OS doesn't support SSE, we can't use this feature even if the HW does 613 if (!os::supports_sse()) 614 _features &= ~(CPU_SSE|CPU_SSE2|CPU_SSE3|CPU_SSSE3|CPU_SSE4A|CPU_SSE4_1|CPU_SSE4_2); 615 616 if (UseSSE < 4) { 617 _features &= ~CPU_SSE4_1; 618 _features &= ~CPU_SSE4_2; 619 } 620 621 if (UseSSE < 3) { 622 _features &= ~CPU_SSE3; 623 _features &= ~CPU_SSSE3; 624 _features &= ~CPU_SSE4A; 625 } 626 627 if (UseSSE < 2) 628 _features &= ~CPU_SSE2; 629 630 if (UseSSE < 1) 631 _features &= ~CPU_SSE; | 592 vm_exit_during_initialization("Unknown x64 processor: SSE2 not supported"); 593 } 594 // in 64 bit the use of SSE2 is the minimum 595 if (UseSSE < 2) UseSSE = 2; 596 #endif 597 598 #ifdef AMD64 599 // flush_icache_stub have to be generated first. 600 // That is why Icache line size is hard coded in ICache class, 601 // see icache_x86.hpp. It is also the reason why we can't use 602 // clflush instruction in 32-bit VM since it could be running 603 // on CPU which does not support it. 604 // 605 // The only thing we can do is to verify that flushed 606 // ICache::line_size has correct value. 607 guarantee(_cpuid_info.std_cpuid1_edx.bits.clflush != 0, "clflush is not supported"); 608 // clflush_size is size in quadwords (8 bytes). 609 guarantee(_cpuid_info.std_cpuid1_ebx.bits.clflush_size == 8, "such clflush size is not supported"); 610 #endif 611 612 // publish data cache line flush size to generic field 613 _data_cache_line_flush_size = _cpuid_info.std_cpuid1_ebx.bits.clflush_size * 8; 614 615 // If the OS doesn't support SSE, we can't use this feature even if the HW does 616 if (!os::supports_sse()) 617 _features &= ~(CPU_SSE|CPU_SSE2|CPU_SSE3|CPU_SSSE3|CPU_SSE4A|CPU_SSE4_1|CPU_SSE4_2); 618 619 if (UseSSE < 4) { 620 _features &= ~CPU_SSE4_1; 621 _features &= ~CPU_SSE4_2; 622 } 623 624 if (UseSSE < 3) { 625 _features &= ~CPU_SSE3; 626 _features &= ~CPU_SSSE3; 627 _features &= ~CPU_SSE4A; 628 } 629 630 if (UseSSE < 2) 631 _features &= ~CPU_SSE2; 632 633 if (UseSSE < 1) 634 _features &= ~CPU_SSE; |