1 /*
   2  * Copyright (c) 1997, 2012, Oracle and/or its affiliates. All rights reserved.
   3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   4  *
   5  * This code is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 only, as
   7  * published by the Free Software Foundation.
   8  *
   9  * This code is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  *
  23  */
  24 
  25 #ifndef SHARE_VM_OPTO_CHAITIN_HPP
  26 #define SHARE_VM_OPTO_CHAITIN_HPP
  27 
  28 #include "code/vmreg.hpp"
  29 #include "libadt/port.hpp"
  30 #include "memory/resourceArea.hpp"
  31 #include "opto/connode.hpp"
  32 #include "opto/live.hpp"
  33 #include "opto/matcher.hpp"
  34 #include "opto/phase.hpp"
  35 #include "opto/regalloc.hpp"
  36 #include "opto/regmask.hpp"
  37 
  38 class LoopTree;
  39 class MachCallNode;
  40 class MachSafePointNode;
  41 class Matcher;
  42 class PhaseCFG;
  43 class PhaseLive;
  44 class PhaseRegAlloc;
  45 class   PhaseChaitin;
  46 
  47 #define OPTO_DEBUG_SPLIT_FREQ  BLOCK_FREQUENCY(0.001)
  48 #define OPTO_LRG_HIGH_FREQ     BLOCK_FREQUENCY(0.25)
  49 
  50 //------------------------------LRG--------------------------------------------
  51 // Live-RanGe structure.
  52 class LRG : public ResourceObj {
  53   friend class VMStructs;
  54 public:
  55   enum { SPILL_REG=29999 };     // Register number of a spilled LRG
  56 
  57   double _cost;                 // 2 for loads/1 for stores times block freq
  58   double _area;                 // Sum of all simultaneously live values
  59   double score() const;         // Compute score from cost and area
  60   double _maxfreq;              // Maximum frequency of any def or use
  61 
  62   Node *_def;                   // Check for multi-def live ranges
  63 #ifndef PRODUCT
  64   GrowableArray<Node*>* _defs;
  65 #endif
  66 
  67   uint _risk_bias;              // Index of LRG which we want to avoid color
  68   uint _copy_bias;              // Index of LRG which we want to share color
  69 
  70   uint _next;                   // Index of next LRG in linked list
  71   uint _prev;                   // Index of prev LRG in linked list
  72 private:
  73   uint _reg;                    // Chosen register; undefined if mask is plural
  74 public:
  75   // Return chosen register for this LRG.  Error if the LRG is not bound to
  76   // a single register.
  77   OptoReg::Name reg() const { return OptoReg::Name(_reg); }
  78   void set_reg( OptoReg::Name r ) { _reg = r; }
  79 
  80 private:
  81   uint _eff_degree;             // Effective degree: Sum of neighbors _num_regs
  82 public:
  83   int degree() const { assert( _degree_valid, "" ); return _eff_degree; }
  84   // Degree starts not valid and any change to the IFG neighbor
  85   // set makes it not valid.
  86   void set_degree( uint degree ) { _eff_degree = degree; debug_only(_degree_valid = 1;) }
  87   // Made a change that hammered degree
  88   void invalid_degree() { debug_only(_degree_valid=0;) }
  89   // Incrementally modify degree.  If it was correct, it should remain correct
  90   void inc_degree( uint mod ) { _eff_degree += mod; }
  91   // Compute the degree between 2 live ranges
  92   int compute_degree( LRG &l ) const;
  93 
  94 private:
  95   RegMask _mask;                // Allowed registers for this LRG
  96   uint _mask_size;              // cache of _mask.Size();
  97 public:
  98   int compute_mask_size() const { return _mask.is_AllStack() ? 65535 : _mask.Size(); }
  99   void set_mask_size( int size ) {
 100     assert((size == 65535) || (size == (int)_mask.Size()), "");
 101     _mask_size = size;
 102 #ifdef ASSERT
 103     _msize_valid=1;
 104     if (_is_vector) {
 105       assert(!_fat_proj, "sanity");
 106       _mask.verify_sets(_num_regs);
 107     } else if (_num_regs == 2 && !_fat_proj) {
 108       _mask.verify_pairs();
 109     }
 110 #endif
 111   }
 112   void compute_set_mask_size() { set_mask_size(compute_mask_size()); }
 113   int mask_size() const { assert( _msize_valid, "mask size not valid" );
 114                           return _mask_size; }
 115   // Get the last mask size computed, even if it does not match the
 116   // count of bits in the current mask.
 117   int get_invalid_mask_size() const { return _mask_size; }
 118   const RegMask &mask() const { return _mask; }
 119   void set_mask( const RegMask &rm ) { _mask = rm; debug_only(_msize_valid=0;)}
 120   void AND( const RegMask &rm ) { _mask.AND(rm); debug_only(_msize_valid=0;)}
 121   void SUBTRACT( const RegMask &rm ) { _mask.SUBTRACT(rm); debug_only(_msize_valid=0;)}
 122   void Clear()   { _mask.Clear()  ; debug_only(_msize_valid=1); _mask_size = 0; }
 123   void Set_All() { _mask.Set_All(); debug_only(_msize_valid=1); _mask_size = RegMask::CHUNK_SIZE; }
 124   void Insert( OptoReg::Name reg ) { _mask.Insert(reg);  debug_only(_msize_valid=0;) }
 125   void Remove( OptoReg::Name reg ) { _mask.Remove(reg);  debug_only(_msize_valid=0;) }
 126   void clear_to_pairs() { _mask.clear_to_pairs(); debug_only(_msize_valid=0;) }
 127   void clear_to_sets()  { _mask.clear_to_sets(_num_regs); debug_only(_msize_valid=0;) }
 128 
 129   // Number of registers this live range uses when it colors
 130 private:
 131   uint8 _num_regs;              // 2 for Longs and Doubles, 1 for all else
 132                                 // except _num_regs is kill count for fat_proj
 133 public:
 134   int num_regs() const { return _num_regs; }
 135   void set_num_regs( int reg ) { assert( _num_regs == reg || !_num_regs, "" ); _num_regs = reg; }
 136 
 137 private:
 138   // Number of physical registers this live range uses when it colors
 139   // Architecture and register-set dependent
 140   uint8 _reg_pressure;
 141 public:
 142   void set_reg_pressure(int i)  { _reg_pressure = i; }
 143   int      reg_pressure() const { return _reg_pressure; }
 144 
 145   // How much 'wiggle room' does this live range have?
 146   // How many color choices can it make (scaled by _num_regs)?
 147   int degrees_of_freedom() const { return mask_size() - _num_regs; }
 148   // Bound LRGs have ZERO degrees of freedom.  We also count
 149   // must_spill as bound.
 150   bool is_bound  () const { return _is_bound; }
 151   // Negative degrees-of-freedom; even with no neighbors this
 152   // live range must spill.
 153   bool not_free() const { return degrees_of_freedom() <  0; }
 154   // Is this live range of "low-degree"?  Trivially colorable?
 155   bool lo_degree () const { return degree() <= degrees_of_freedom(); }
 156   // Is this live range just barely "low-degree"?  Trivially colorable?
 157   bool just_lo_degree () const { return degree() == degrees_of_freedom(); }
 158 
 159   uint   _is_oop:1,             // Live-range holds an oop
 160          _is_float:1,           // True if in float registers
 161          _is_vector:1,          // True if in vector registers
 162          _was_spilled1:1,       // True if prior spilling on def
 163          _was_spilled2:1,       // True if twice prior spilling on def
 164          _is_bound:1,           // live range starts life with no
 165                                 // degrees of freedom.
 166          _direct_conflict:1,    // True if def and use registers in conflict
 167          _must_spill:1,         // live range has lost all degrees of freedom
 168     // If _fat_proj is set, live range does NOT require aligned, adjacent
 169     // registers and has NO interferences.
 170     // If _fat_proj is clear, live range requires num_regs() to be a power of
 171     // 2, and it requires registers to form an aligned, adjacent set.
 172          _fat_proj:1,           //
 173          _was_lo:1,             // Was lo-degree prior to coalesce
 174          _msize_valid:1,        // _mask_size cache valid
 175          _degree_valid:1,       // _degree cache valid
 176          _has_copy:1,           // Adjacent to some copy instruction
 177          _at_risk:1;            // Simplify says this guy is at risk to spill
 178 
 179 
 180   // Alive if non-zero, dead if zero
 181   bool alive() const { return _def != NULL; }
 182   bool is_multidef() const { return _def == NodeSentinel; }
 183   bool is_singledef() const { return _def != NodeSentinel; }
 184 
 185 #ifndef PRODUCT
 186   void dump( ) const;
 187 #endif
 188 };
 189 
 190 //------------------------------IFG--------------------------------------------
 191 //                         InterFerence Graph
 192 // An undirected graph implementation.  Created with a fixed number of
 193 // vertices.  Edges can be added & tested.  Vertices can be removed, then
 194 // added back later with all edges intact.  Can add edges between one vertex
 195 // and a list of other vertices.  Can union vertices (and their edges)
 196 // together.  The IFG needs to be really really fast, and also fairly
 197 // abstract!  It needs abstraction so I can fiddle with the implementation to
 198 // get even more speed.
 199 class PhaseIFG : public Phase {
 200   friend class VMStructs;
 201   // Current implementation: a triangular adjacency list.
 202 
 203   // Array of adjacency-lists, indexed by live-range number
 204   IndexSet *_adjs;
 205 
 206   // Assertion bit for proper use of Squaring
 207   bool _is_square;
 208 
 209   // Live range structure goes here
 210   LRG *_lrgs;                   // Array of LRG structures
 211 
 212 public:
 213   // Largest live-range number
 214   uint _maxlrg;
 215 
 216   Arena *_arena;
 217 
 218   // Keep track of inserted and deleted Nodes
 219   VectorSet *_yanked;
 220 
 221   PhaseIFG( Arena *arena );
 222   void init( uint maxlrg );
 223 
 224   // Add edge between a and b.  Returns true if actually addded.
 225   int add_edge( uint a, uint b );
 226 
 227   // Add edge between a and everything in the vector
 228   void add_vector( uint a, IndexSet *vec );
 229 
 230   // Test for edge existance
 231   int test_edge( uint a, uint b ) const;
 232 
 233   // Square-up matrix for faster Union
 234   void SquareUp();
 235 
 236   // Return number of LRG neighbors
 237   uint neighbor_cnt( uint a ) const { return _adjs[a].count(); }
 238   // Union edges of b into a on Squared-up matrix
 239   void Union( uint a, uint b );
 240   // Test for edge in Squared-up matrix
 241   int test_edge_sq( uint a, uint b ) const;
 242   // Yank a Node and all connected edges from the IFG.  Be prepared to
 243   // re-insert the yanked Node in reverse order of yanking.  Return a
 244   // list of neighbors (edges) yanked.
 245   IndexSet *remove_node( uint a );
 246   // Reinsert a yanked Node
 247   void re_insert( uint a );
 248   // Return set of neighbors
 249   IndexSet *neighbors( uint a ) const { return &_adjs[a]; }
 250 
 251 #ifndef PRODUCT
 252   // Dump the IFG
 253   void dump() const;
 254   void stats() const;
 255   void verify( const PhaseChaitin * ) const;
 256 #endif
 257 
 258   //--------------- Live Range Accessors
 259   LRG &lrgs(uint idx) const { assert(idx < _maxlrg, "oob"); return _lrgs[idx]; }
 260 
 261   // Compute and set effective degree.  Might be folded into SquareUp().
 262   void Compute_Effective_Degree();
 263 
 264   // Compute effective degree as the sum of neighbors' _sizes.
 265   int effective_degree( uint lidx ) const;
 266 };
 267 
 268 // The LiveRangeMap class is responsible for storing node to live range id mapping.
 269 // Each node is mapped to a live range id (a virtual register). Nodes that are
 270 // not considered for register allocation are given live range id 0.
 271 class LiveRangeMap VALUE_OBJ_CLASS_SPEC {
 272 
 273 private:
 274 
 275   uint _max_lrg_id;
 276 
 277   // Union-find map.  Declared as a short for speed.
 278   // Indexed by live-range number, it returns the compacted live-range number
 279   LRG_List _uf_map;
 280 
 281   // Map from Nodes to live ranges
 282   LRG_List _names;
 283 
 284   // Straight out of Tarjan's union-find algorithm
 285   uint find_compress(const Node *node) {
 286     uint lrg_id = find_compress(_names.at(node->_idx));
 287     _names.at_put(node->_idx, lrg_id);
 288     return lrg_id;
 289   }
 290 
 291   uint find_compress(uint lrg);
 292 
 293 public:
 294 
 295   const LRG_List& names() {
 296     return _names;
 297   }
 298 
 299   uint max_lrg_id() const {
 300     return _max_lrg_id;
 301   }
 302 
 303   void set_max_lrg_id(uint max_lrg_id) {
 304     _max_lrg_id = max_lrg_id;
 305   }
 306 
 307   uint size() const {
 308     return _names.length();
 309   }
 310 
 311   uint live_range_id(uint idx) const {
 312     return _names.at(idx);
 313   }
 314 
 315   uint live_range_id(const Node *node) const {
 316     return _names.at(node->_idx);
 317   }
 318 
 319   uint uf_live_range_id(uint lrg_id) const {
 320     return _uf_map.at(lrg_id);
 321   }
 322 
 323   void map(uint idx, uint lrg_id) {
 324     _names.at_put(idx, lrg_id);
 325   }
 326 
 327   void uf_map(uint dst_lrg_id, uint src_lrg_id) {
 328     _uf_map.at_put(dst_lrg_id, src_lrg_id);
 329   }
 330 
 331   void extend(uint idx, uint lrg_id) {
 332     _names.at_put_grow(idx, lrg_id);
 333   }
 334 
 335   void uf_extend(uint dst_lrg_id, uint src_lrg_id) {
 336     _uf_map.at_put_grow(dst_lrg_id, src_lrg_id);
 337   }
 338 
 339   LiveRangeMap(Arena* arena, uint unique)
 340   : _names(arena, unique, unique, 0)
 341   , _uf_map(arena, unique, unique, 0)
 342   , _max_lrg_id(0) {}
 343 
 344   uint find_id( const Node *n ) {
 345     uint retval = live_range_id(n);
 346     assert(retval == find(n),"Invalid node to lidx mapping");
 347     return retval;
 348   }
 349 
 350   // Reset the Union-Find map to identity
 351   void reset_uf_map(uint max_lrg_id);
 352 
 353   // Make all Nodes map directly to their final live range; no need for
 354   // the Union-Find mapping after this call.
 355   void compress_uf_map_for_nodes();
 356 
 357   uint find(uint lidx) {
 358     uint uf_lidx = _uf_map.at(lidx);
 359     return (uf_lidx == lidx) ? uf_lidx : find_compress(lidx);
 360   }
 361 
 362   // Convert a Node into a Live Range Index - a lidx
 363   uint find(const Node *node) {
 364     uint lidx = live_range_id(node);
 365     uint uf_lidx = _uf_map.at(lidx);
 366     return (uf_lidx == lidx) ? uf_lidx : find_compress(node);
 367   }
 368 
 369   // Like Find above, but no path compress, so bad asymptotic behavior
 370   uint find_const(uint lrg) const;
 371 
 372   // Like Find above, but no path compress, so bad asymptotic behavior
 373   uint find_const(const Node *node) const {
 374     if(node->_idx >= (uint)_names.length()) {
 375       return 0; // not mapped, usual for debug dump
 376     }
 377     return find_const(_names.at(node->_idx));
 378   }
 379 };
 380 
 381 //------------------------------Chaitin----------------------------------------
 382 // Briggs-Chaitin style allocation, mostly.
 383 class PhaseChaitin : public PhaseRegAlloc {
 384   friend class VMStructs;
 385 
 386   int _trip_cnt;
 387   int _alternate;
 388 
 389   LRG &lrgs(uint idx) const { return _ifg->lrgs(idx); }
 390   PhaseLive *_live;             // Liveness, used in the interference graph
 391   PhaseIFG *_ifg;               // Interference graph (for original chunk)
 392   Node_List **_lrg_nodes;       // Array of node; lists for lrgs which spill
 393   VectorSet _spilled_once;      // Nodes that have been spilled
 394   VectorSet _spilled_twice;     // Nodes that have been spilled twice
 395 
 396   // Combine the Live Range Indices for these 2 Nodes into a single live
 397   // range.  Future requests for any Node in either live range will
 398   // return the live range index for the combined live range.
 399   void Union( const Node *src, const Node *dst );
 400 
 401   void new_lrg( const Node *x, uint lrg );
 402 
 403   // Compact live ranges, removing unused ones.  Return new maxlrg.
 404   void compact();
 405 
 406   uint _lo_degree;              // Head of lo-degree LRGs list
 407   uint _lo_stk_degree;          // Head of lo-stk-degree LRGs list
 408   uint _hi_degree;              // Head of hi-degree LRGs list
 409   uint _simplified;             // Linked list head of simplified LRGs
 410 
 411   // Helper functions for Split()
 412   uint split_DEF( Node *def, Block *b, int loc, uint max, Node **Reachblock, Node **debug_defs, GrowableArray<uint> splits, int slidx );
 413   uint split_USE( Node *def, Block *b, Node *use, uint useidx, uint max, bool def_down, bool cisc_sp, GrowableArray<uint> splits, int slidx );
 414 
 415   //------------------------------clone_projs------------------------------------
 416   // After cloning some rematerialized instruction, clone any MachProj's that
 417   // follow it.  Example: Intel zero is XOR, kills flags.  Sparc FP constants
 418   // use G3 as an address temp.
 419   int clone_projs(Block* b, uint idx, Node* orig, Node* copy, uint& max_lrg_id);
 420 
 421   int clone_projs(Block* b, uint idx, Node* orig, Node* copy, LiveRangeMap& lrg_map) {
 422     uint max_lrg_id = lrg_map.max_lrg_id();
 423     int found_projs = clone_projs(b, idx, orig, copy, max_lrg_id);
 424     if (found_projs > 0) {
 425       // max_lrg_id is updated during call above
 426       lrg_map.set_max_lrg_id(max_lrg_id);
 427     }
 428     return found_projs;
 429   }
 430 
 431   Node *split_Rematerialize(Node *def, Block *b, uint insidx, uint &maxlrg, GrowableArray<uint> splits,
 432                             int slidx, uint *lrg2reach, Node **Reachblock, bool walkThru);
 433   // True if lidx is used before any real register is def'd in the block
 434   bool prompt_use( Block *b, uint lidx );
 435   Node *get_spillcopy_wide( Node *def, Node *use, uint uidx );
 436   // Insert the spill at chosen location.  Skip over any intervening Proj's or
 437   // Phis.  Skip over a CatchNode and projs, inserting in the fall-through block
 438   // instead.  Update high-pressure indices.  Create a new live range.
 439   void insert_proj( Block *b, uint i, Node *spill, uint maxlrg );
 440 
 441   bool is_high_pressure( Block *b, LRG *lrg, uint insidx );
 442 
 443   uint _oldphi;                 // Node index which separates pre-allocation nodes
 444 
 445   Block **_blks;                // Array of blocks sorted by frequency for coalescing
 446 
 447   float _high_frequency_lrg;    // Frequency at which LRG will be spilled for debug info
 448 
 449 #ifndef PRODUCT
 450   bool _trace_spilling;
 451 #endif
 452 
 453 public:
 454   PhaseChaitin( uint unique, PhaseCFG &cfg, Matcher &matcher );
 455   ~PhaseChaitin() {}
 456 
 457   LiveRangeMap _lrg_map;
 458 
 459   // Do all the real work of allocate
 460   void Register_Allocate();
 461 
 462   float high_frequency_lrg() const { return _high_frequency_lrg; }
 463 
 464 #ifndef PRODUCT
 465   bool trace_spilling() const { return _trace_spilling; }
 466 #endif
 467 
 468 private:
 469   // De-SSA the world.  Assign registers to Nodes.  Use the same register for
 470   // all inputs to a PhiNode, effectively coalescing live ranges.  Insert
 471   // copies as needed.
 472   void de_ssa();
 473 
 474   // Add edge between reg and everything in the vector.
 475   // Same as _ifg->add_vector(reg,live) EXCEPT use the RegMask
 476   // information to trim the set of interferences.  Return the
 477   // count of edges added.
 478   void interfere_with_live( uint reg, IndexSet *live );
 479   // Count register pressure for asserts
 480   uint count_int_pressure( IndexSet *liveout );
 481   uint count_float_pressure( IndexSet *liveout );
 482 
 483   // Build the interference graph using virtual registers only.
 484   // Used for aggressive coalescing.
 485   void build_ifg_virtual( );
 486 
 487   // Build the interference graph using physical registers when available.
 488   // That is, if 2 live ranges are simultaneously alive but in their
 489   // acceptable register sets do not overlap, then they do not interfere.
 490   uint build_ifg_physical( ResourceArea *a );
 491 
 492   // Gather LiveRanGe information, including register masks and base pointer/
 493   // derived pointer relationships.
 494   void gather_lrg_masks( bool mod_cisc_masks );
 495 
 496   // Force the bases of derived pointers to be alive at GC points.
 497   bool stretch_base_pointer_live_ranges( ResourceArea *a );
 498   // Helper to stretch above; recursively discover the base Node for
 499   // a given derived Node.  Easy for AddP-related machine nodes, but
 500   // needs to be recursive for derived Phis.
 501   Node *find_base_for_derived( Node **derived_base_map, Node *derived, uint &maxlrg );
 502 
 503   // Set the was-lo-degree bit.  Conservative coalescing should not change the
 504   // colorability of the graph.  If any live range was of low-degree before
 505   // coalescing, it should Simplify.  This call sets the was-lo-degree bit.
 506   void set_was_low();
 507 
 508   // Split live-ranges that must spill due to register conflicts (as opposed
 509   // to capacity spills).  Typically these are things def'd in a register
 510   // and used on the stack or vice-versa.
 511   void pre_spill();
 512 
 513   // Init LRG caching of degree, numregs.  Init lo_degree list.
 514   void cache_lrg_info( );
 515 
 516   // Simplify the IFG by removing LRGs of low degree with no copies
 517   void Pre_Simplify();
 518 
 519   // Simplify the IFG by removing LRGs of low degree
 520   void Simplify();
 521 
 522   // Select colors by re-inserting edges into the IFG.
 523   // Return TRUE if any spills occurred.
 524   uint Select( );
 525   // Helper function for select which allows biased coloring
 526   OptoReg::Name choose_color( LRG &lrg, int chunk );
 527   // Helper function which implements biasing heuristic
 528   OptoReg::Name bias_color( LRG &lrg, int chunk );
 529 
 530   // Split uncolorable live ranges
 531   // Return new number of live ranges
 532   uint Split(uint maxlrg, ResourceArea* split_arena);
 533 
 534   // Copy 'was_spilled'-edness from one Node to another.
 535   void copy_was_spilled( Node *src, Node *dst );
 536   // Set the 'spilled_once' or 'spilled_twice' flag on a node.
 537   void set_was_spilled( Node *n );
 538 
 539   // Convert ideal spill-nodes into machine loads & stores
 540   // Set C->failing when fixup spills could not complete, node limit exceeded.
 541   void fixup_spills();
 542 
 543   // Post-Allocation peephole copy removal
 544   void post_allocate_copy_removal();
 545   Node *skip_copies( Node *c );
 546   // Replace the old node with the current live version of that value
 547   // and yank the old value if it's dead.
 548   int replace_and_yank_if_dead( Node *old, OptoReg::Name nreg,
 549                                 Block *current_block, Node_List& value, Node_List& regnd ) {
 550     Node* v = regnd[nreg];
 551     assert(v->outcnt() != 0, "no dead values");
 552     old->replace_by(v);
 553     return yank_if_dead(old, current_block, &value, &regnd);
 554   }
 555 
 556   int yank_if_dead( Node *old, Block *current_block, Node_List *value, Node_List *regnd ) {
 557     return yank_if_dead_recurse(old, old, current_block, value, regnd);
 558   }
 559   int yank_if_dead_recurse(Node *old, Node *orig_old, Block *current_block,
 560                            Node_List *value, Node_List *regnd);
 561   int yank( Node *old, Block *current_block, Node_List *value, Node_List *regnd );
 562   int elide_copy( Node *n, int k, Block *current_block, Node_List &value, Node_List &regnd, bool can_change_regs );
 563   int use_prior_register( Node *copy, uint idx, Node *def, Block *current_block, Node_List &value, Node_List &regnd );
 564   bool may_be_copy_of_callee( Node *def ) const;
 565 
 566   // If nreg already contains the same constant as val then eliminate it
 567   bool eliminate_copy_of_constant(Node* val, Node* n,
 568                                   Block *current_block, Node_List& value, Node_List &regnd,
 569                                   OptoReg::Name nreg, OptoReg::Name nreg2);
 570   // Extend the node to LRG mapping
 571   void add_reference( const Node *node, const Node *old_node);
 572 
 573 private:
 574 
 575   static int _final_loads, _final_stores, _final_copies, _final_memoves;
 576   static double _final_load_cost, _final_store_cost, _final_copy_cost, _final_memove_cost;
 577   static int _conserv_coalesce, _conserv_coalesce_pair;
 578   static int _conserv_coalesce_trie, _conserv_coalesce_quad;
 579   static int _post_alloc;
 580   static int _lost_opp_pp_coalesce, _lost_opp_cflow_coalesce;
 581   static int _used_cisc_instructions, _unused_cisc_instructions;
 582   static int _allocator_attempts, _allocator_successes;
 583 
 584 #ifndef PRODUCT
 585   static uint _high_pressure, _low_pressure;
 586 
 587   void dump() const;
 588   void dump( const Node *n ) const;
 589   void dump( const Block * b ) const;
 590   void dump_degree_lists() const;
 591   void dump_simplified() const;
 592   void dump_lrg( uint lidx, bool defs_only) const;
 593   void dump_lrg( uint lidx) const {
 594     // dump defs and uses by default
 595     dump_lrg(lidx, false);
 596   }
 597   void dump_bb( uint pre_order ) const;
 598 
 599   // Verify that base pointers and derived pointers are still sane
 600   void verify_base_ptrs( ResourceArea *a ) const;
 601 
 602   void verify( ResourceArea *a, bool verify_ifg = false ) const;
 603 
 604   void dump_for_spill_split_recycle() const;
 605 
 606 public:
 607   void dump_frame() const;
 608   char *dump_register( const Node *n, char *buf  ) const;
 609 private:
 610   static void print_chaitin_statistics();
 611 #endif
 612   friend class PhaseCoalesce;
 613   friend class PhaseAggressiveCoalesce;
 614   friend class PhaseConservativeCoalesce;
 615 };
 616 
 617 #endif // SHARE_VM_OPTO_CHAITIN_HPP