1 /*
   2  * Copyright (c) 1997, 2012, Oracle and/or its affiliates. All rights reserved.
   3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   4  *
   5  * This code is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 only, as
   7  * published by the Free Software Foundation.
   8  *
   9  * This code is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  *
  23  */
  24 
  25 #ifndef SHARE_VM_OPTO_CHAITIN_HPP
  26 #define SHARE_VM_OPTO_CHAITIN_HPP
  27 
  28 #include "code/vmreg.hpp"
  29 #include "libadt/port.hpp"
  30 #include "memory/resourceArea.hpp"
  31 #include "opto/connode.hpp"
  32 #include "opto/live.hpp"
  33 #include "opto/matcher.hpp"
  34 #include "opto/phase.hpp"
  35 #include "opto/regalloc.hpp"
  36 #include "opto/regmask.hpp"
  37 
  38 class LoopTree;
  39 class MachCallNode;
  40 class MachSafePointNode;
  41 class Matcher;
  42 class PhaseCFG;
  43 class PhaseLive;
  44 class PhaseRegAlloc;
  45 class   PhaseChaitin;
  46 
  47 #define OPTO_DEBUG_SPLIT_FREQ  BLOCK_FREQUENCY(0.001)
  48 #define OPTO_LRG_HIGH_FREQ     BLOCK_FREQUENCY(0.25)
  49 #define LRG_All_STACK_SIZE     1048575
  50 
  51 //------------------------------LRG--------------------------------------------
  52 // Live-RanGe structure.
  53 class LRG : public ResourceObj {
  54   friend class VMStructs;
  55 public:
  56   enum { SPILL_REG=29999 };     // Register number of a spilled LRG
  57 
  58   double _cost;                 // 2 for loads/1 for stores times block freq
  59   double _area;                 // Sum of all simultaneously live values
  60   double score() const;         // Compute score from cost and area
  61   double _maxfreq;              // Maximum frequency of any def or use
  62 
  63   Node *_def;                   // Check for multi-def live ranges
  64 #ifndef PRODUCT
  65   GrowableArray<Node*>* _defs;
  66 #endif
  67 
  68   uint _risk_bias;              // Index of LRG which we want to avoid color
  69   uint _copy_bias;              // Index of LRG which we want to share color
  70 
  71   uint _next;                   // Index of next LRG in linked list
  72   uint _prev;                   // Index of prev LRG in linked list
  73 private:
  74   uint _reg;                    // Chosen register; undefined if mask is plural
  75 public:
  76   // Return chosen register for this LRG.  Error if the LRG is not bound to
  77   // a single register.
  78   OptoReg::Name reg() const { return OptoReg::Name(_reg); }
  79   void set_reg( OptoReg::Name r ) { _reg = r; }
  80 
  81 private:
  82   uint _eff_degree;             // Effective degree: Sum of neighbors _num_regs
  83 public:
  84   int degree() const { assert( _degree_valid, "" ); return _eff_degree; }
  85   // Degree starts not valid and any change to the IFG neighbor
  86   // set makes it not valid.
  87   void set_degree( uint degree ) { _eff_degree = degree; debug_only(_degree_valid = 1;) }
  88   // Made a change that hammered degree
  89   void invalid_degree() { debug_only(_degree_valid=0;) }
  90   // Incrementally modify degree.  If it was correct, it should remain correct
  91   void inc_degree( uint mod ) { _eff_degree += mod; }
  92   // Compute the degree between 2 live ranges
  93   int compute_degree( LRG &l ) const;
  94 
  95 private:
  96   RegMask _mask;                // Allowed registers for this LRG
  97   uint _mask_size;              // cache of _mask.Size();
  98 public:
  99   int compute_mask_size() const { return _mask.is_AllStack() ? LRG_All_STACK_SIZE : _mask.Size(); }
 100   void set_mask_size( int size ) {
 101     assert((size == LRG_All_STACK_SIZE) || (size == (int)_mask.Size()), "");
 102     _mask_size = size;
 103 #ifdef ASSERT
 104     _msize_valid=1;
 105     if (_is_vector) {
 106       assert(!_fat_proj, "sanity");
 107       _mask.verify_sets(_num_regs);
 108     } else if (_num_regs == 2 && !_fat_proj) {
 109       _mask.verify_pairs();
 110     }
 111 #endif
 112   }
 113   void compute_set_mask_size() { set_mask_size(compute_mask_size()); }
 114   int mask_size() const { assert( _msize_valid, "mask size not valid" );
 115                           return _mask_size; }
 116   // Get the last mask size computed, even if it does not match the
 117   // count of bits in the current mask.
 118   int get_invalid_mask_size() const { return _mask_size; }
 119   const RegMask &mask() const { return _mask; }
 120   void set_mask( const RegMask &rm ) { _mask = rm; debug_only(_msize_valid=0;)}
 121   void AND( const RegMask &rm ) { _mask.AND(rm); debug_only(_msize_valid=0;)}
 122   void SUBTRACT( const RegMask &rm ) { _mask.SUBTRACT(rm); debug_only(_msize_valid=0;)}
 123   void Clear()   { _mask.Clear()  ; debug_only(_msize_valid=1); _mask_size = 0; }
 124   void Set_All() { _mask.Set_All(); debug_only(_msize_valid=1); _mask_size = RegMask::CHUNK_SIZE; }
 125   void Insert( OptoReg::Name reg ) { _mask.Insert(reg);  debug_only(_msize_valid=0;) }
 126   void Remove( OptoReg::Name reg ) { _mask.Remove(reg);  debug_only(_msize_valid=0;) }
 127   void clear_to_pairs() { _mask.clear_to_pairs(); debug_only(_msize_valid=0;) }
 128   void clear_to_sets()  { _mask.clear_to_sets(_num_regs); debug_only(_msize_valid=0;) }
 129 
 130   // Number of registers this live range uses when it colors
 131 private:
 132   uint8 _num_regs;              // 2 for Longs and Doubles, 1 for all else
 133                                 // except _num_regs is kill count for fat_proj
 134 public:
 135   int num_regs() const { return _num_regs; }
 136   void set_num_regs( int reg ) { assert( _num_regs == reg || !_num_regs, "" ); _num_regs = reg; }
 137 
 138 private:
 139   // Number of physical registers this live range uses when it colors
 140   // Architecture and register-set dependent
 141   uint8 _reg_pressure;
 142 public:
 143   void set_reg_pressure(int i)  { _reg_pressure = i; }
 144   int      reg_pressure() const { return _reg_pressure; }
 145 
 146   // How much 'wiggle room' does this live range have?
 147   // How many color choices can it make (scaled by _num_regs)?
 148   int degrees_of_freedom() const { return mask_size() - _num_regs; }
 149   // Bound LRGs have ZERO degrees of freedom.  We also count
 150   // must_spill as bound.
 151   bool is_bound  () const { return _is_bound; }
 152   // Negative degrees-of-freedom; even with no neighbors this
 153   // live range must spill.
 154   bool not_free() const { return degrees_of_freedom() <  0; }
 155   // Is this live range of "low-degree"?  Trivially colorable?
 156   bool lo_degree () const { return degree() <= degrees_of_freedom(); }
 157   // Is this live range just barely "low-degree"?  Trivially colorable?
 158   bool just_lo_degree () const { return degree() == degrees_of_freedom(); }
 159 
 160   uint   _is_oop:1,             // Live-range holds an oop
 161          _is_float:1,           // True if in float registers
 162          _is_vector:1,          // True if in vector registers
 163          _was_spilled1:1,       // True if prior spilling on def
 164          _was_spilled2:1,       // True if twice prior spilling on def
 165          _is_bound:1,           // live range starts life with no
 166                                 // degrees of freedom.
 167          _direct_conflict:1,    // True if def and use registers in conflict
 168          _must_spill:1,         // live range has lost all degrees of freedom
 169     // If _fat_proj is set, live range does NOT require aligned, adjacent
 170     // registers and has NO interferences.
 171     // If _fat_proj is clear, live range requires num_regs() to be a power of
 172     // 2, and it requires registers to form an aligned, adjacent set.
 173          _fat_proj:1,           //
 174          _was_lo:1,             // Was lo-degree prior to coalesce
 175          _msize_valid:1,        // _mask_size cache valid
 176          _degree_valid:1,       // _degree cache valid
 177          _has_copy:1,           // Adjacent to some copy instruction
 178          _at_risk:1;            // Simplify says this guy is at risk to spill
 179 
 180 
 181   // Alive if non-zero, dead if zero
 182   bool alive() const { return _def != NULL; }
 183   bool is_multidef() const { return _def == NodeSentinel; }
 184   bool is_singledef() const { return _def != NodeSentinel; }
 185 
 186 #ifndef PRODUCT
 187   void dump( ) const;
 188 #endif
 189 };
 190 
 191 //------------------------------IFG--------------------------------------------
 192 //                         InterFerence Graph
 193 // An undirected graph implementation.  Created with a fixed number of
 194 // vertices.  Edges can be added & tested.  Vertices can be removed, then
 195 // added back later with all edges intact.  Can add edges between one vertex
 196 // and a list of other vertices.  Can union vertices (and their edges)
 197 // together.  The IFG needs to be really really fast, and also fairly
 198 // abstract!  It needs abstraction so I can fiddle with the implementation to
 199 // get even more speed.
 200 class PhaseIFG : public Phase {
 201   friend class VMStructs;
 202   // Current implementation: a triangular adjacency list.
 203 
 204   // Array of adjacency-lists, indexed by live-range number
 205   IndexSet *_adjs;
 206 
 207   // Assertion bit for proper use of Squaring
 208   bool _is_square;
 209 
 210   // Live range structure goes here
 211   LRG *_lrgs;                   // Array of LRG structures
 212 
 213 public:
 214   // Largest live-range number
 215   uint _maxlrg;
 216 
 217   Arena *_arena;
 218 
 219   // Keep track of inserted and deleted Nodes
 220   VectorSet *_yanked;
 221 
 222   PhaseIFG( Arena *arena );
 223   void init( uint maxlrg );
 224 
 225   // Add edge between a and b.  Returns true if actually addded.
 226   int add_edge( uint a, uint b );
 227 
 228   // Add edge between a and everything in the vector
 229   void add_vector( uint a, IndexSet *vec );
 230 
 231   // Test for edge existance
 232   int test_edge( uint a, uint b ) const;
 233 
 234   // Square-up matrix for faster Union
 235   void SquareUp();
 236 
 237   // Return number of LRG neighbors
 238   uint neighbor_cnt( uint a ) const { return _adjs[a].count(); }
 239   // Union edges of b into a on Squared-up matrix
 240   void Union( uint a, uint b );
 241   // Test for edge in Squared-up matrix
 242   int test_edge_sq( uint a, uint b ) const;
 243   // Yank a Node and all connected edges from the IFG.  Be prepared to
 244   // re-insert the yanked Node in reverse order of yanking.  Return a
 245   // list of neighbors (edges) yanked.
 246   IndexSet *remove_node( uint a );
 247   // Reinsert a yanked Node
 248   void re_insert( uint a );
 249   // Return set of neighbors
 250   IndexSet *neighbors( uint a ) const { return &_adjs[a]; }
 251 
 252 #ifndef PRODUCT
 253   // Dump the IFG
 254   void dump() const;
 255   void stats() const;
 256   void verify( const PhaseChaitin * ) const;
 257 #endif
 258 
 259   //--------------- Live Range Accessors
 260   LRG &lrgs(uint idx) const { assert(idx < _maxlrg, "oob"); return _lrgs[idx]; }
 261 
 262   // Compute and set effective degree.  Might be folded into SquareUp().
 263   void Compute_Effective_Degree();
 264 
 265   // Compute effective degree as the sum of neighbors' _sizes.
 266   int effective_degree( uint lidx ) const;
 267 };
 268 
 269 // The LiveRangeMap class is responsible for storing node to live range id mapping.
 270 // Each node is mapped to a live range id (a virtual register). Nodes that are
 271 // not considered for register allocation are given live range id 0.
 272 class LiveRangeMap VALUE_OBJ_CLASS_SPEC {
 273 
 274 private:
 275 
 276   uint _max_lrg_id;
 277 
 278   // Union-find map.  Declared as a short for speed.
 279   // Indexed by live-range number, it returns the compacted live-range number
 280   LRG_List _uf_map;
 281 
 282   // Map from Nodes to live ranges
 283   LRG_List _names;
 284 
 285   // Straight out of Tarjan's union-find algorithm
 286   uint find_compress(const Node *node) {
 287     uint lrg_id = find_compress(_names.at(node->_idx));
 288     _names.at_put(node->_idx, lrg_id);
 289     return lrg_id;
 290   }
 291 
 292   uint find_compress(uint lrg);
 293 
 294 public:
 295 
 296   const LRG_List& names() {
 297     return _names;
 298   }
 299 
 300   uint max_lrg_id() const {
 301     return _max_lrg_id;
 302   }
 303 
 304   void set_max_lrg_id(uint max_lrg_id) {
 305     _max_lrg_id = max_lrg_id;
 306   }
 307 
 308   uint size() const {
 309     return _names.length();
 310   }
 311 
 312   uint live_range_id(uint idx) const {
 313     return _names.at(idx);
 314   }
 315 
 316   uint live_range_id(const Node *node) const {
 317     return _names.at(node->_idx);
 318   }
 319 
 320   uint uf_live_range_id(uint lrg_id) const {
 321     return _uf_map.at(lrg_id);
 322   }
 323 
 324   void map(uint idx, uint lrg_id) {
 325     _names.at_put(idx, lrg_id);
 326   }
 327 
 328   void uf_map(uint dst_lrg_id, uint src_lrg_id) {
 329     _uf_map.at_put(dst_lrg_id, src_lrg_id);
 330   }
 331 
 332   void extend(uint idx, uint lrg_id) {
 333     _names.at_put_grow(idx, lrg_id);
 334   }
 335 
 336   void uf_extend(uint dst_lrg_id, uint src_lrg_id) {
 337     _uf_map.at_put_grow(dst_lrg_id, src_lrg_id);
 338   }
 339 
 340   LiveRangeMap(Arena* arena, uint unique)
 341   : _names(arena, unique, unique, 0)
 342   , _uf_map(arena, unique, unique, 0)
 343   , _max_lrg_id(0) {}
 344 
 345   uint find_id( const Node *n ) {
 346     uint retval = live_range_id(n);
 347     assert(retval == find(n),"Invalid node to lidx mapping");
 348     return retval;
 349   }
 350 
 351   // Reset the Union-Find map to identity
 352   void reset_uf_map(uint max_lrg_id);
 353 
 354   // Make all Nodes map directly to their final live range; no need for
 355   // the Union-Find mapping after this call.
 356   void compress_uf_map_for_nodes();
 357 
 358   uint find(uint lidx) {
 359     uint uf_lidx = _uf_map.at(lidx);
 360     return (uf_lidx == lidx) ? uf_lidx : find_compress(lidx);
 361   }
 362 
 363   // Convert a Node into a Live Range Index - a lidx
 364   uint find(const Node *node) {
 365     uint lidx = live_range_id(node);
 366     uint uf_lidx = _uf_map.at(lidx);
 367     return (uf_lidx == lidx) ? uf_lidx : find_compress(node);
 368   }
 369 
 370   // Like Find above, but no path compress, so bad asymptotic behavior
 371   uint find_const(uint lrg) const;
 372 
 373   // Like Find above, but no path compress, so bad asymptotic behavior
 374   uint find_const(const Node *node) const {
 375     if(node->_idx >= (uint)_names.length()) {
 376       return 0; // not mapped, usual for debug dump
 377     }
 378     return find_const(_names.at(node->_idx));
 379   }
 380 };
 381 
 382 //------------------------------Chaitin----------------------------------------
 383 // Briggs-Chaitin style allocation, mostly.
 384 class PhaseChaitin : public PhaseRegAlloc {
 385   friend class VMStructs;
 386 
 387   int _trip_cnt;
 388   int _alternate;
 389 
 390   LRG &lrgs(uint idx) const { return _ifg->lrgs(idx); }
 391   PhaseLive *_live;             // Liveness, used in the interference graph
 392   PhaseIFG *_ifg;               // Interference graph (for original chunk)
 393   Node_List **_lrg_nodes;       // Array of node; lists for lrgs which spill
 394   VectorSet _spilled_once;      // Nodes that have been spilled
 395   VectorSet _spilled_twice;     // Nodes that have been spilled twice
 396 
 397   // Combine the Live Range Indices for these 2 Nodes into a single live
 398   // range.  Future requests for any Node in either live range will
 399   // return the live range index for the combined live range.
 400   void Union( const Node *src, const Node *dst );
 401 
 402   void new_lrg( const Node *x, uint lrg );
 403 
 404   // Compact live ranges, removing unused ones.  Return new maxlrg.
 405   void compact();
 406 
 407   uint _lo_degree;              // Head of lo-degree LRGs list
 408   uint _lo_stk_degree;          // Head of lo-stk-degree LRGs list
 409   uint _hi_degree;              // Head of hi-degree LRGs list
 410   uint _simplified;             // Linked list head of simplified LRGs
 411 
 412   // Helper functions for Split()
 413   uint split_DEF( Node *def, Block *b, int loc, uint max, Node **Reachblock, Node **debug_defs, GrowableArray<uint> splits, int slidx );
 414   uint split_USE( Node *def, Block *b, Node *use, uint useidx, uint max, bool def_down, bool cisc_sp, GrowableArray<uint> splits, int slidx );
 415 
 416   //------------------------------clone_projs------------------------------------
 417   // After cloning some rematerialized instruction, clone any MachProj's that
 418   // follow it.  Example: Intel zero is XOR, kills flags.  Sparc FP constants
 419   // use G3 as an address temp.
 420   int clone_projs(Block* b, uint idx, Node* orig, Node* copy, uint& max_lrg_id);
 421 
 422   int clone_projs(Block* b, uint idx, Node* orig, Node* copy, LiveRangeMap& lrg_map) {
 423     uint max_lrg_id = lrg_map.max_lrg_id();
 424     int found_projs = clone_projs(b, idx, orig, copy, max_lrg_id);
 425     if (found_projs > 0) {
 426       // max_lrg_id is updated during call above
 427       lrg_map.set_max_lrg_id(max_lrg_id);
 428     }
 429     return found_projs;
 430   }
 431 
 432   Node *split_Rematerialize(Node *def, Block *b, uint insidx, uint &maxlrg, GrowableArray<uint> splits,
 433                             int slidx, uint *lrg2reach, Node **Reachblock, bool walkThru);
 434   // True if lidx is used before any real register is def'd in the block
 435   bool prompt_use( Block *b, uint lidx );
 436   Node *get_spillcopy_wide( Node *def, Node *use, uint uidx );
 437   // Insert the spill at chosen location.  Skip over any intervening Proj's or
 438   // Phis.  Skip over a CatchNode and projs, inserting in the fall-through block
 439   // instead.  Update high-pressure indices.  Create a new live range.
 440   void insert_proj( Block *b, uint i, Node *spill, uint maxlrg );
 441 
 442   bool is_high_pressure( Block *b, LRG *lrg, uint insidx );
 443 
 444   uint _oldphi;                 // Node index which separates pre-allocation nodes
 445 
 446   Block **_blks;                // Array of blocks sorted by frequency for coalescing
 447 
 448   float _high_frequency_lrg;    // Frequency at which LRG will be spilled for debug info
 449 
 450 #ifndef PRODUCT
 451   bool _trace_spilling;
 452 #endif
 453 
 454 public:
 455   PhaseChaitin( uint unique, PhaseCFG &cfg, Matcher &matcher );
 456   ~PhaseChaitin() {}
 457 
 458   LiveRangeMap _lrg_map;
 459 
 460   // Do all the real work of allocate
 461   void Register_Allocate();
 462 
 463   float high_frequency_lrg() const { return _high_frequency_lrg; }
 464 
 465 #ifndef PRODUCT
 466   bool trace_spilling() const { return _trace_spilling; }
 467 #endif
 468 
 469 private:
 470   // De-SSA the world.  Assign registers to Nodes.  Use the same register for
 471   // all inputs to a PhiNode, effectively coalescing live ranges.  Insert
 472   // copies as needed.
 473   void de_ssa();
 474 
 475   // Add edge between reg and everything in the vector.
 476   // Same as _ifg->add_vector(reg,live) EXCEPT use the RegMask
 477   // information to trim the set of interferences.  Return the
 478   // count of edges added.
 479   void interfere_with_live( uint reg, IndexSet *live );
 480   // Count register pressure for asserts
 481   uint count_int_pressure( IndexSet *liveout );
 482   uint count_float_pressure( IndexSet *liveout );
 483 
 484   // Build the interference graph using virtual registers only.
 485   // Used for aggressive coalescing.
 486   void build_ifg_virtual( );
 487 
 488   // Build the interference graph using physical registers when available.
 489   // That is, if 2 live ranges are simultaneously alive but in their
 490   // acceptable register sets do not overlap, then they do not interfere.
 491   uint build_ifg_physical( ResourceArea *a );
 492 
 493   // Gather LiveRanGe information, including register masks and base pointer/
 494   // derived pointer relationships.
 495   void gather_lrg_masks( bool mod_cisc_masks );
 496 
 497   // Force the bases of derived pointers to be alive at GC points.
 498   bool stretch_base_pointer_live_ranges( ResourceArea *a );
 499   // Helper to stretch above; recursively discover the base Node for
 500   // a given derived Node.  Easy for AddP-related machine nodes, but
 501   // needs to be recursive for derived Phis.
 502   Node *find_base_for_derived( Node **derived_base_map, Node *derived, uint &maxlrg );
 503 
 504   // Set the was-lo-degree bit.  Conservative coalescing should not change the
 505   // colorability of the graph.  If any live range was of low-degree before
 506   // coalescing, it should Simplify.  This call sets the was-lo-degree bit.
 507   void set_was_low();
 508 
 509   // Split live-ranges that must spill due to register conflicts (as opposed
 510   // to capacity spills).  Typically these are things def'd in a register
 511   // and used on the stack or vice-versa.
 512   void pre_spill();
 513 
 514   // Init LRG caching of degree, numregs.  Init lo_degree list.
 515   void cache_lrg_info( );
 516 
 517   // Simplify the IFG by removing LRGs of low degree with no copies
 518   void Pre_Simplify();
 519 
 520   // Simplify the IFG by removing LRGs of low degree
 521   void Simplify();
 522 
 523   // Select colors by re-inserting edges into the IFG.
 524   // Return TRUE if any spills occurred.
 525   uint Select( );
 526   // Helper function for select which allows biased coloring
 527   OptoReg::Name choose_color( LRG &lrg, int chunk );
 528   // Helper function which implements biasing heuristic
 529   OptoReg::Name bias_color( LRG &lrg, int chunk );
 530 
 531   // Split uncolorable live ranges
 532   // Return new number of live ranges
 533   uint Split(uint maxlrg, ResourceArea* split_arena);
 534 
 535   // Copy 'was_spilled'-edness from one Node to another.
 536   void copy_was_spilled( Node *src, Node *dst );
 537   // Set the 'spilled_once' or 'spilled_twice' flag on a node.
 538   void set_was_spilled( Node *n );
 539 
 540   // Convert ideal spill-nodes into machine loads & stores
 541   // Set C->failing when fixup spills could not complete, node limit exceeded.
 542   void fixup_spills();
 543 
 544   // Post-Allocation peephole copy removal
 545   void post_allocate_copy_removal();
 546   Node *skip_copies( Node *c );
 547   // Replace the old node with the current live version of that value
 548   // and yank the old value if it's dead.
 549   int replace_and_yank_if_dead( Node *old, OptoReg::Name nreg,
 550                                 Block *current_block, Node_List& value, Node_List& regnd ) {
 551     Node* v = regnd[nreg];
 552     assert(v->outcnt() != 0, "no dead values");
 553     old->replace_by(v);
 554     return yank_if_dead(old, current_block, &value, &regnd);
 555   }
 556 
 557   int yank_if_dead( Node *old, Block *current_block, Node_List *value, Node_List *regnd ) {
 558     return yank_if_dead_recurse(old, old, current_block, value, regnd);
 559   }
 560   int yank_if_dead_recurse(Node *old, Node *orig_old, Block *current_block,
 561                            Node_List *value, Node_List *regnd);
 562   int yank( Node *old, Block *current_block, Node_List *value, Node_List *regnd );
 563   int elide_copy( Node *n, int k, Block *current_block, Node_List &value, Node_List &regnd, bool can_change_regs );
 564   int use_prior_register( Node *copy, uint idx, Node *def, Block *current_block, Node_List &value, Node_List &regnd );
 565   bool may_be_copy_of_callee( Node *def ) const;
 566 
 567   // If nreg already contains the same constant as val then eliminate it
 568   bool eliminate_copy_of_constant(Node* val, Node* n,
 569                                   Block *current_block, Node_List& value, Node_List &regnd,
 570                                   OptoReg::Name nreg, OptoReg::Name nreg2);
 571   // Extend the node to LRG mapping
 572   void add_reference( const Node *node, const Node *old_node);
 573 
 574 private:
 575 
 576   static int _final_loads, _final_stores, _final_copies, _final_memoves;
 577   static double _final_load_cost, _final_store_cost, _final_copy_cost, _final_memove_cost;
 578   static int _conserv_coalesce, _conserv_coalesce_pair;
 579   static int _conserv_coalesce_trie, _conserv_coalesce_quad;
 580   static int _post_alloc;
 581   static int _lost_opp_pp_coalesce, _lost_opp_cflow_coalesce;
 582   static int _used_cisc_instructions, _unused_cisc_instructions;
 583   static int _allocator_attempts, _allocator_successes;
 584 
 585 #ifndef PRODUCT
 586   static uint _high_pressure, _low_pressure;
 587 
 588   void dump() const;
 589   void dump( const Node *n ) const;
 590   void dump( const Block * b ) const;
 591   void dump_degree_lists() const;
 592   void dump_simplified() const;
 593   void dump_lrg( uint lidx, bool defs_only) const;
 594   void dump_lrg( uint lidx) const {
 595     // dump defs and uses by default
 596     dump_lrg(lidx, false);
 597   }
 598   void dump_bb( uint pre_order ) const;
 599 
 600   // Verify that base pointers and derived pointers are still sane
 601   void verify_base_ptrs( ResourceArea *a ) const;
 602 
 603   void verify( ResourceArea *a, bool verify_ifg = false ) const;
 604 
 605   void dump_for_spill_split_recycle() const;
 606 
 607 public:
 608   void dump_frame() const;
 609   char *dump_register( const Node *n, char *buf  ) const;
 610 private:
 611   static void print_chaitin_statistics();
 612 #endif
 613   friend class PhaseCoalesce;
 614   friend class PhaseAggressiveCoalesce;
 615   friend class PhaseConservativeCoalesce;
 616 };
 617 
 618 #endif // SHARE_VM_OPTO_CHAITIN_HPP