src/share/vm/opto/ifg.cpp
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src/share/vm/opto/ifg.cpp

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rev 5403 : 8011415: CTW on Sparc: assert(lrg.lo_degree()) failed:
Summary: Increased the LRG AllStack mask size since the previous size was not big enough when compiling huge methods (60k+ nodes)
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 660             // Remove bound register(s) from 'l's choices
 661             RegMask old = lrg.mask();
 662             uint old_size = lrg.mask_size();
 663             // Remove the bits from LRG 'r' from LRG 'l' so 'l' no
 664             // longer interferes with 'r'.  If 'l' requires aligned
 665             // adjacent pairs, subtract out bit pairs.
 666             assert(!lrg._is_vector || !lrg._fat_proj, "sanity");
 667             if (lrg.num_regs() > 1 && !lrg._fat_proj) {
 668               RegMask r2mask = rmask;
 669               // Leave only aligned set of bits.
 670               r2mask.smear_to_sets(lrg.num_regs());
 671               // It includes vector case.
 672               lrg.SUBTRACT( r2mask );
 673               lrg.compute_set_mask_size();
 674             } else if( r_size != 1 ) { // fat proj
 675               lrg.SUBTRACT( rmask );
 676               lrg.compute_set_mask_size();
 677             } else {            // Common case: size 1 bound removal
 678               if( lrg.mask().Member(r_reg) ) {
 679                 lrg.Remove(r_reg);
 680                 lrg.set_mask_size(lrg.mask().is_AllStack() ? 65535:old_size-1);
 681               }
 682             }
 683             // If 'l' goes completely dry, it must spill.
 684             if( lrg.not_free() ) {
 685               // Give 'l' some kind of reasonable mask, so he picks up
 686               // interferences (and will spill later).
 687               lrg.set_mask( old );
 688               lrg.set_mask_size(old_size);
 689               must_spill++;
 690               lrg._must_spill = 1;
 691               lrg.set_reg(OptoReg::Name(LRG::SPILL_REG));
 692             }
 693           }
 694         } // End of if bound
 695 
 696         // Now interference with everything that is live and has
 697         // compatible register sets.
 698         interfere_with_live(r,&liveout);
 699 
 700       } // End of if normal register-allocated value




 660             // Remove bound register(s) from 'l's choices
 661             RegMask old = lrg.mask();
 662             uint old_size = lrg.mask_size();
 663             // Remove the bits from LRG 'r' from LRG 'l' so 'l' no
 664             // longer interferes with 'r'.  If 'l' requires aligned
 665             // adjacent pairs, subtract out bit pairs.
 666             assert(!lrg._is_vector || !lrg._fat_proj, "sanity");
 667             if (lrg.num_regs() > 1 && !lrg._fat_proj) {
 668               RegMask r2mask = rmask;
 669               // Leave only aligned set of bits.
 670               r2mask.smear_to_sets(lrg.num_regs());
 671               // It includes vector case.
 672               lrg.SUBTRACT( r2mask );
 673               lrg.compute_set_mask_size();
 674             } else if( r_size != 1 ) { // fat proj
 675               lrg.SUBTRACT( rmask );
 676               lrg.compute_set_mask_size();
 677             } else {            // Common case: size 1 bound removal
 678               if( lrg.mask().Member(r_reg) ) {
 679                 lrg.Remove(r_reg);
 680                 lrg.set_mask_size(lrg.mask().is_AllStack() ? LRG::AllStack_size : old_size - 1);
 681               }
 682             }
 683             // If 'l' goes completely dry, it must spill.
 684             if( lrg.not_free() ) {
 685               // Give 'l' some kind of reasonable mask, so he picks up
 686               // interferences (and will spill later).
 687               lrg.set_mask( old );
 688               lrg.set_mask_size(old_size);
 689               must_spill++;
 690               lrg._must_spill = 1;
 691               lrg.set_reg(OptoReg::Name(LRG::SPILL_REG));
 692             }
 693           }
 694         } // End of if bound
 695 
 696         // Now interference with everything that is live and has
 697         // compatible register sets.
 698         interfere_with_live(r,&liveout);
 699 
 700       } // End of if normal register-allocated value


src/share/vm/opto/ifg.cpp
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