358 for( uint i = 1; i < spill->req(); i++ ) {
359 Node *in = spill->in(i);
360 uint lidx = _lrg_map.find_id(in);
361
362 // Walk backwards thru spill copy node intermediates
363 if (walkThru) {
364 while (in->is_SpillCopy() && lidx >= _lrg_map.max_lrg_id()) {
365 in = in->in(1);
366 lidx = _lrg_map.find_id(in);
367 }
368
369 if (lidx < _lrg_map.max_lrg_id() && lrgs(lidx).is_multidef()) {
370 // walkThru found a multidef LRG, which is unsafe to use, so
371 // just keep the original def used in the clone.
372 in = spill->in(i);
373 lidx = _lrg_map.find_id(in);
374 }
375 }
376
377 if (lidx < _lrg_map.max_lrg_id() && lrgs(lidx).reg() >= LRG::SPILL_REG) {
378 Node *rdef = Reachblock[lrg2reach[lidx]];
379 if (rdef) {
380 spill->set_req(i, rdef);
381 }
382 }
383 }
384 }
385
386
387 assert( spill->out_RegMask().is_UP(), "rematerialize to a reg" );
388 // Rematerialized op is def->spilled+1
389 set_was_spilled(spill);
390 if( _spilled_once.test(def->_idx) )
391 set_was_spilled(spill);
392
393 insert_proj( b, insidx, spill, maxlrg++ );
394 #ifdef ASSERT
395 // Increment the counter for this lrg
396 splits.at_put(slidx, splits.at(slidx)+1);
397 #endif
1319 // Split Phi nodes by placing USE side splits wherever the reaching
1320 // DEF has the wrong UP/DOWN value.
1321 for( uint i = 1; i < b->num_preds(); i++ ) {
1322 // Get predecessor block pre-order number
1323 Block *pred = _cfg.get_block_for_node(b->pred(i));
1324 pidx = pred->_pre_order;
1325 // Grab reaching def
1326 Node *def = Reaches[pidx][slidx];
1327 assert( def, "must have reaching def" );
1328 // If input up/down sense and reg-pressure DISagree
1329 if (def->rematerialize() && contains_no_live_range_input(def)) {
1330 // Place the rematerialized node above any MSCs created during
1331 // phi node splitting. end_idx points at the insertion point
1332 // so look at the node before it.
1333 int insert = pred->end_idx();
1334 while (insert >= 1 &&
1335 pred->get_node(insert - 1)->is_SpillCopy() &&
1336 _lrg_map.find(pred->get_node(insert - 1)) >= lrgs_before_phi_split) {
1337 insert--;
1338 }
1339 def = split_Rematerialize(def, pred, insert, maxlrg, splits, slidx, lrg2reach, Reachblock, false);
1340 if (!def) {
1341 return 0; // Bail out
1342 }
1343 }
1344 // Update the Phi's input edge array
1345 phi->set_req(i,def);
1346 // Grab the UP/DOWN sense for the input
1347 u1 = UP[pidx][slidx];
1348 if( u1 != (phi_up != 0)) {
1349 maxlrg = split_USE(def, b, phi, i, maxlrg, !u1, false, splits,slidx);
1350 // If it wasn't split bail
1351 if (!maxlrg) {
1352 return 0;
1353 }
1354 }
1355 } // End for all inputs to the Phi
1356 } // End for all Phi Nodes
1357 // Update _maxlrg to save Union asserts
1358 _lrg_map.set_max_lrg_id(maxlrg);
1359
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358 for( uint i = 1; i < spill->req(); i++ ) {
359 Node *in = spill->in(i);
360 uint lidx = _lrg_map.find_id(in);
361
362 // Walk backwards thru spill copy node intermediates
363 if (walkThru) {
364 while (in->is_SpillCopy() && lidx >= _lrg_map.max_lrg_id()) {
365 in = in->in(1);
366 lidx = _lrg_map.find_id(in);
367 }
368
369 if (lidx < _lrg_map.max_lrg_id() && lrgs(lidx).is_multidef()) {
370 // walkThru found a multidef LRG, which is unsafe to use, so
371 // just keep the original def used in the clone.
372 in = spill->in(i);
373 lidx = _lrg_map.find_id(in);
374 }
375 }
376
377 if (lidx < _lrg_map.max_lrg_id() && lrgs(lidx).reg() >= LRG::SPILL_REG) {
378 assert(Reachblock != NULL, "Reachblock must be non-NULL");
379 Node *rdef = Reachblock[lrg2reach[lidx]];
380 if (rdef) {
381 spill->set_req(i, rdef);
382 }
383 }
384 }
385 }
386
387
388 assert( spill->out_RegMask().is_UP(), "rematerialize to a reg" );
389 // Rematerialized op is def->spilled+1
390 set_was_spilled(spill);
391 if( _spilled_once.test(def->_idx) )
392 set_was_spilled(spill);
393
394 insert_proj( b, insidx, spill, maxlrg++ );
395 #ifdef ASSERT
396 // Increment the counter for this lrg
397 splits.at_put(slidx, splits.at(slidx)+1);
398 #endif
1320 // Split Phi nodes by placing USE side splits wherever the reaching
1321 // DEF has the wrong UP/DOWN value.
1322 for( uint i = 1; i < b->num_preds(); i++ ) {
1323 // Get predecessor block pre-order number
1324 Block *pred = _cfg.get_block_for_node(b->pred(i));
1325 pidx = pred->_pre_order;
1326 // Grab reaching def
1327 Node *def = Reaches[pidx][slidx];
1328 assert( def, "must have reaching def" );
1329 // If input up/down sense and reg-pressure DISagree
1330 if (def->rematerialize() && contains_no_live_range_input(def)) {
1331 // Place the rematerialized node above any MSCs created during
1332 // phi node splitting. end_idx points at the insertion point
1333 // so look at the node before it.
1334 int insert = pred->end_idx();
1335 while (insert >= 1 &&
1336 pred->get_node(insert - 1)->is_SpillCopy() &&
1337 _lrg_map.find(pred->get_node(insert - 1)) >= lrgs_before_phi_split) {
1338 insert--;
1339 }
1340 // since the def cannot contain any live range input, we can pass in NULL as Reachlock parameter
1341 def = split_Rematerialize(def, pred, insert, maxlrg, splits, slidx, lrg2reach, NULL, false);
1342 if (!def) {
1343 return 0; // Bail out
1344 }
1345 }
1346 // Update the Phi's input edge array
1347 phi->set_req(i,def);
1348 // Grab the UP/DOWN sense for the input
1349 u1 = UP[pidx][slidx];
1350 if( u1 != (phi_up != 0)) {
1351 maxlrg = split_USE(def, b, phi, i, maxlrg, !u1, false, splits,slidx);
1352 // If it wasn't split bail
1353 if (!maxlrg) {
1354 return 0;
1355 }
1356 }
1357 } // End for all inputs to the Phi
1358 } // End for all Phi Nodes
1359 // Update _maxlrg to save Union asserts
1360 _lrg_map.set_max_lrg_id(maxlrg);
1361
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