1 /* 2 * Copyright (c) 1998, 2012, Oracle and/or its affiliates. All rights reserved. 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 4 * 5 * This code is free software; you can redistribute it and/or modify it 6 * under the terms of the GNU General Public License version 2 only, as 7 * published by the Free Software Foundation. 8 * 9 * This code is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 12 * version 2 for more details (a copy is included in the LICENSE file that 13 * accompanied this code). 14 * 15 * You should have received a copy of the GNU General Public License version 16 * 2 along with this work; if not, write to the Free Software Foundation, 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 18 * 19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA 20 * or visit www.oracle.com if you need additional information or have any 21 * questions. 22 * 23 */ 24 25 #include "precompiled.hpp" 26 #include "memory/allocation.inline.hpp" 27 #include "opto/chaitin.hpp" 28 #include "opto/machnode.hpp" 29 30 // See if this register (or pairs, or vector) already contains the value. 31 static bool register_contains_value(Node* val, OptoReg::Name reg, int n_regs, 32 Node_List& value) { 33 for (int i = 0; i < n_regs; i++) { 34 OptoReg::Name nreg = OptoReg::add(reg,-i); 35 if (value[nreg] != val) 36 return false; 37 } 38 return true; 39 } 40 41 //---------------------------may_be_copy_of_callee----------------------------- 42 // Check to see if we can possibly be a copy of a callee-save value. 43 bool PhaseChaitin::may_be_copy_of_callee( Node *def ) const { 44 // Short circuit if there are no callee save registers 45 if (_matcher.number_of_saved_registers() == 0) return false; 46 47 // Expect only a spill-down and reload on exit for callee-save spills. 48 // Chains of copies cannot be deep. 49 // 5008997 - This is wishful thinking. Register allocator seems to 50 // be splitting live ranges for callee save registers to such 51 // an extent that in large methods the chains can be very long 52 // (50+). The conservative answer is to return true if we don't 53 // know as this prevents optimizations from occurring. 54 55 const int limit = 60; 56 int i; 57 for( i=0; i < limit; i++ ) { 58 if( def->is_Proj() && def->in(0)->is_Start() && 59 _matcher.is_save_on_entry(lrgs(_lrg_map.live_range_id(def)).reg())) 60 return true; // Direct use of callee-save proj 61 if( def->is_Copy() ) // Copies carry value through 62 def = def->in(def->is_Copy()); 63 else if( def->is_Phi() ) // Phis can merge it from any direction 64 def = def->in(1); 65 else 66 break; 67 guarantee(def != NULL, "must not resurrect dead copy"); 68 } 69 // If we reached the end and didn't find a callee save proj 70 // then this may be a callee save proj so we return true 71 // as the conservative answer. If we didn't reach then end 72 // we must have discovered that it was not a callee save 73 // else we would have returned. 74 return i == limit; 75 } 76 77 //------------------------------yank----------------------------------- 78 // Helper function for yank_if_dead 79 int PhaseChaitin::yank( Node *old, Block *current_block, Node_List *value, Node_List *regnd ) { 80 int blk_adjust=0; 81 Block *oldb = _cfg._bbs[old->_idx]; 82 oldb->find_remove(old); 83 // Count 1 if deleting an instruction from the current block 84 if( oldb == current_block ) blk_adjust++; 85 _cfg._bbs.map(old->_idx,NULL); 86 OptoReg::Name old_reg = lrgs(_lrg_map.live_range_id(old)).reg(); 87 if( regnd && (*regnd)[old_reg]==old ) { // Instruction is currently available? 88 value->map(old_reg,NULL); // Yank from value/regnd maps 89 regnd->map(old_reg,NULL); // This register's value is now unknown 90 } 91 return blk_adjust; 92 } 93 94 #ifdef ASSERT 95 static bool expected_yanked_node(Node *old, Node *orig_old) { 96 // This code is expected only next original nodes: 97 // - load from constant table node which may have next data input nodes: 98 // MachConstantBase, Phi, MachTemp, MachSpillCopy 99 // - load constant node which may have next data input nodes: 100 // MachTemp, MachSpillCopy 101 // - MachSpillCopy 102 // - MachProj and Copy dead nodes 103 if (old->is_MachSpillCopy()) { 104 return true; 105 } else if (old->is_Con()) { 106 return true; 107 } else if (old->is_MachProj()) { // Dead kills projection of Con node 108 return (old == orig_old); 109 } else if (old->is_Copy()) { // Dead copy of a callee-save value 110 return (old == orig_old); 111 } else if (old->is_MachTemp()) { 112 return orig_old->is_Con(); 113 } else if (old->is_Phi() || old->is_MachConstantBase()) { 114 return (orig_old->is_Con() && orig_old->is_MachConstant()); 115 } 116 return false; 117 } 118 #endif 119 120 //------------------------------yank_if_dead----------------------------------- 121 // Removed edges from 'old'. Yank if dead. Return adjustment counts to 122 // iterators in the current block. 123 int PhaseChaitin::yank_if_dead_recurse(Node *old, Node *orig_old, Block *current_block, 124 Node_List *value, Node_List *regnd) { 125 int blk_adjust=0; 126 if (old->outcnt() == 0 && old != C->top()) { 127 #ifdef ASSERT 128 if (!expected_yanked_node(old, orig_old)) { 129 tty->print_cr("=============================================="); 130 tty->print_cr("orig_old:"); 131 orig_old->dump(); 132 tty->print_cr("old:"); 133 old->dump(); 134 assert(false, "unexpected yanked node"); 135 } 136 if (old->is_Con()) 137 orig_old = old; // Reset to satisfy expected nodes checks. 138 #endif 139 blk_adjust += yank(old, current_block, value, regnd); 140 141 for (uint i = 1; i < old->req(); i++) { 142 Node* n = old->in(i); 143 if (n != NULL) { 144 old->set_req(i, NULL); 145 blk_adjust += yank_if_dead_recurse(n, orig_old, current_block, value, regnd); 146 } 147 } 148 // Disconnect control and remove precedence edges if any exist 149 old->disconnect_inputs(NULL, C); 150 } 151 return blk_adjust; 152 } 153 154 //------------------------------use_prior_register----------------------------- 155 // Use the prior value instead of the current value, in an effort to make 156 // the current value go dead. Return block iterator adjustment, in case 157 // we yank some instructions from this block. 158 int PhaseChaitin::use_prior_register( Node *n, uint idx, Node *def, Block *current_block, Node_List &value, Node_List ®nd ) { 159 // No effect? 160 if( def == n->in(idx) ) return 0; 161 // Def is currently dead and can be removed? Do not resurrect 162 if( def->outcnt() == 0 ) return 0; 163 164 // Not every pair of physical registers are assignment compatible, 165 // e.g. on sparc floating point registers are not assignable to integer 166 // registers. 167 const LRG &def_lrg = lrgs(_lrg_map.live_range_id(def)); 168 OptoReg::Name def_reg = def_lrg.reg(); 169 const RegMask &use_mask = n->in_RegMask(idx); 170 bool can_use = ( RegMask::can_represent(def_reg) ? (use_mask.Member(def_reg) != 0) 171 : (use_mask.is_AllStack() != 0)); 172 if (!RegMask::is_vector(def->ideal_reg())) { 173 // Check for a copy to or from a misaligned pair. 174 // It is workaround for a sparc with misaligned pairs. 175 can_use = can_use && !use_mask.is_misaligned_pair() && !def_lrg.mask().is_misaligned_pair(); 176 } 177 if (!can_use) 178 return 0; 179 180 // Capture the old def in case it goes dead... 181 Node *old = n->in(idx); 182 183 // Save-on-call copies can only be elided if the entire copy chain can go 184 // away, lest we get the same callee-save value alive in 2 locations at 185 // once. We check for the obvious trivial case here. Although it can 186 // sometimes be elided with cooperation outside our scope, here we will just 187 // miss the opportunity. :-( 188 if( may_be_copy_of_callee(def) ) { 189 if( old->outcnt() > 1 ) return 0; // We're the not last user 190 int idx = old->is_Copy(); 191 assert( idx, "chain of copies being removed" ); 192 Node *old2 = old->in(idx); // Chain of copies 193 if( old2->outcnt() > 1 ) return 0; // old is not the last user 194 int idx2 = old2->is_Copy(); 195 if( !idx2 ) return 0; // Not a chain of 2 copies 196 if( def != old2->in(idx2) ) return 0; // Chain of exactly 2 copies 197 } 198 199 // Use the new def 200 n->set_req(idx,def); 201 _post_alloc++; 202 203 // Is old def now dead? We successfully yanked a copy? 204 return yank_if_dead(old,current_block,&value,®nd); 205 } 206 207 208 //------------------------------skip_copies------------------------------------ 209 // Skip through any number of copies (that don't mod oop-i-ness) 210 Node *PhaseChaitin::skip_copies( Node *c ) { 211 int idx = c->is_Copy(); 212 uint is_oop = lrgs(_lrg_map.live_range_id(c))._is_oop; 213 while (idx != 0) { 214 guarantee(c->in(idx) != NULL, "must not resurrect dead copy"); 215 if (lrgs(_lrg_map.live_range_id(c->in(idx)))._is_oop != is_oop) { 216 break; // casting copy, not the same value 217 } 218 c = c->in(idx); 219 idx = c->is_Copy(); 220 } 221 return c; 222 } 223 224 //------------------------------elide_copy------------------------------------- 225 // Remove (bypass) copies along Node n, edge k. 226 int PhaseChaitin::elide_copy( Node *n, int k, Block *current_block, Node_List &value, Node_List ®nd, bool can_change_regs ) { 227 int blk_adjust = 0; 228 229 uint nk_idx = _lrg_map.live_range_id(n->in(k)); 230 OptoReg::Name nk_reg = lrgs(nk_idx).reg(); 231 232 // Remove obvious same-register copies 233 Node *x = n->in(k); 234 int idx; 235 while( (idx=x->is_Copy()) != 0 ) { 236 Node *copy = x->in(idx); 237 guarantee(copy != NULL, "must not resurrect dead copy"); 238 if(lrgs(_lrg_map.live_range_id(copy)).reg() != nk_reg) { 239 break; 240 } 241 blk_adjust += use_prior_register(n,k,copy,current_block,value,regnd); 242 if (n->in(k) != copy) { 243 break; // Failed for some cutout? 244 } 245 x = copy; // Progress, try again 246 } 247 248 // Phis and 2-address instructions cannot change registers so easily - their 249 // outputs must match their input. 250 if( !can_change_regs ) 251 return blk_adjust; // Only check stupid copies! 252 253 // Loop backedges won't have a value-mapping yet 254 if( &value == NULL ) return blk_adjust; 255 256 // Skip through all copies to the _value_ being used. Do not change from 257 // int to pointer. This attempts to jump through a chain of copies, where 258 // intermediate copies might be illegal, i.e., value is stored down to stack 259 // then reloaded BUT survives in a register the whole way. 260 Node *val = skip_copies(n->in(k)); 261 262 if (val == x && nk_idx != 0 && 263 regnd[nk_reg] != NULL && regnd[nk_reg] != x && 264 _lrg_map.live_range_id(x) == _lrg_map.live_range_id(regnd[nk_reg])) { 265 // When rematerialzing nodes and stretching lifetimes, the 266 // allocator will reuse the original def for multidef LRG instead 267 // of the current reaching def because it can't know it's safe to 268 // do so. After allocation completes if they are in the same LRG 269 // then it should use the current reaching def instead. 270 n->set_req(k, regnd[nk_reg]); 271 blk_adjust += yank_if_dead(val, current_block, &value, ®nd); 272 val = skip_copies(n->in(k)); 273 } 274 275 if (val == x) return blk_adjust; // No progress? 276 277 int n_regs = RegMask::num_registers(val->ideal_reg()); 278 uint val_idx = _lrg_map.live_range_id(val); 279 OptoReg::Name val_reg = lrgs(val_idx).reg(); 280 281 // See if it happens to already be in the correct register! 282 // (either Phi's direct register, or the common case of the name 283 // never-clobbered original-def register) 284 if (register_contains_value(val, val_reg, n_regs, value)) { 285 blk_adjust += use_prior_register(n,k,regnd[val_reg],current_block,value,regnd); 286 if( n->in(k) == regnd[val_reg] ) // Success! Quit trying 287 return blk_adjust; 288 } 289 290 // See if we can skip the copy by changing registers. Don't change from 291 // using a register to using the stack unless we know we can remove a 292 // copy-load. Otherwise we might end up making a pile of Intel cisc-spill 293 // ops reading from memory instead of just loading once and using the 294 // register. 295 296 // Also handle duplicate copies here. 297 const Type *t = val->is_Con() ? val->bottom_type() : NULL; 298 299 // Scan all registers to see if this value is around already 300 for( uint reg = 0; reg < (uint)_max_reg; reg++ ) { 301 if (reg == (uint)nk_reg) { 302 // Found ourselves so check if there is only one user of this 303 // copy and keep on searching for a better copy if so. 304 bool ignore_self = true; 305 x = n->in(k); 306 DUIterator_Fast imax, i = x->fast_outs(imax); 307 Node* first = x->fast_out(i); i++; 308 while (i < imax && ignore_self) { 309 Node* use = x->fast_out(i); i++; 310 if (use != first) ignore_self = false; 311 } 312 if (ignore_self) continue; 313 } 314 315 Node *vv = value[reg]; 316 if (n_regs > 1) { // Doubles and vectors check for aligned-adjacent set 317 uint last = (n_regs-1); // Looking for the last part of a set 318 if ((reg&last) != last) continue; // Wrong part of a set 319 if (!register_contains_value(vv, reg, n_regs, value)) continue; // Different value 320 } 321 if( vv == val || // Got a direct hit? 322 (t && vv && vv->bottom_type() == t && vv->is_Mach() && 323 vv->as_Mach()->rule() == val->as_Mach()->rule()) ) { // Or same constant? 324 assert( !n->is_Phi(), "cannot change registers at a Phi so easily" ); 325 if( OptoReg::is_stack(nk_reg) || // CISC-loading from stack OR 326 OptoReg::is_reg(reg) || // turning into a register use OR 327 regnd[reg]->outcnt()==1 ) { // last use of a spill-load turns into a CISC use 328 blk_adjust += use_prior_register(n,k,regnd[reg],current_block,value,regnd); 329 if( n->in(k) == regnd[reg] ) // Success! Quit trying 330 return blk_adjust; 331 } // End of if not degrading to a stack 332 } // End of if found value in another register 333 } // End of scan all machine registers 334 return blk_adjust; 335 } 336 337 338 // 339 // Check if nreg already contains the constant value val. Normal copy 340 // elimination doesn't doesn't work on constants because multiple 341 // nodes can represent the same constant so the type and rule of the 342 // MachNode must be checked to ensure equivalence. 343 // 344 bool PhaseChaitin::eliminate_copy_of_constant(Node* val, Node* n, 345 Block *current_block, 346 Node_List& value, Node_List& regnd, 347 OptoReg::Name nreg, OptoReg::Name nreg2) { 348 if (value[nreg] != val && val->is_Con() && 349 value[nreg] != NULL && value[nreg]->is_Con() && 350 (nreg2 == OptoReg::Bad || value[nreg] == value[nreg2]) && 351 value[nreg]->bottom_type() == val->bottom_type() && 352 value[nreg]->as_Mach()->rule() == val->as_Mach()->rule()) { 353 // This code assumes that two MachNodes representing constants 354 // which have the same rule and the same bottom type will produce 355 // identical effects into a register. This seems like it must be 356 // objectively true unless there are hidden inputs to the nodes 357 // but if that were to change this code would need to updated. 358 // Since they are equivalent the second one if redundant and can 359 // be removed. 360 // 361 // n will be replaced with the old value but n might have 362 // kills projections associated with it so remove them now so that 363 // yank_if_dead will be able to eliminate the copy once the uses 364 // have been transferred to the old[value]. 365 for (DUIterator_Fast imax, i = n->fast_outs(imax); i < imax; i++) { 366 Node* use = n->fast_out(i); 367 if (use->is_Proj() && use->outcnt() == 0) { 368 // Kill projections have no users and one input 369 use->set_req(0, C->top()); 370 yank_if_dead(use, current_block, &value, ®nd); 371 --i; --imax; 372 } 373 } 374 _post_alloc++; 375 return true; 376 } 377 return false; 378 } 379 380 381 //------------------------------post_allocate_copy_removal--------------------- 382 // Post-Allocation peephole copy removal. We do this in 1 pass over the 383 // basic blocks. We maintain a mapping of registers to Nodes (an array of 384 // Nodes indexed by machine register or stack slot number). NULL means that a 385 // register is not mapped to any Node. We can (want to have!) have several 386 // registers map to the same Node. We walk forward over the instructions 387 // updating the mapping as we go. At merge points we force a NULL if we have 388 // to merge 2 different Nodes into the same register. Phi functions will give 389 // us a new Node if there is a proper value merging. Since the blocks are 390 // arranged in some RPO, we will visit all parent blocks before visiting any 391 // successor blocks (except at loops). 392 // 393 // If we find a Copy we look to see if the Copy's source register is a stack 394 // slot and that value has already been loaded into some machine register; if 395 // so we use machine register directly. This turns a Load into a reg-reg 396 // Move. We also look for reloads of identical constants. 397 // 398 // When we see a use from a reg-reg Copy, we will attempt to use the copy's 399 // source directly and make the copy go dead. 400 void PhaseChaitin::post_allocate_copy_removal() { 401 NOT_PRODUCT( Compile::TracePhase t3("postAllocCopyRemoval", &_t_postAllocCopyRemoval, TimeCompiler); ) 402 ResourceMark rm; 403 404 // Need a mapping from basic block Node_Lists. We need a Node_List to 405 // map from register number to value-producing Node. 406 Node_List **blk2value = NEW_RESOURCE_ARRAY( Node_List *, _cfg._num_blocks+1); 407 memset( blk2value, 0, sizeof(Node_List*)*(_cfg._num_blocks+1) ); 408 // Need a mapping from basic block Node_Lists. We need a Node_List to 409 // map from register number to register-defining Node. 410 Node_List **blk2regnd = NEW_RESOURCE_ARRAY( Node_List *, _cfg._num_blocks+1); 411 memset( blk2regnd, 0, sizeof(Node_List*)*(_cfg._num_blocks+1) ); 412 413 // We keep unused Node_Lists on a free_list to avoid wasting 414 // memory. 415 GrowableArray<Node_List*> free_list = GrowableArray<Node_List*>(16); 416 417 // For all blocks 418 for( uint i = 0; i < _cfg._num_blocks; i++ ) { 419 uint j; 420 Block *b = _cfg._blocks[i]; 421 422 // Count of Phis in block 423 uint phi_dex; 424 for( phi_dex = 1; phi_dex < b->_nodes.size(); phi_dex++ ) { 425 Node *phi = b->_nodes[phi_dex]; 426 if( !phi->is_Phi() ) 427 break; 428 } 429 430 // If any predecessor has not been visited, we do not know the state 431 // of registers at the start. Check for this, while updating copies 432 // along Phi input edges 433 bool missing_some_inputs = false; 434 Block *freed = NULL; 435 for( j = 1; j < b->num_preds(); j++ ) { 436 Block *pb = _cfg._bbs[b->pred(j)->_idx]; 437 // Remove copies along phi edges 438 for( uint k=1; k<phi_dex; k++ ) 439 elide_copy( b->_nodes[k], j, b, *blk2value[pb->_pre_order], *blk2regnd[pb->_pre_order], false ); 440 if( blk2value[pb->_pre_order] ) { // Have a mapping on this edge? 441 // See if this predecessor's mappings have been used by everybody 442 // who wants them. If so, free 'em. 443 uint k; 444 for( k=0; k<pb->_num_succs; k++ ) { 445 Block *pbsucc = pb->_succs[k]; 446 if( !blk2value[pbsucc->_pre_order] && pbsucc != b ) 447 break; // Found a future user 448 } 449 if( k >= pb->_num_succs ) { // No more uses, free! 450 freed = pb; // Record last block freed 451 free_list.push(blk2value[pb->_pre_order]); 452 free_list.push(blk2regnd[pb->_pre_order]); 453 } 454 } else { // This block has unvisited (loopback) inputs 455 missing_some_inputs = true; 456 } 457 } 458 459 460 // Extract Node_List mappings. If 'freed' is non-zero, we just popped 461 // 'freed's blocks off the list 462 Node_List ®nd = *(free_list.is_empty() ? new Node_List() : free_list.pop()); 463 Node_List &value = *(free_list.is_empty() ? new Node_List() : free_list.pop()); 464 assert( !freed || blk2value[freed->_pre_order] == &value, "" ); 465 value.map(_max_reg,NULL); 466 regnd.map(_max_reg,NULL); 467 // Set mappings as OUR mappings 468 blk2value[b->_pre_order] = &value; 469 blk2regnd[b->_pre_order] = ®nd; 470 471 // Initialize value & regnd for this block 472 if( missing_some_inputs ) { 473 // Some predecessor has not yet been visited; zap map to empty 474 for( uint k = 0; k < (uint)_max_reg; k++ ) { 475 value.map(k,NULL); 476 regnd.map(k,NULL); 477 } 478 } else { 479 if( !freed ) { // Didn't get a freebie prior block 480 // Must clone some data 481 freed = _cfg._bbs[b->pred(1)->_idx]; 482 Node_List &f_value = *blk2value[freed->_pre_order]; 483 Node_List &f_regnd = *blk2regnd[freed->_pre_order]; 484 for( uint k = 0; k < (uint)_max_reg; k++ ) { 485 value.map(k,f_value[k]); 486 regnd.map(k,f_regnd[k]); 487 } 488 } 489 // Merge all inputs together, setting to NULL any conflicts. 490 for( j = 1; j < b->num_preds(); j++ ) { 491 Block *pb = _cfg._bbs[b->pred(j)->_idx]; 492 if( pb == freed ) continue; // Did self already via freelist 493 Node_List &p_regnd = *blk2regnd[pb->_pre_order]; 494 for( uint k = 0; k < (uint)_max_reg; k++ ) { 495 if( regnd[k] != p_regnd[k] ) { // Conflict on reaching defs? 496 value.map(k,NULL); // Then no value handy 497 regnd.map(k,NULL); 498 } 499 } 500 } 501 } 502 503 // For all Phi's 504 for( j = 1; j < phi_dex; j++ ) { 505 uint k; 506 Node *phi = b->_nodes[j]; 507 uint pidx = _lrg_map.live_range_id(phi); 508 OptoReg::Name preg = lrgs(_lrg_map.live_range_id(phi)).reg(); 509 510 // Remove copies remaining on edges. Check for junk phi. 511 Node *u = NULL; 512 for (k = 1; k < phi->req(); k++) { 513 Node *x = phi->in(k); 514 if( phi != x && u != x ) // Found a different input 515 u = u ? NodeSentinel : x; // Capture unique input, or NodeSentinel for 2nd input 516 } 517 if( u != NodeSentinel ) { // Junk Phi. Remove 518 b->_nodes.remove(j--); phi_dex--; 519 _cfg._bbs.map(phi->_idx,NULL); 520 phi->replace_by(u); 521 phi->disconnect_inputs(NULL, C); 522 continue; 523 } 524 // Note that if value[pidx] exists, then we merged no new values here 525 // and the phi is useless. This can happen even with the above phi 526 // removal for complex flows. I cannot keep the better known value here 527 // because locally the phi appears to define a new merged value. If I 528 // keep the better value then a copy of the phi, being unable to use the 529 // global flow analysis, can't "peek through" the phi to the original 530 // reaching value and so will act like it's defining a new value. This 531 // can lead to situations where some uses are from the old and some from 532 // the new values. Not illegal by itself but throws the over-strong 533 // assert in scheduling. 534 if( pidx ) { 535 value.map(preg,phi); 536 regnd.map(preg,phi); 537 int n_regs = RegMask::num_registers(phi->ideal_reg()); 538 for (int l = 1; l < n_regs; l++) { 539 OptoReg::Name preg_lo = OptoReg::add(preg,-l); 540 value.map(preg_lo,phi); 541 regnd.map(preg_lo,phi); 542 } 543 } 544 } 545 546 // For all remaining instructions 547 for( j = phi_dex; j < b->_nodes.size(); j++ ) { 548 Node *n = b->_nodes[j]; 549 550 if( n->outcnt() == 0 && // Dead? 551 n != C->top() && // (ignore TOP, it has no du info) 552 !n->is_Proj() ) { // fat-proj kills 553 j -= yank_if_dead(n,b,&value,®nd); 554 continue; 555 } 556 557 // Improve reaching-def info. Occasionally post-alloc's liveness gives 558 // up (at loop backedges, because we aren't doing a full flow pass). 559 // The presence of a live use essentially asserts that the use's def is 560 // alive and well at the use (or else the allocator fubar'd). Take 561 // advantage of this info to set a reaching def for the use-reg. 562 uint k; 563 for (k = 1; k < n->req(); k++) { 564 Node *def = n->in(k); // n->in(k) is a USE; def is the DEF for this USE 565 guarantee(def != NULL, "no disconnected nodes at this point"); 566 uint useidx = _lrg_map.live_range_id(def); // useidx is the live range index for this USE 567 568 if( useidx ) { 569 OptoReg::Name ureg = lrgs(useidx).reg(); 570 if( !value[ureg] ) { 571 int idx; // Skip occasional useless copy 572 while( (idx=def->is_Copy()) != 0 && 573 def->in(idx) != NULL && // NULL should not happen 574 ureg == lrgs(_lrg_map.live_range_id(def->in(idx))).reg()) 575 def = def->in(idx); 576 Node *valdef = skip_copies(def); // tighten up val through non-useless copies 577 value.map(ureg,valdef); // record improved reaching-def info 578 regnd.map(ureg, def); 579 // Record other half of doubles 580 uint def_ideal_reg = def->ideal_reg(); 581 int n_regs = RegMask::num_registers(def_ideal_reg); 582 for (int l = 1; l < n_regs; l++) { 583 OptoReg::Name ureg_lo = OptoReg::add(ureg,-l); 584 if (!value[ureg_lo] && 585 (!RegMask::can_represent(ureg_lo) || 586 lrgs(useidx).mask().Member(ureg_lo))) { // Nearly always adjacent 587 value.map(ureg_lo,valdef); // record improved reaching-def info 588 regnd.map(ureg_lo, def); 589 } 590 } 591 } 592 } 593 } 594 595 const uint two_adr = n->is_Mach() ? n->as_Mach()->two_adr() : 0; 596 597 // Remove copies along input edges 598 for( k = 1; k < n->req(); k++ ) 599 j -= elide_copy( n, k, b, value, regnd, two_adr!=k ); 600 601 // Unallocated Nodes define no registers 602 uint lidx = _lrg_map.live_range_id(n); 603 if (!lidx) { 604 continue; 605 } 606 607 // Update the register defined by this instruction 608 OptoReg::Name nreg = lrgs(lidx).reg(); 609 // Skip through all copies to the _value_ being defined. 610 // Do not change from int to pointer 611 Node *val = skip_copies(n); 612 613 // Clear out a dead definition before starting so that the 614 // elimination code doesn't have to guard against it. The 615 // definition could in fact be a kill projection with a count of 616 // 0 which is safe but since those are uninteresting for copy 617 // elimination just delete them as well. 618 if (regnd[nreg] != NULL && regnd[nreg]->outcnt() == 0) { 619 regnd.map(nreg, NULL); 620 value.map(nreg, NULL); 621 } 622 623 uint n_ideal_reg = n->ideal_reg(); 624 int n_regs = RegMask::num_registers(n_ideal_reg); 625 if (n_regs == 1) { 626 // If Node 'n' does not change the value mapped by the register, 627 // then 'n' is a useless copy. Do not update the register->node 628 // mapping so 'n' will go dead. 629 if( value[nreg] != val ) { 630 if (eliminate_copy_of_constant(val, n, b, value, regnd, nreg, OptoReg::Bad)) { 631 j -= replace_and_yank_if_dead(n, nreg, b, value, regnd); 632 } else { 633 // Update the mapping: record new Node defined by the register 634 regnd.map(nreg,n); 635 // Update mapping for defined *value*, which is the defined 636 // Node after skipping all copies. 637 value.map(nreg,val); 638 } 639 } else if( !may_be_copy_of_callee(n) ) { 640 assert( n->is_Copy(), "" ); 641 j -= replace_and_yank_if_dead(n, nreg, b, value, regnd); 642 } 643 } else if (RegMask::is_vector(n_ideal_reg)) { 644 // If Node 'n' does not change the value mapped by the register, 645 // then 'n' is a useless copy. Do not update the register->node 646 // mapping so 'n' will go dead. 647 if (!register_contains_value(val, nreg, n_regs, value)) { 648 // Update the mapping: record new Node defined by the register 649 regnd.map(nreg,n); 650 // Update mapping for defined *value*, which is the defined 651 // Node after skipping all copies. 652 value.map(nreg,val); 653 for (int l = 1; l < n_regs; l++) { 654 OptoReg::Name nreg_lo = OptoReg::add(nreg,-l); 655 regnd.map(nreg_lo, n ); 656 value.map(nreg_lo,val); 657 } 658 } else if (n->is_Copy()) { 659 // Note: vector can't be constant and can't be copy of calee. 660 j -= replace_and_yank_if_dead(n, nreg, b, value, regnd); 661 } 662 } else { 663 // If the value occupies a register pair, record same info 664 // in both registers. 665 OptoReg::Name nreg_lo = OptoReg::add(nreg,-1); 666 if( RegMask::can_represent(nreg_lo) && // Either a spill slot, or 667 !lrgs(lidx).mask().Member(nreg_lo) ) { // Nearly always adjacent 668 // Sparc occasionally has non-adjacent pairs. 669 // Find the actual other value 670 RegMask tmp = lrgs(lidx).mask(); 671 tmp.Remove(nreg); 672 nreg_lo = tmp.find_first_elem(); 673 } 674 if( value[nreg] != val || value[nreg_lo] != val ) { 675 if (eliminate_copy_of_constant(val, n, b, value, regnd, nreg, nreg_lo)) { 676 j -= replace_and_yank_if_dead(n, nreg, b, value, regnd); 677 } else { 678 regnd.map(nreg , n ); 679 regnd.map(nreg_lo, n ); 680 value.map(nreg ,val); 681 value.map(nreg_lo,val); 682 } 683 } else if( !may_be_copy_of_callee(n) ) { 684 assert( n->is_Copy(), "" ); 685 j -= replace_and_yank_if_dead(n, nreg, b, value, regnd); 686 } 687 } 688 689 // Fat projections kill many registers 690 if( n_ideal_reg == MachProjNode::fat_proj ) { 691 RegMask rm = n->out_RegMask(); 692 // wow, what an expensive iterator... 693 nreg = rm.find_first_elem(); 694 while( OptoReg::is_valid(nreg)) { 695 rm.Remove(nreg); 696 value.map(nreg,n); 697 regnd.map(nreg,n); 698 nreg = rm.find_first_elem(); 699 } 700 } 701 702 } // End of for all instructions in the block 703 704 } // End for all blocks 705 }