1 /*
2 * Copyright (c) 1998, 2012, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "precompiled.hpp"
26 #include "memory/allocation.inline.hpp"
27 #include "opto/chaitin.hpp"
28 #include "opto/machnode.hpp"
29
30 // See if this register (or pairs, or vector) already contains the value.
31 static bool register_contains_value(Node* val, OptoReg::Name reg, int n_regs,
32 Node_List& value) {
33 for (int i = 0; i < n_regs; i++) {
34 OptoReg::Name nreg = OptoReg::add(reg,-i);
35 if (value[nreg] != val)
36 return false;
37 }
38 return true;
39 }
40
41 //---------------------------may_be_copy_of_callee-----------------------------
42 // Check to see if we can possibly be a copy of a callee-save value.
43 bool PhaseChaitin::may_be_copy_of_callee( Node *def ) const {
44 // Short circuit if there are no callee save registers
45 if (_matcher.number_of_saved_registers() == 0) return false;
46
47 // Expect only a spill-down and reload on exit for callee-save spills.
48 // Chains of copies cannot be deep.
49 // 5008997 - This is wishful thinking. Register allocator seems to
50 // be splitting live ranges for callee save registers to such
51 // an extent that in large methods the chains can be very long
52 // (50+). The conservative answer is to return true if we don't
53 // know as this prevents optimizations from occurring.
54
55 const int limit = 60;
56 int i;
57 for( i=0; i < limit; i++ ) {
58 if( def->is_Proj() && def->in(0)->is_Start() &&
59 _matcher.is_save_on_entry(lrgs(_lrg_map.live_range_id(def)).reg()))
60 return true; // Direct use of callee-save proj
61 if( def->is_Copy() ) // Copies carry value through
62 def = def->in(def->is_Copy());
63 else if( def->is_Phi() ) // Phis can merge it from any direction
64 def = def->in(1);
65 else
66 break;
67 guarantee(def != NULL, "must not resurrect dead copy");
68 }
69 // If we reached the end and didn't find a callee save proj
70 // then this may be a callee save proj so we return true
71 // as the conservative answer. If we didn't reach then end
72 // we must have discovered that it was not a callee save
73 // else we would have returned.
74 return i == limit;
75 }
76
77 //------------------------------yank-----------------------------------
78 // Helper function for yank_if_dead
79 int PhaseChaitin::yank( Node *old, Block *current_block, Node_List *value, Node_List *regnd ) {
80 int blk_adjust=0;
81 Block *oldb = _cfg.get_block_for_node(old);
82 oldb->find_remove(old);
83 // Count 1 if deleting an instruction from the current block
84 if (oldb == current_block) {
85 blk_adjust++;
86 }
87 _cfg.unmap_node_from_block(old);
88 OptoReg::Name old_reg = lrgs(_lrg_map.live_range_id(old)).reg();
89 if( regnd && (*regnd)[old_reg]==old ) { // Instruction is currently available?
90 value->map(old_reg,NULL); // Yank from value/regnd maps
91 regnd->map(old_reg,NULL); // This register's value is now unknown
92 }
93 return blk_adjust;
94 }
95
96 #ifdef ASSERT
97 static bool expected_yanked_node(Node *old, Node *orig_old) {
98 // This code is expected only next original nodes:
99 // - load from constant table node which may have next data input nodes:
100 // MachConstantBase, Phi, MachTemp, MachSpillCopy
101 // - load constant node which may have next data input nodes:
102 // MachTemp, MachSpillCopy
103 // - MachSpillCopy
104 // - MachProj and Copy dead nodes
105 if (old->is_MachSpillCopy()) {
106 return true;
107 } else if (old->is_Con()) {
108 return true;
109 } else if (old->is_MachProj()) { // Dead kills projection of Con node
110 return (old == orig_old);
111 } else if (old->is_Copy()) { // Dead copy of a callee-save value
112 return (old == orig_old);
113 } else if (old->is_MachTemp()) {
114 return orig_old->is_Con();
115 } else if (old->is_Phi() || old->is_MachConstantBase()) {
116 return (orig_old->is_Con() && orig_old->is_MachConstant());
117 }
118 return false;
119 }
120 #endif
121
122 //------------------------------yank_if_dead-----------------------------------
123 // Removed edges from 'old'. Yank if dead. Return adjustment counts to
124 // iterators in the current block.
125 int PhaseChaitin::yank_if_dead_recurse(Node *old, Node *orig_old, Block *current_block,
126 Node_List *value, Node_List *regnd) {
127 int blk_adjust=0;
128 if (old->outcnt() == 0 && old != C->top()) {
129 #ifdef ASSERT
130 if (!expected_yanked_node(old, orig_old)) {
131 tty->print_cr("==============================================");
132 tty->print_cr("orig_old:");
133 orig_old->dump();
134 tty->print_cr("old:");
135 old->dump();
136 assert(false, "unexpected yanked node");
137 }
138 if (old->is_Con())
139 orig_old = old; // Reset to satisfy expected nodes checks.
140 #endif
141 blk_adjust += yank(old, current_block, value, regnd);
142
143 for (uint i = 1; i < old->req(); i++) {
144 Node* n = old->in(i);
145 if (n != NULL) {
146 old->set_req(i, NULL);
147 blk_adjust += yank_if_dead_recurse(n, orig_old, current_block, value, regnd);
148 }
149 }
150 // Disconnect control and remove precedence edges if any exist
151 old->disconnect_inputs(NULL, C);
152 }
153 return blk_adjust;
154 }
155
156 //------------------------------use_prior_register-----------------------------
157 // Use the prior value instead of the current value, in an effort to make
158 // the current value go dead. Return block iterator adjustment, in case
159 // we yank some instructions from this block.
160 int PhaseChaitin::use_prior_register( Node *n, uint idx, Node *def, Block *current_block, Node_List &value, Node_List ®nd ) {
161 // No effect?
162 if( def == n->in(idx) ) return 0;
163 // Def is currently dead and can be removed? Do not resurrect
164 if( def->outcnt() == 0 ) return 0;
165
166 // Not every pair of physical registers are assignment compatible,
167 // e.g. on sparc floating point registers are not assignable to integer
168 // registers.
169 const LRG &def_lrg = lrgs(_lrg_map.live_range_id(def));
170 OptoReg::Name def_reg = def_lrg.reg();
171 const RegMask &use_mask = n->in_RegMask(idx);
172 bool can_use = ( RegMask::can_represent(def_reg) ? (use_mask.Member(def_reg) != 0)
173 : (use_mask.is_AllStack() != 0));
174 if (!RegMask::is_vector(def->ideal_reg())) {
175 // Check for a copy to or from a misaligned pair.
176 // It is workaround for a sparc with misaligned pairs.
177 can_use = can_use && !use_mask.is_misaligned_pair() && !def_lrg.mask().is_misaligned_pair();
178 }
179 if (!can_use)
180 return 0;
181
182 // Capture the old def in case it goes dead...
183 Node *old = n->in(idx);
184
185 // Save-on-call copies can only be elided if the entire copy chain can go
186 // away, lest we get the same callee-save value alive in 2 locations at
187 // once. We check for the obvious trivial case here. Although it can
188 // sometimes be elided with cooperation outside our scope, here we will just
189 // miss the opportunity. :-(
190 if( may_be_copy_of_callee(def) ) {
191 if( old->outcnt() > 1 ) return 0; // We're the not last user
192 int idx = old->is_Copy();
193 assert( idx, "chain of copies being removed" );
194 Node *old2 = old->in(idx); // Chain of copies
195 if( old2->outcnt() > 1 ) return 0; // old is not the last user
196 int idx2 = old2->is_Copy();
197 if( !idx2 ) return 0; // Not a chain of 2 copies
198 if( def != old2->in(idx2) ) return 0; // Chain of exactly 2 copies
199 }
200
201 // Use the new def
202 n->set_req(idx,def);
203 _post_alloc++;
204
205 // Is old def now dead? We successfully yanked a copy?
206 return yank_if_dead(old,current_block,&value,®nd);
207 }
208
209
210 //------------------------------skip_copies------------------------------------
211 // Skip through any number of copies (that don't mod oop-i-ness)
212 Node *PhaseChaitin::skip_copies( Node *c ) {
213 int idx = c->is_Copy();
214 uint is_oop = lrgs(_lrg_map.live_range_id(c))._is_oop;
215 while (idx != 0) {
216 guarantee(c->in(idx) != NULL, "must not resurrect dead copy");
217 if (lrgs(_lrg_map.live_range_id(c->in(idx)))._is_oop != is_oop) {
218 break; // casting copy, not the same value
219 }
220 c = c->in(idx);
221 idx = c->is_Copy();
222 }
223 return c;
224 }
225
226 //------------------------------elide_copy-------------------------------------
227 // Remove (bypass) copies along Node n, edge k.
228 int PhaseChaitin::elide_copy( Node *n, int k, Block *current_block, Node_List &value, Node_List ®nd, bool can_change_regs ) {
229 int blk_adjust = 0;
230
231 uint nk_idx = _lrg_map.live_range_id(n->in(k));
232 OptoReg::Name nk_reg = lrgs(nk_idx).reg();
233
234 // Remove obvious same-register copies
235 Node *x = n->in(k);
236 int idx;
237 while( (idx=x->is_Copy()) != 0 ) {
238 Node *copy = x->in(idx);
239 guarantee(copy != NULL, "must not resurrect dead copy");
240 if(lrgs(_lrg_map.live_range_id(copy)).reg() != nk_reg) {
241 break;
242 }
243 blk_adjust += use_prior_register(n,k,copy,current_block,value,regnd);
244 if (n->in(k) != copy) {
245 break; // Failed for some cutout?
246 }
247 x = copy; // Progress, try again
248 }
249
250 // Phis and 2-address instructions cannot change registers so easily - their
251 // outputs must match their input.
252 if( !can_change_regs )
253 return blk_adjust; // Only check stupid copies!
254
255 // Loop backedges won't have a value-mapping yet
256 if( &value == NULL ) return blk_adjust;
257
258 // Skip through all copies to the _value_ being used. Do not change from
259 // int to pointer. This attempts to jump through a chain of copies, where
260 // intermediate copies might be illegal, i.e., value is stored down to stack
261 // then reloaded BUT survives in a register the whole way.
262 Node *val = skip_copies(n->in(k));
263
264 if (val == x && nk_idx != 0 &&
265 regnd[nk_reg] != NULL && regnd[nk_reg] != x &&
266 _lrg_map.live_range_id(x) == _lrg_map.live_range_id(regnd[nk_reg])) {
267 // When rematerialzing nodes and stretching lifetimes, the
268 // allocator will reuse the original def for multidef LRG instead
269 // of the current reaching def because it can't know it's safe to
270 // do so. After allocation completes if they are in the same LRG
271 // then it should use the current reaching def instead.
272 n->set_req(k, regnd[nk_reg]);
273 blk_adjust += yank_if_dead(val, current_block, &value, ®nd);
274 val = skip_copies(n->in(k));
275 }
276
277 if (val == x) return blk_adjust; // No progress?
278
279 int n_regs = RegMask::num_registers(val->ideal_reg());
280 uint val_idx = _lrg_map.live_range_id(val);
281 OptoReg::Name val_reg = lrgs(val_idx).reg();
282
283 // See if it happens to already be in the correct register!
284 // (either Phi's direct register, or the common case of the name
285 // never-clobbered original-def register)
286 if (register_contains_value(val, val_reg, n_regs, value)) {
287 blk_adjust += use_prior_register(n,k,regnd[val_reg],current_block,value,regnd);
288 if( n->in(k) == regnd[val_reg] ) // Success! Quit trying
289 return blk_adjust;
290 }
291
292 // See if we can skip the copy by changing registers. Don't change from
293 // using a register to using the stack unless we know we can remove a
294 // copy-load. Otherwise we might end up making a pile of Intel cisc-spill
295 // ops reading from memory instead of just loading once and using the
296 // register.
297
298 // Also handle duplicate copies here.
299 const Type *t = val->is_Con() ? val->bottom_type() : NULL;
300
301 // Scan all registers to see if this value is around already
302 for( uint reg = 0; reg < (uint)_max_reg; reg++ ) {
303 if (reg == (uint)nk_reg) {
304 // Found ourselves so check if there is only one user of this
305 // copy and keep on searching for a better copy if so.
306 bool ignore_self = true;
307 x = n->in(k);
308 DUIterator_Fast imax, i = x->fast_outs(imax);
309 Node* first = x->fast_out(i); i++;
310 while (i < imax && ignore_self) {
311 Node* use = x->fast_out(i); i++;
312 if (use != first) ignore_self = false;
313 }
314 if (ignore_self) continue;
315 }
316
317 Node *vv = value[reg];
318 if (n_regs > 1) { // Doubles and vectors check for aligned-adjacent set
319 uint last = (n_regs-1); // Looking for the last part of a set
320 if ((reg&last) != last) continue; // Wrong part of a set
321 if (!register_contains_value(vv, reg, n_regs, value)) continue; // Different value
322 }
323 if( vv == val || // Got a direct hit?
324 (t && vv && vv->bottom_type() == t && vv->is_Mach() &&
325 vv->as_Mach()->rule() == val->as_Mach()->rule()) ) { // Or same constant?
326 assert( !n->is_Phi(), "cannot change registers at a Phi so easily" );
327 if( OptoReg::is_stack(nk_reg) || // CISC-loading from stack OR
328 OptoReg::is_reg(reg) || // turning into a register use OR
329 regnd[reg]->outcnt()==1 ) { // last use of a spill-load turns into a CISC use
330 blk_adjust += use_prior_register(n,k,regnd[reg],current_block,value,regnd);
331 if( n->in(k) == regnd[reg] ) // Success! Quit trying
332 return blk_adjust;
333 } // End of if not degrading to a stack
334 } // End of if found value in another register
335 } // End of scan all machine registers
336 return blk_adjust;
337 }
338
339
340 //
341 // Check if nreg already contains the constant value val. Normal copy
342 // elimination doesn't doesn't work on constants because multiple
343 // nodes can represent the same constant so the type and rule of the
344 // MachNode must be checked to ensure equivalence.
345 //
346 bool PhaseChaitin::eliminate_copy_of_constant(Node* val, Node* n,
347 Block *current_block,
348 Node_List& value, Node_List& regnd,
349 OptoReg::Name nreg, OptoReg::Name nreg2) {
350 if (value[nreg] != val && val->is_Con() &&
351 value[nreg] != NULL && value[nreg]->is_Con() &&
352 (nreg2 == OptoReg::Bad || value[nreg] == value[nreg2]) &&
353 value[nreg]->bottom_type() == val->bottom_type() &&
354 value[nreg]->as_Mach()->rule() == val->as_Mach()->rule()) {
355 // This code assumes that two MachNodes representing constants
356 // which have the same rule and the same bottom type will produce
357 // identical effects into a register. This seems like it must be
358 // objectively true unless there are hidden inputs to the nodes
359 // but if that were to change this code would need to updated.
360 // Since they are equivalent the second one if redundant and can
361 // be removed.
362 //
363 // n will be replaced with the old value but n might have
364 // kills projections associated with it so remove them now so that
365 // yank_if_dead will be able to eliminate the copy once the uses
366 // have been transferred to the old[value].
367 for (DUIterator_Fast imax, i = n->fast_outs(imax); i < imax; i++) {
368 Node* use = n->fast_out(i);
369 if (use->is_Proj() && use->outcnt() == 0) {
370 // Kill projections have no users and one input
371 use->set_req(0, C->top());
372 yank_if_dead(use, current_block, &value, ®nd);
373 --i; --imax;
374 }
375 }
376 _post_alloc++;
377 return true;
378 }
379 return false;
380 }
381
382
383 //------------------------------post_allocate_copy_removal---------------------
384 // Post-Allocation peephole copy removal. We do this in 1 pass over the
385 // basic blocks. We maintain a mapping of registers to Nodes (an array of
386 // Nodes indexed by machine register or stack slot number). NULL means that a
387 // register is not mapped to any Node. We can (want to have!) have several
388 // registers map to the same Node. We walk forward over the instructions
389 // updating the mapping as we go. At merge points we force a NULL if we have
390 // to merge 2 different Nodes into the same register. Phi functions will give
391 // us a new Node if there is a proper value merging. Since the blocks are
392 // arranged in some RPO, we will visit all parent blocks before visiting any
393 // successor blocks (except at loops).
394 //
395 // If we find a Copy we look to see if the Copy's source register is a stack
396 // slot and that value has already been loaded into some machine register; if
397 // so we use machine register directly. This turns a Load into a reg-reg
398 // Move. We also look for reloads of identical constants.
399 //
400 // When we see a use from a reg-reg Copy, we will attempt to use the copy's
401 // source directly and make the copy go dead.
402 void PhaseChaitin::post_allocate_copy_removal() {
403 NOT_PRODUCT( Compile::TracePhase t3("postAllocCopyRemoval", &_t_postAllocCopyRemoval, TimeCompiler); )
404 ResourceMark rm;
405
406 // Need a mapping from basic block Node_Lists. We need a Node_List to
407 // map from register number to value-producing Node.
408 Node_List **blk2value = NEW_RESOURCE_ARRAY( Node_List *, _cfg._num_blocks+1);
409 memset( blk2value, 0, sizeof(Node_List*)*(_cfg._num_blocks+1) );
410 // Need a mapping from basic block Node_Lists. We need a Node_List to
411 // map from register number to register-defining Node.
412 Node_List **blk2regnd = NEW_RESOURCE_ARRAY( Node_List *, _cfg._num_blocks+1);
413 memset( blk2regnd, 0, sizeof(Node_List*)*(_cfg._num_blocks+1) );
414
415 // We keep unused Node_Lists on a free_list to avoid wasting
416 // memory.
417 GrowableArray<Node_List*> free_list = GrowableArray<Node_List*>(16);
418
419 // For all blocks
420 for( uint i = 0; i < _cfg._num_blocks; i++ ) {
421 uint j;
422 Block *b = _cfg._blocks[i];
423
424 // Count of Phis in block
425 uint phi_dex;
426 for( phi_dex = 1; phi_dex < b->_nodes.size(); phi_dex++ ) {
427 Node *phi = b->_nodes[phi_dex];
428 if( !phi->is_Phi() )
429 break;
430 }
431
432 // If any predecessor has not been visited, we do not know the state
433 // of registers at the start. Check for this, while updating copies
434 // along Phi input edges
435 bool missing_some_inputs = false;
436 Block *freed = NULL;
437 for( j = 1; j < b->num_preds(); j++ ) {
438 Block *pb = _cfg.get_block_for_node(b->pred(j));
439 // Remove copies along phi edges
440 for( uint k=1; k<phi_dex; k++ )
441 elide_copy( b->_nodes[k], j, b, *blk2value[pb->_pre_order], *blk2regnd[pb->_pre_order], false );
442 if( blk2value[pb->_pre_order] ) { // Have a mapping on this edge?
443 // See if this predecessor's mappings have been used by everybody
444 // who wants them. If so, free 'em.
445 uint k;
446 for( k=0; k<pb->_num_succs; k++ ) {
447 Block *pbsucc = pb->_succs[k];
448 if( !blk2value[pbsucc->_pre_order] && pbsucc != b )
449 break; // Found a future user
450 }
451 if( k >= pb->_num_succs ) { // No more uses, free!
452 freed = pb; // Record last block freed
453 free_list.push(blk2value[pb->_pre_order]);
454 free_list.push(blk2regnd[pb->_pre_order]);
455 }
456 } else { // This block has unvisited (loopback) inputs
457 missing_some_inputs = true;
458 }
459 }
460
461
462 // Extract Node_List mappings. If 'freed' is non-zero, we just popped
463 // 'freed's blocks off the list
464 Node_List ®nd = *(free_list.is_empty() ? new Node_List() : free_list.pop());
465 Node_List &value = *(free_list.is_empty() ? new Node_List() : free_list.pop());
466 assert( !freed || blk2value[freed->_pre_order] == &value, "" );
467 value.map(_max_reg,NULL);
468 regnd.map(_max_reg,NULL);
469 // Set mappings as OUR mappings
470 blk2value[b->_pre_order] = &value;
471 blk2regnd[b->_pre_order] = ®nd;
472
473 // Initialize value & regnd for this block
474 if( missing_some_inputs ) {
475 // Some predecessor has not yet been visited; zap map to empty
476 for( uint k = 0; k < (uint)_max_reg; k++ ) {
477 value.map(k,NULL);
478 regnd.map(k,NULL);
479 }
480 } else {
481 if( !freed ) { // Didn't get a freebie prior block
482 // Must clone some data
483 freed = _cfg.get_block_for_node(b->pred(1));
484 Node_List &f_value = *blk2value[freed->_pre_order];
485 Node_List &f_regnd = *blk2regnd[freed->_pre_order];
486 for( uint k = 0; k < (uint)_max_reg; k++ ) {
487 value.map(k,f_value[k]);
488 regnd.map(k,f_regnd[k]);
489 }
490 }
491 // Merge all inputs together, setting to NULL any conflicts.
492 for( j = 1; j < b->num_preds(); j++ ) {
493 Block *pb = _cfg.get_block_for_node(b->pred(j));
494 if( pb == freed ) continue; // Did self already via freelist
495 Node_List &p_regnd = *blk2regnd[pb->_pre_order];
496 for( uint k = 0; k < (uint)_max_reg; k++ ) {
497 if( regnd[k] != p_regnd[k] ) { // Conflict on reaching defs?
498 value.map(k,NULL); // Then no value handy
499 regnd.map(k,NULL);
500 }
501 }
502 }
503 }
504
505 // For all Phi's
506 for( j = 1; j < phi_dex; j++ ) {
507 uint k;
508 Node *phi = b->_nodes[j];
509 uint pidx = _lrg_map.live_range_id(phi);
510 OptoReg::Name preg = lrgs(_lrg_map.live_range_id(phi)).reg();
511
512 // Remove copies remaining on edges. Check for junk phi.
513 Node *u = NULL;
514 for (k = 1; k < phi->req(); k++) {
515 Node *x = phi->in(k);
516 if( phi != x && u != x ) // Found a different input
517 u = u ? NodeSentinel : x; // Capture unique input, or NodeSentinel for 2nd input
518 }
519 if( u != NodeSentinel ) { // Junk Phi. Remove
520 b->_nodes.remove(j--);
521 phi_dex--;
522 _cfg.unmap_node_from_block(phi);
523 phi->replace_by(u);
524 phi->disconnect_inputs(NULL, C);
525 continue;
526 }
527 // Note that if value[pidx] exists, then we merged no new values here
528 // and the phi is useless. This can happen even with the above phi
529 // removal for complex flows. I cannot keep the better known value here
530 // because locally the phi appears to define a new merged value. If I
531 // keep the better value then a copy of the phi, being unable to use the
532 // global flow analysis, can't "peek through" the phi to the original
533 // reaching value and so will act like it's defining a new value. This
534 // can lead to situations where some uses are from the old and some from
535 // the new values. Not illegal by itself but throws the over-strong
536 // assert in scheduling.
537 if( pidx ) {
538 value.map(preg,phi);
539 regnd.map(preg,phi);
540 int n_regs = RegMask::num_registers(phi->ideal_reg());
541 for (int l = 1; l < n_regs; l++) {
542 OptoReg::Name preg_lo = OptoReg::add(preg,-l);
543 value.map(preg_lo,phi);
544 regnd.map(preg_lo,phi);
545 }
546 }
547 }
548
549 // For all remaining instructions
550 for( j = phi_dex; j < b->_nodes.size(); j++ ) {
551 Node *n = b->_nodes[j];
552
553 if( n->outcnt() == 0 && // Dead?
554 n != C->top() && // (ignore TOP, it has no du info)
555 !n->is_Proj() ) { // fat-proj kills
556 j -= yank_if_dead(n,b,&value,®nd);
557 continue;
558 }
559
560 // Improve reaching-def info. Occasionally post-alloc's liveness gives
561 // up (at loop backedges, because we aren't doing a full flow pass).
562 // The presence of a live use essentially asserts that the use's def is
563 // alive and well at the use (or else the allocator fubar'd). Take
564 // advantage of this info to set a reaching def for the use-reg.
565 uint k;
566 for (k = 1; k < n->req(); k++) {
567 Node *def = n->in(k); // n->in(k) is a USE; def is the DEF for this USE
568 guarantee(def != NULL, "no disconnected nodes at this point");
569 uint useidx = _lrg_map.live_range_id(def); // useidx is the live range index for this USE
570
571 if( useidx ) {
572 OptoReg::Name ureg = lrgs(useidx).reg();
573 if( !value[ureg] ) {
574 int idx; // Skip occasional useless copy
575 while( (idx=def->is_Copy()) != 0 &&
576 def->in(idx) != NULL && // NULL should not happen
577 ureg == lrgs(_lrg_map.live_range_id(def->in(idx))).reg())
578 def = def->in(idx);
579 Node *valdef = skip_copies(def); // tighten up val through non-useless copies
580 value.map(ureg,valdef); // record improved reaching-def info
581 regnd.map(ureg, def);
582 // Record other half of doubles
583 uint def_ideal_reg = def->ideal_reg();
584 int n_regs = RegMask::num_registers(def_ideal_reg);
585 for (int l = 1; l < n_regs; l++) {
586 OptoReg::Name ureg_lo = OptoReg::add(ureg,-l);
587 if (!value[ureg_lo] &&
588 (!RegMask::can_represent(ureg_lo) ||
589 lrgs(useidx).mask().Member(ureg_lo))) { // Nearly always adjacent
590 value.map(ureg_lo,valdef); // record improved reaching-def info
591 regnd.map(ureg_lo, def);
592 }
593 }
594 }
595 }
596 }
597
598 const uint two_adr = n->is_Mach() ? n->as_Mach()->two_adr() : 0;
599
600 // Remove copies along input edges
601 for( k = 1; k < n->req(); k++ )
602 j -= elide_copy( n, k, b, value, regnd, two_adr!=k );
603
604 // Unallocated Nodes define no registers
605 uint lidx = _lrg_map.live_range_id(n);
606 if (!lidx) {
607 continue;
608 }
609
610 // Update the register defined by this instruction
611 OptoReg::Name nreg = lrgs(lidx).reg();
612 // Skip through all copies to the _value_ being defined.
613 // Do not change from int to pointer
614 Node *val = skip_copies(n);
615
616 // Clear out a dead definition before starting so that the
617 // elimination code doesn't have to guard against it. The
618 // definition could in fact be a kill projection with a count of
619 // 0 which is safe but since those are uninteresting for copy
620 // elimination just delete them as well.
621 if (regnd[nreg] != NULL && regnd[nreg]->outcnt() == 0) {
622 regnd.map(nreg, NULL);
623 value.map(nreg, NULL);
624 }
625
626 uint n_ideal_reg = n->ideal_reg();
627 int n_regs = RegMask::num_registers(n_ideal_reg);
628 if (n_regs == 1) {
629 // If Node 'n' does not change the value mapped by the register,
630 // then 'n' is a useless copy. Do not update the register->node
631 // mapping so 'n' will go dead.
632 if( value[nreg] != val ) {
633 if (eliminate_copy_of_constant(val, n, b, value, regnd, nreg, OptoReg::Bad)) {
634 j -= replace_and_yank_if_dead(n, nreg, b, value, regnd);
635 } else {
636 // Update the mapping: record new Node defined by the register
637 regnd.map(nreg,n);
638 // Update mapping for defined *value*, which is the defined
639 // Node after skipping all copies.
640 value.map(nreg,val);
641 }
642 } else if( !may_be_copy_of_callee(n) ) {
643 assert( n->is_Copy(), "" );
644 j -= replace_and_yank_if_dead(n, nreg, b, value, regnd);
645 }
646 } else if (RegMask::is_vector(n_ideal_reg)) {
647 // If Node 'n' does not change the value mapped by the register,
648 // then 'n' is a useless copy. Do not update the register->node
649 // mapping so 'n' will go dead.
650 if (!register_contains_value(val, nreg, n_regs, value)) {
651 // Update the mapping: record new Node defined by the register
652 regnd.map(nreg,n);
653 // Update mapping for defined *value*, which is the defined
654 // Node after skipping all copies.
655 value.map(nreg,val);
656 for (int l = 1; l < n_regs; l++) {
657 OptoReg::Name nreg_lo = OptoReg::add(nreg,-l);
658 regnd.map(nreg_lo, n );
659 value.map(nreg_lo,val);
660 }
661 } else if (n->is_Copy()) {
662 // Note: vector can't be constant and can't be copy of calee.
663 j -= replace_and_yank_if_dead(n, nreg, b, value, regnd);
664 }
665 } else {
666 // If the value occupies a register pair, record same info
667 // in both registers.
668 OptoReg::Name nreg_lo = OptoReg::add(nreg,-1);
669 if( RegMask::can_represent(nreg_lo) && // Either a spill slot, or
670 !lrgs(lidx).mask().Member(nreg_lo) ) { // Nearly always adjacent
671 // Sparc occasionally has non-adjacent pairs.
672 // Find the actual other value
673 RegMask tmp = lrgs(lidx).mask();
674 tmp.Remove(nreg);
675 nreg_lo = tmp.find_first_elem();
676 }
677 if( value[nreg] != val || value[nreg_lo] != val ) {
678 if (eliminate_copy_of_constant(val, n, b, value, regnd, nreg, nreg_lo)) {
679 j -= replace_and_yank_if_dead(n, nreg, b, value, regnd);
680 } else {
681 regnd.map(nreg , n );
682 regnd.map(nreg_lo, n );
683 value.map(nreg ,val);
684 value.map(nreg_lo,val);
685 }
686 } else if( !may_be_copy_of_callee(n) ) {
687 assert( n->is_Copy(), "" );
688 j -= replace_and_yank_if_dead(n, nreg, b, value, regnd);
689 }
690 }
691
692 // Fat projections kill many registers
693 if( n_ideal_reg == MachProjNode::fat_proj ) {
694 RegMask rm = n->out_RegMask();
695 // wow, what an expensive iterator...
696 nreg = rm.find_first_elem();
697 while( OptoReg::is_valid(nreg)) {
698 rm.Remove(nreg);
699 value.map(nreg,n);
700 regnd.map(nreg,n);
701 nreg = rm.find_first_elem();
702 }
703 }
704
705 } // End of for all instructions in the block
706
707 } // End for all blocks
708 }