1782     IndexSet liveout(_live->live(block));
1783 
1784     for (uint j = block->end_idx() + 1; j > 1; j--) {
1785       Node* n = block->get_node(j - 1);
1786 
1787       // Pre-split compares of loop-phis.  Loop-phis form a cycle we would
1788       // like to see in the same register.  Compare uses the loop-phi and so
1789       // extends its live range BUT cannot be part of the cycle.  If this
1790       // extended live range overlaps with the update of the loop-phi value
1791       // we need both alive at the same time -- which requires at least 1
1792       // copy.  But because Intel has only 2-address registers we end up with
1793       // at least 2 copies, one before the loop-phi update instruction and
1794       // one after.  Instead we split the input to the compare just after the
1795       // phi.
1796       if( n->is_Mach() && n->as_Mach()->ideal_Opcode() == Op_CmpI ) {
1797         Node *phi = n->in(1);
1798         if( phi->is_Phi() && phi->as_Phi()->region()->is_Loop() ) {
1799           Block *phi_block = _cfg.get_block_for_node(phi);
1800           if (_cfg.get_block_for_node(phi_block->pred(2)) == block) {
1801             const RegMask *mask = C->matcher()->idealreg2spillmask[Op_RegI];
1802             Node *spill = new (C) MachSpillCopyNode( phi, *mask, *mask );
1803             insert_proj( phi_block, 1, spill, maxlrg++ );
1804             n->set_req(1,spill);
1805             must_recompute_live = true;
1806           }
1807         }
1808       }
1809 
1810       // Get value being defined
1811       uint lidx = _lrg_map.live_range_id(n);
1812       // Ignore the occasional brand-new live range
1813       if (lidx && lidx < _lrg_map.max_lrg_id()) {
1814         // Remove from live-out set
1815         liveout.remove(lidx);
1816 
1817         // Copies do not define a new value and so do not interfere.
1818         // Remove the copies source from the liveout set before interfering.
1819         uint idx = n->is_Copy();
1820         if (idx) {
1821           liveout.remove(_lrg_map.live_range_id(n->in(idx)));
1822         }

1782     IndexSet liveout(_live->live(block));
1783 
1784     for (uint j = block->end_idx() + 1; j > 1; j--) {
1785       Node* n = block->get_node(j - 1);
1786 
1787       // Pre-split compares of loop-phis.  Loop-phis form a cycle we would
1788       // like to see in the same register.  Compare uses the loop-phi and so
1789       // extends its live range BUT cannot be part of the cycle.  If this
1790       // extended live range overlaps with the update of the loop-phi value
1791       // we need both alive at the same time -- which requires at least 1
1792       // copy.  But because Intel has only 2-address registers we end up with
1793       // at least 2 copies, one before the loop-phi update instruction and
1794       // one after.  Instead we split the input to the compare just after the
1795       // phi.
1796       if( n->is_Mach() && n->as_Mach()->ideal_Opcode() == Op_CmpI ) {
1797         Node *phi = n->in(1);
1798         if( phi->is_Phi() && phi->as_Phi()->region()->is_Loop() ) {
1799           Block *phi_block = _cfg.get_block_for_node(phi);
1800           if (_cfg.get_block_for_node(phi_block->pred(2)) == block) {
1801             const RegMask *mask = C->matcher()->idealreg2spillmask[Op_RegI];
1802             Node *spill = new (C) LoopPhiInputSpillNode(phi, *mask, *mask);
1803             insert_proj( phi_block, 1, spill, maxlrg++ );
1804             n->set_req(1,spill);
1805             must_recompute_live = true;
1806           }
1807         }
1808       }
1809 
1810       // Get value being defined
1811       uint lidx = _lrg_map.live_range_id(n);
1812       // Ignore the occasional brand-new live range
1813       if (lidx && lidx < _lrg_map.max_lrg_id()) {
1814         // Remove from live-out set
1815         liveout.remove(lidx);
1816 
1817         // Copies do not define a new value and so do not interfere.
1818         // Remove the copies source from the liveout set before interfering.
1819         uint idx = n->is_Copy();
1820         if (idx) {
1821           liveout.remove(_lrg_map.live_range_id(n->in(idx)));
1822         }