1 /*
2 * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #ifndef SHARE_VM_OPTO_MACHNODE_HPP
26 #define SHARE_VM_OPTO_MACHNODE_HPP
27
28 #include "opto/callnode.hpp"
29 #include "opto/matcher.hpp"
30 #include "opto/multnode.hpp"
31 #include "opto/node.hpp"
32 #include "opto/regmask.hpp"
33
34 class BufferBlob;
35 class CodeBuffer;
36 class JVMState;
37 class MachCallDynamicJavaNode;
38 class MachCallJavaNode;
39 class MachCallLeafNode;
40 class MachCallNode;
41 class MachCallRuntimeNode;
42 class MachCallStaticJavaNode;
43 class MachEpilogNode;
44 class MachIfNode;
45 class MachNullCheckNode;
46 class MachOper;
47 class MachProjNode;
48 class MachPrologNode;
49 class MachReturnNode;
50 class MachSafePointNode;
51 class MachSpillCopyNode;
52 class Matcher;
53 class PhaseRegAlloc;
54 class RegMask;
55 class State;
56
57 //---------------------------MachOper------------------------------------------
58 class MachOper : public ResourceObj {
59 public:
60 // Allocate right next to the MachNodes in the same arena
61 void *operator new( size_t x, Compile* C ) throw() { return C->node_arena()->Amalloc_D(x); }
62
63 // Opcode
64 virtual uint opcode() const = 0;
65
66 // Number of input edges.
67 // Generally at least 1
68 virtual uint num_edges() const { return 1; }
69 // Array of Register masks
70 virtual const RegMask *in_RegMask(int index) const;
71
72 // Methods to output the encoding of the operand
73
74 // Negate conditional branches. Error for non-branch Nodes
75 virtual void negate();
76
77 // Return the value requested
78 // result register lookup, corresponding to int_format
79 virtual int reg(PhaseRegAlloc *ra_, const Node *node) const;
80 // input register lookup, corresponding to ext_format
81 virtual int reg(PhaseRegAlloc *ra_, const Node *node, int idx) const;
82
83 // helpers for MacroAssembler generation from ADLC
84 Register as_Register(PhaseRegAlloc *ra_, const Node *node) const {
85 return ::as_Register(reg(ra_, node));
86 }
87 Register as_Register(PhaseRegAlloc *ra_, const Node *node, int idx) const {
88 return ::as_Register(reg(ra_, node, idx));
89 }
90 FloatRegister as_FloatRegister(PhaseRegAlloc *ra_, const Node *node) const {
91 return ::as_FloatRegister(reg(ra_, node));
92 }
93 FloatRegister as_FloatRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const {
94 return ::as_FloatRegister(reg(ra_, node, idx));
95 }
96
97 #if defined(IA32) || defined(AMD64)
98 XMMRegister as_XMMRegister(PhaseRegAlloc *ra_, const Node *node) const {
99 return ::as_XMMRegister(reg(ra_, node));
100 }
101 XMMRegister as_XMMRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const {
102 return ::as_XMMRegister(reg(ra_, node, idx));
103 }
104 #endif
105
106 virtual intptr_t constant() const;
107 virtual relocInfo::relocType constant_reloc() const;
108 virtual jdouble constantD() const;
109 virtual jfloat constantF() const;
110 virtual jlong constantL() const;
111 virtual TypeOopPtr *oop() const;
112 virtual int ccode() const;
113 // A zero, default, indicates this value is not needed.
114 // May need to lookup the base register, as done in int_ and ext_format
115 virtual int base (PhaseRegAlloc *ra_, const Node *node, int idx) const;
116 virtual int index(PhaseRegAlloc *ra_, const Node *node, int idx) const;
117 virtual int scale() const;
118 // Parameters needed to support MEMORY_INTERFACE access to stackSlot
119 virtual int disp (PhaseRegAlloc *ra_, const Node *node, int idx) const;
120 // Check for PC-Relative displacement
121 virtual relocInfo::relocType disp_reloc() const;
122 virtual int constant_disp() const; // usu. 0, may return Type::OffsetBot
123 virtual int base_position() const; // base edge position, or -1
124 virtual int index_position() const; // index edge position, or -1
125
126 // Access the TypeKlassPtr of operands with a base==RegI and disp==RegP
127 // Only returns non-null value for i486.ad's indOffset32X
128 virtual const TypePtr *disp_as_type() const { return NULL; }
129
130 // Return the label
131 virtual Label *label() const;
132
133 // Return the method's address
134 virtual intptr_t method() const;
135
136 // Hash and compare over operands are currently identical
137 virtual uint hash() const;
138 virtual uint cmp( const MachOper &oper ) const;
139
140 // Virtual clone, since I do not know how big the MachOper is.
141 virtual MachOper *clone(Compile* C) const = 0;
142
143 // Return ideal Type from simple operands. Fail for complex operands.
144 virtual const Type *type() const;
145
146 // Set an integer offset if we have one, or error otherwise
147 virtual void set_con( jint c0 ) { ShouldNotReachHere(); }
148
149 #ifndef PRODUCT
150 // Return name of operand
151 virtual const char *Name() const { return "???";}
152
153 // Methods to output the text version of the operand
154 virtual void int_format(PhaseRegAlloc *,const MachNode *node, outputStream *st) const = 0;
155 virtual void ext_format(PhaseRegAlloc *,const MachNode *node,int idx, outputStream *st) const=0;
156
157 virtual void dump_spec(outputStream *st) const; // Print per-operand info
158 #endif
159 };
160
161 //------------------------------MachNode---------------------------------------
162 // Base type for all machine specific nodes. All node classes generated by the
163 // ADLC inherit from this class.
164 class MachNode : public Node {
165 public:
166 MachNode() : Node((uint)0), _num_opnds(0), _opnds(NULL) {
167 init_class_id(Class_Mach);
168 }
169 // Required boilerplate
170 virtual uint size_of() const { return sizeof(MachNode); }
171 virtual int Opcode() const; // Always equal to MachNode
172 virtual uint rule() const = 0; // Machine-specific opcode
173 // Number of inputs which come before the first operand.
174 // Generally at least 1, to skip the Control input
175 virtual uint oper_input_base() const { return 1; }
176
177 // Copy inputs and operands to new node of instruction.
178 // Called from cisc_version() and short_branch_version().
179 // !!!! The method's body is defined in ad_<arch>.cpp file.
180 void fill_new_machnode(MachNode *n, Compile* C) const;
181
182 // Return an equivalent instruction using memory for cisc_operand position
183 virtual MachNode *cisc_version(int offset, Compile* C);
184 // Modify this instruction's register mask to use stack version for cisc_operand
185 virtual void use_cisc_RegMask();
186
187 // Support for short branches
188 bool may_be_short_branch() const { return (flags() & Flag_may_be_short_branch) != 0; }
189
190 // Avoid back to back some instructions on some CPUs.
191 bool avoid_back_to_back() const { return (flags() & Flag_avoid_back_to_back) != 0; }
192
193 // instruction implemented with a call
194 bool has_call() const { return (flags() & Flag_has_call) != 0; }
195
196 // First index in _in[] corresponding to operand, or -1 if there is none
197 int operand_index(uint operand) const;
198
199 // Register class input is expected in
200 virtual const RegMask &in_RegMask(uint) const;
201
202 // cisc-spillable instructions redefine for use by in_RegMask
203 virtual const RegMask *cisc_RegMask() const { return NULL; }
204
205 // If this instruction is a 2-address instruction, then return the
206 // index of the input which must match the output. Not nessecary
207 // for instructions which bind the input and output register to the
208 // same singleton regiser (e.g., Intel IDIV which binds AX to be
209 // both an input and an output). It is nessecary when the input and
210 // output have choices - but they must use the same choice.
211 virtual uint two_adr( ) const { return 0; }
212
213 // Array of complex operand pointers. Each corresponds to zero or
214 // more leafs. Must be set by MachNode constructor to point to an
215 // internal array of MachOpers. The MachOper array is sized by
216 // specific MachNodes described in the ADL.
217 uint _num_opnds;
218 MachOper **_opnds;
219 uint num_opnds() const { return _num_opnds; }
220
221 // Emit bytes into cbuf
222 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
223 // Size of instruction in bytes
224 virtual uint size(PhaseRegAlloc *ra_) const;
225 // Helper function that computes size by emitting code
226 virtual uint emit_size(PhaseRegAlloc *ra_) const;
227
228 // Return the alignment required (in units of relocInfo::addr_unit())
229 // for this instruction (must be a power of 2)
230 virtual int alignment_required() const { return 1; }
231
232 // Return the padding (in bytes) to be emitted before this
233 // instruction to properly align it.
234 virtual int compute_padding(int current_offset) const { return 0; }
235
236 // Return number of relocatable values contained in this instruction
237 virtual int reloc() const { return 0; }
238
239 // Hash and compare over operands. Used to do GVN on machine Nodes.
240 virtual uint hash() const;
241 virtual uint cmp( const Node &n ) const;
242
243 // Expand method for MachNode, replaces nodes representing pseudo
244 // instructions with a set of nodes which represent real machine
245 // instructions and compute the same value.
246 virtual MachNode *Expand( State *, Node_List &proj_list, Node* mem ) { return this; }
247
248 // Bottom_type call; value comes from operand0
249 virtual const class Type *bottom_type() const { return _opnds[0]->type(); }
250 virtual uint ideal_reg() const { const Type *t = _opnds[0]->type(); return t == TypeInt::CC ? Op_RegFlags : t->ideal_reg(); }
251
252 // If this is a memory op, return the base pointer and fixed offset.
253 // If there are no such, return NULL. If there are multiple addresses
254 // or the address is indeterminate (rare cases) then return (Node*)-1,
255 // which serves as node bottom.
256 // If the offset is not statically determined, set it to Type::OffsetBot.
257 // This method is free to ignore stack slots if that helps.
258 #define TYPE_PTR_SENTINAL ((const TypePtr*)-1)
259 // Passing TYPE_PTR_SENTINAL as adr_type asks for computation of the adr_type if possible
260 const Node* get_base_and_disp(intptr_t &offset, const TypePtr* &adr_type) const;
261
262 // Helper for get_base_and_disp: find the base and index input nodes.
263 // Returns the MachOper as determined by memory_operand(), for use, if
264 // needed by the caller. If (MachOper *)-1 is returned, base and index
265 // are set to NodeSentinel. If (MachOper *) NULL is returned, base and
266 // index are set to NULL.
267 const MachOper* memory_inputs(Node* &base, Node* &index) const;
268
269 // Helper for memory_inputs: Which operand carries the necessary info?
270 // By default, returns NULL, which means there is no such operand.
271 // If it returns (MachOper*)-1, this means there are multiple memories.
272 virtual const MachOper* memory_operand() const { return NULL; }
273
274 // Call "get_base_and_disp" to decide which category of memory is used here.
275 virtual const class TypePtr *adr_type() const;
276
277 // Apply peephole rule(s) to this instruction
278 virtual MachNode *peephole( Block *block, int block_index, PhaseRegAlloc *ra_, int &deleted, Compile* C );
279
280 // Top-level ideal Opcode matched
281 virtual int ideal_Opcode() const { return Op_Node; }
282
283 // Adds the label for the case
284 virtual void add_case_label( int switch_val, Label* blockLabel);
285
286 // Set the absolute address for methods
287 virtual void method_set( intptr_t addr );
288
289 // Should we clone rather than spill this instruction?
290 bool rematerialize() const;
291
292 // Get the pipeline info
293 static const Pipeline *pipeline_class();
294 virtual const Pipeline *pipeline() const;
295
296 #ifndef PRODUCT
297 virtual const char *Name() const = 0; // Machine-specific name
298 virtual void dump_spec(outputStream *st) const; // Print per-node info
299 void dump_format(PhaseRegAlloc *ra, outputStream *st) const; // access to virtual
300 #endif
301 };
302
303 //------------------------------MachIdealNode----------------------------
304 // Machine specific versions of nodes that must be defined by user.
305 // These are not converted by matcher from ideal nodes to machine nodes
306 // but are inserted into the code by the compiler.
307 class MachIdealNode : public MachNode {
308 public:
309 MachIdealNode( ) {}
310
311 // Define the following defaults for non-matched machine nodes
312 virtual uint oper_input_base() const { return 0; }
313 virtual uint rule() const { return 9999999; }
314 virtual const class Type *bottom_type() const { return _opnds == NULL ? Type::CONTROL : MachNode::bottom_type(); }
315 };
316
317 //------------------------------MachTypeNode----------------------------
318 // Machine Nodes that need to retain a known Type.
319 class MachTypeNode : public MachNode {
320 virtual uint size_of() const { return sizeof(*this); } // Size is bigger
321 public:
322 MachTypeNode( ) {}
323 const Type *_bottom_type;
324
325 virtual const class Type *bottom_type() const { return _bottom_type; }
326 #ifndef PRODUCT
327 virtual void dump_spec(outputStream *st) const;
328 #endif
329 };
330
331 //------------------------------MachBreakpointNode----------------------------
332 // Machine breakpoint or interrupt Node
333 class MachBreakpointNode : public MachIdealNode {
334 public:
335 MachBreakpointNode( ) {}
336 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
337 virtual uint size(PhaseRegAlloc *ra_) const;
338
339 #ifndef PRODUCT
340 virtual const char *Name() const { return "Breakpoint"; }
341 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
342 #endif
343 };
344
345 //------------------------------MachConstantBaseNode--------------------------
346 // Machine node that represents the base address of the constant table.
347 class MachConstantBaseNode : public MachIdealNode {
348 public:
349 static const RegMask& _out_RegMask; // We need the out_RegMask statically in MachConstantNode::in_RegMask().
350
351 public:
352 MachConstantBaseNode() : MachIdealNode() {
353 init_class_id(Class_MachConstantBase);
354 }
355 virtual const class Type* bottom_type() const { return TypeRawPtr::NOTNULL; }
356 virtual uint ideal_reg() const { return Op_RegP; }
357 virtual uint oper_input_base() const { return 1; }
358
359 virtual void emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const;
360 virtual uint size(PhaseRegAlloc* ra_) const;
361 virtual bool pinned() const { return UseRDPCForConstantTableBase; }
362
363 static const RegMask& static_out_RegMask() { return _out_RegMask; }
364 virtual const RegMask& out_RegMask() const { return static_out_RegMask(); }
365
366 #ifndef PRODUCT
367 virtual const char* Name() const { return "MachConstantBaseNode"; }
368 virtual void format(PhaseRegAlloc*, outputStream* st) const;
369 #endif
370 };
371
372 //------------------------------MachConstantNode-------------------------------
373 // Machine node that holds a constant which is stored in the constant table.
374 class MachConstantNode : public MachTypeNode {
375 protected:
376 Compile::Constant _constant; // This node's constant.
377
378 public:
379 MachConstantNode() : MachTypeNode() {
380 init_class_id(Class_MachConstant);
381 }
382
383 virtual void eval_constant(Compile* C) {
384 #ifdef ASSERT
385 tty->print("missing MachConstantNode eval_constant function: ");
386 dump();
387 #endif
388 ShouldNotCallThis();
389 }
390
391 virtual const RegMask &in_RegMask(uint idx) const {
392 if (idx == mach_constant_base_node_input())
393 return MachConstantBaseNode::static_out_RegMask();
394 return MachNode::in_RegMask(idx);
395 }
396
397 // Input edge of MachConstantBaseNode.
398 uint mach_constant_base_node_input() const { return req() - 1; }
399
400 int constant_offset();
401 int constant_offset() const { return ((MachConstantNode*) this)->constant_offset(); }
402 };
403
404 //------------------------------MachUEPNode-----------------------------------
405 // Machine Unvalidated Entry Point Node
406 class MachUEPNode : public MachIdealNode {
407 public:
408 MachUEPNode( ) {}
409 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
410 virtual uint size(PhaseRegAlloc *ra_) const;
411
412 #ifndef PRODUCT
413 virtual const char *Name() const { return "Unvalidated-Entry-Point"; }
414 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
415 #endif
416 };
417
418 //------------------------------MachPrologNode--------------------------------
419 // Machine function Prolog Node
420 class MachPrologNode : public MachIdealNode {
421 public:
422 MachPrologNode( ) {}
423 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
424 virtual uint size(PhaseRegAlloc *ra_) const;
425 virtual int reloc() const;
426
427 #ifndef PRODUCT
428 virtual const char *Name() const { return "Prolog"; }
429 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
430 #endif
431 };
432
433 //------------------------------MachEpilogNode--------------------------------
434 // Machine function Epilog Node
435 class MachEpilogNode : public MachIdealNode {
436 public:
437 MachEpilogNode(bool do_poll = false) : _do_polling(do_poll) {}
438 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
439 virtual uint size(PhaseRegAlloc *ra_) const;
440 virtual int reloc() const;
441 virtual const Pipeline *pipeline() const;
442
443 private:
444 bool _do_polling;
445
446 public:
447 bool do_polling() const { return _do_polling; }
448
449 // Offset of safepoint from the beginning of the node
450 int safepoint_offset() const;
451
452 #ifndef PRODUCT
453 virtual const char *Name() const { return "Epilog"; }
454 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
455 #endif
456 };
457
458 //------------------------------MachNopNode-----------------------------------
459 // Machine function Nop Node
460 class MachNopNode : public MachIdealNode {
461 private:
462 int _count;
463 public:
464 MachNopNode( ) : _count(1) {}
465 MachNopNode( int count ) : _count(count) {}
466 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
467 virtual uint size(PhaseRegAlloc *ra_) const;
468
469 virtual const class Type *bottom_type() const { return Type::CONTROL; }
470
471 virtual int ideal_Opcode() const { return Op_Con; } // bogus; see output.cpp
472 virtual const Pipeline *pipeline() const;
473 #ifndef PRODUCT
474 virtual const char *Name() const { return "Nop"; }
475 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
476 virtual void dump_spec(outputStream *st) const { } // No per-operand info
477 #endif
478 };
479
480 //------------------------------MachSpillCopyNode------------------------------
481 // Machine SpillCopy Node. Copies 1 or 2 words from any location to any
482 // location (stack or register).
483 class MachSpillCopyNode : public MachIdealNode {
484 const RegMask *_in; // RegMask for input
485 const RegMask *_out; // RegMask for output
486 const Type *_type;
487 public:
488 MachSpillCopyNode( Node *n, const RegMask &in, const RegMask &out ) :
489 MachIdealNode(), _in(&in), _out(&out), _type(n->bottom_type()) {
490 init_class_id(Class_MachSpillCopy);
491 init_flags(Flag_is_Copy);
492 add_req(NULL);
493 add_req(n);
494 }
495 virtual uint size_of() const { return sizeof(*this); }
496 void set_out_RegMask(const RegMask &out) { _out = &out; }
497 void set_in_RegMask(const RegMask &in) { _in = ∈ }
498 virtual const RegMask &out_RegMask() const { return *_out; }
499 virtual const RegMask &in_RegMask(uint) const { return *_in; }
500 virtual const class Type *bottom_type() const { return _type; }
501 virtual uint ideal_reg() const { return _type->ideal_reg(); }
502 virtual uint oper_input_base() const { return 1; }
503 uint implementation( CodeBuffer *cbuf, PhaseRegAlloc *ra_, bool do_size, outputStream* st ) const;
504
505 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
506 virtual uint size(PhaseRegAlloc *ra_) const;
507
508 #ifndef PRODUCT
509 virtual const char *Name() const { return "MachSpillCopy"; }
510 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
511 #endif
512 };
513
514 // Inserted when coalescing of a two-address-instruction node and its input fails
515 class TwoAddressSpillNode : public MachSpillCopyNode {
516 public:
517 TwoAddressSpillNode(Node *n, const RegMask &in, const RegMask &out) : MachSpillCopyNode(n, in, out) {}
518 #ifndef PRODUCT
519 virtual const char* Name() const { return "TwoAddressSpill"; }
520 #endif
521 };
522
523 // Inserted when coalescing of a phi node and its input fails
524 class PhiInputSpillNode : public MachSpillCopyNode {
525 public:
526 PhiInputSpillNode(Node *n, const RegMask &in, const RegMask &out) : MachSpillCopyNode(n, in, out) {}
527 #ifndef PRODUCT
528 virtual const char* Name() const { return "PhiInputSpill"; }
529 #endif
530 };
531
532 // Inserted as debug info spills to safepoints in non-frequent blocks
533 class DebugUseSpillNode : public MachSpillCopyNode {
534 public:
535 DebugUseSpillNode(Node *n, const RegMask &in, const RegMask &out) : MachSpillCopyNode(n, in, out) {}
536 #ifndef PRODUCT
537 virtual const char* Name() const { return "DebugUseSpill"; }
538 #endif
539 };
540
541 // Pre-split compares of loop-phis
542 class LoopPhiInputSpillNode : public MachSpillCopyNode {
543 public:
544 LoopPhiInputSpillNode(Node *n, const RegMask &in, const RegMask &out) : MachSpillCopyNode(n, in, out) {}
545 #ifndef PRODUCT
546 virtual const char* Name() const { return "LoopPhiInputSpill"; }
547 #endif
548 };
549
550 // An lrg marked as spilled will be spilled to memory right
551 // after its definition, if in high pressure region or the lrg is bound
552 class DefinitionSpillNode : public MachSpillCopyNode {
553 public:
554 DefinitionSpillNode(Node *n, const RegMask &in, const RegMask &out) : MachSpillCopyNode(n, in, out) {}
555 #ifndef PRODUCT
556 virtual const char* Name() const { return "DefinitionSpill"; }
557 #endif
558 };
559
560 // A register to register move
561 class RegToRegSpillNode : public MachSpillCopyNode {
562 public:
563 RegToRegSpillNode(Node *n, const RegMask &in, const RegMask &out) : MachSpillCopyNode(n, in, out) {}
564 #ifndef PRODUCT
565 virtual const char* Name() const { return "RegToRegSpill"; }
566 #endif
567 };
568
569 // A register to memory move
570 class RegToMemSpillNode : public MachSpillCopyNode {
571 public:
572 RegToMemSpillNode(Node *n, const RegMask &in, const RegMask &out) : MachSpillCopyNode(n, in, out) {}
573 #ifndef PRODUCT
574 virtual const char* Name() const { return "RegToMemSpill"; }
575 #endif
576 };
577
578 // A memory to register move
579 class MemToRegSpillNode : public MachSpillCopyNode {
580 public:
581 MemToRegSpillNode(Node *n, const RegMask &in, const RegMask &out) : MachSpillCopyNode(n, in, out) {}
582 #ifndef PRODUCT
583 virtual const char* Name() const { return "MemToRegSpill"; }
584 #endif
585 };
586
587 // When coalescing phi nodes in PhaseChaitin::Split(), a move spill is inserted if the phi and its input
588 // resides at different locations (i.e. reg or mem)
589 class PhiLocationDifferToInputLocationSpillNode : public MachSpillCopyNode {
590 public:
591 PhiLocationDifferToInputLocationSpillNode(Node *n, const RegMask &in, const RegMask &out) : MachSpillCopyNode(n, in, out) {}
592 #ifndef PRODUCT
593 virtual const char* Name() const { return "PhiLocationDifferToInputLocationSpill"; }
594 #endif
595 };
596
597 // Spill base pointer to memory at safepoint
598 class BasePointerToMemSpillNode : public MachSpillCopyNode {
599 public:
600 BasePointerToMemSpillNode(Node *n, const RegMask &in, const RegMask &out) : MachSpillCopyNode(n, in, out) {}
601 #ifndef PRODUCT
602 virtual const char* Name() const { return "BasePointerToMemSpill"; }
603 #endif
604 };
605
606 // When rematerializing a node we stretch the inputs liveranges, and they might be stretched beyond a new
607 // definition point, therefore we split out new copies instead
608 class InputToRematerializationSpillNode : public MachSpillCopyNode {
609 public:
610 InputToRematerializationSpillNode(Node *n, const RegMask &in, const RegMask &out) : MachSpillCopyNode(n, in, out) {}
611 #ifndef PRODUCT
612 virtual const char* Name() const { return "InputToRematerializationSpill"; }
613 #endif
614 };
615
616 // Spill use at a call
617 class CallUseSpillNode : public MachSpillCopyNode {
618 public:
619 CallUseSpillNode(Node *n, const RegMask &in, const RegMask &out) : MachSpillCopyNode(n, in, out) {}
620 #ifndef PRODUCT
621 virtual const char* Name() const { return "CallUseSpill"; }
622 #endif
623 };
624
625 // An lrg marked as spill that is bound and needs to be spilled at a use
626 class BoundSpillNode : public MachSpillCopyNode {
627 public:
628 BoundSpillNode(Node *n, const RegMask &in, const RegMask &out) : MachSpillCopyNode(n, in, out) {}
629 #ifndef PRODUCT
630 virtual const char* Name() const { return "BoundSpill"; }
631 #endif
632 };
633
634 //------------------------------MachBranchNode--------------------------------
635 // Abstract machine branch Node
636 class MachBranchNode : public MachIdealNode {
637 public:
638 MachBranchNode() : MachIdealNode() {
639 init_class_id(Class_MachBranch);
640 }
641 virtual void label_set(Label* label, uint block_num) = 0;
642 virtual void save_label(Label** label, uint* block_num) = 0;
643
644 // Support for short branches
645 virtual MachNode *short_branch_version(Compile* C) { return NULL; }
646
647 virtual bool pinned() const { return true; };
648 };
649
650 //------------------------------MachNullChkNode--------------------------------
651 // Machine-dependent null-pointer-check Node. Points a real MachNode that is
652 // also some kind of memory op. Turns the indicated MachNode into a
653 // conditional branch with good latency on the ptr-not-null path and awful
654 // latency on the pointer-is-null path.
655
656 class MachNullCheckNode : public MachBranchNode {
657 public:
658 const uint _vidx; // Index of memop being tested
659 MachNullCheckNode( Node *ctrl, Node *memop, uint vidx ) : MachBranchNode(), _vidx(vidx) {
660 init_class_id(Class_MachNullCheck);
661 add_req(ctrl);
662 add_req(memop);
663 }
664 virtual uint size_of() const { return sizeof(*this); }
665
666 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
667 virtual void label_set(Label* label, uint block_num);
668 virtual void save_label(Label** label, uint* block_num);
669 virtual void negate() { }
670 virtual const class Type *bottom_type() const { return TypeTuple::IFBOTH; }
671 virtual uint ideal_reg() const { return NotAMachineReg; }
672 virtual const RegMask &in_RegMask(uint) const;
673 virtual const RegMask &out_RegMask() const { return RegMask::Empty; }
674 #ifndef PRODUCT
675 virtual const char *Name() const { return "NullCheck"; }
676 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
677 #endif
678 };
679
680 //------------------------------MachProjNode----------------------------------
681 // Machine-dependent Ideal projections (how is that for an oxymoron). Really
682 // just MachNodes made by the Ideal world that replicate simple projections
683 // but with machine-dependent input & output register masks. Generally
684 // produced as part of calling conventions. Normally I make MachNodes as part
685 // of the Matcher process, but the Matcher is ill suited to issues involving
686 // frame handling, so frame handling is all done in the Ideal world with
687 // occasional callbacks to the machine model for important info.
688 class MachProjNode : public ProjNode {
689 public:
690 MachProjNode( Node *multi, uint con, const RegMask &out, uint ideal_reg ) : ProjNode(multi,con), _rout(out), _ideal_reg(ideal_reg) {
691 init_class_id(Class_MachProj);
692 }
693 RegMask _rout;
694 const uint _ideal_reg;
695 enum projType {
696 unmatched_proj = 0, // Projs for Control, I/O, memory not matched
697 fat_proj = 999 // Projs killing many regs, defined by _rout
698 };
699 virtual int Opcode() const;
700 virtual const Type *bottom_type() const;
701 virtual const TypePtr *adr_type() const;
702 virtual const RegMask &in_RegMask(uint) const { return RegMask::Empty; }
703 virtual const RegMask &out_RegMask() const { return _rout; }
704 virtual uint ideal_reg() const { return _ideal_reg; }
705 // Need size_of() for virtual ProjNode::clone()
706 virtual uint size_of() const { return sizeof(MachProjNode); }
707 #ifndef PRODUCT
708 virtual void dump_spec(outputStream *st) const;
709 #endif
710 };
711
712 //------------------------------MachIfNode-------------------------------------
713 // Machine-specific versions of IfNodes
714 class MachIfNode : public MachBranchNode {
715 virtual uint size_of() const { return sizeof(*this); } // Size is bigger
716 public:
717 float _prob; // Probability branch goes either way
718 float _fcnt; // Frequency counter
719 MachIfNode() : MachBranchNode() {
720 init_class_id(Class_MachIf);
721 }
722 // Negate conditional branches.
723 virtual void negate() = 0;
724 #ifndef PRODUCT
725 virtual void dump_spec(outputStream *st) const;
726 #endif
727 };
728
729 //------------------------------MachGotoNode-----------------------------------
730 // Machine-specific versions of GotoNodes
731 class MachGotoNode : public MachBranchNode {
732 public:
733 MachGotoNode() : MachBranchNode() {
734 init_class_id(Class_MachGoto);
735 }
736 };
737
738 //------------------------------MachFastLockNode-------------------------------------
739 // Machine-specific versions of FastLockNodes
740 class MachFastLockNode : public MachNode {
741 virtual uint size_of() const { return sizeof(*this); } // Size is bigger
742 public:
743 BiasedLockingCounters* _counters;
744
745 MachFastLockNode() : MachNode() {}
746 };
747
748 //------------------------------MachReturnNode--------------------------------
749 // Machine-specific versions of subroutine returns
750 class MachReturnNode : public MachNode {
751 virtual uint size_of() const; // Size is bigger
752 public:
753 RegMask *_in_rms; // Input register masks, set during allocation
754 ReallocMark _nesting; // assertion check for reallocations
755 const TypePtr* _adr_type; // memory effects of call or return
756 MachReturnNode() : MachNode() {
757 init_class_id(Class_MachReturn);
758 _adr_type = TypePtr::BOTTOM; // the default: all of memory
759 }
760
761 void set_adr_type(const TypePtr* atp) { _adr_type = atp; }
762
763 virtual const RegMask &in_RegMask(uint) const;
764 virtual bool pinned() const { return true; };
765 virtual const TypePtr *adr_type() const;
766 };
767
768 //------------------------------MachSafePointNode-----------------------------
769 // Machine-specific versions of safepoints
770 class MachSafePointNode : public MachReturnNode {
771 public:
772 OopMap* _oop_map; // Array of OopMap info (8-bit char) for GC
773 JVMState* _jvms; // Pointer to list of JVM State Objects
774 uint _jvmadj; // Extra delta to jvms indexes (mach. args)
775 OopMap* oop_map() const { return _oop_map; }
776 void set_oop_map(OopMap* om) { _oop_map = om; }
777
778 MachSafePointNode() : MachReturnNode(), _oop_map(NULL), _jvms(NULL), _jvmadj(0) {
779 init_class_id(Class_MachSafePoint);
780 }
781
782 virtual JVMState* jvms() const { return _jvms; }
783 void set_jvms(JVMState* s) {
784 _jvms = s;
785 }
786 virtual const Type *bottom_type() const;
787
788 virtual const RegMask &in_RegMask(uint) const;
789
790 // Functionality from old debug nodes
791 Node *returnadr() const { return in(TypeFunc::ReturnAdr); }
792 Node *frameptr () const { return in(TypeFunc::FramePtr); }
793
794 Node *local(const JVMState* jvms, uint idx) const {
795 assert(verify_jvms(jvms), "jvms must match");
796 return in(_jvmadj + jvms->locoff() + idx);
797 }
798 Node *stack(const JVMState* jvms, uint idx) const {
799 assert(verify_jvms(jvms), "jvms must match");
800 return in(_jvmadj + jvms->stkoff() + idx);
801 }
802 Node *monitor_obj(const JVMState* jvms, uint idx) const {
803 assert(verify_jvms(jvms), "jvms must match");
804 return in(_jvmadj + jvms->monitor_obj_offset(idx));
805 }
806 Node *monitor_box(const JVMState* jvms, uint idx) const {
807 assert(verify_jvms(jvms), "jvms must match");
808 return in(_jvmadj + jvms->monitor_box_offset(idx));
809 }
810 void set_local(const JVMState* jvms, uint idx, Node *c) {
811 assert(verify_jvms(jvms), "jvms must match");
812 set_req(_jvmadj + jvms->locoff() + idx, c);
813 }
814 void set_stack(const JVMState* jvms, uint idx, Node *c) {
815 assert(verify_jvms(jvms), "jvms must match");
816 set_req(_jvmadj + jvms->stkoff() + idx, c);
817 }
818 void set_monitor(const JVMState* jvms, uint idx, Node *c) {
819 assert(verify_jvms(jvms), "jvms must match");
820 set_req(_jvmadj + jvms->monoff() + idx, c);
821 }
822 };
823
824 //------------------------------MachCallNode----------------------------------
825 // Machine-specific versions of subroutine calls
826 class MachCallNode : public MachSafePointNode {
827 protected:
828 virtual uint hash() const { return NO_HASH; } // CFG nodes do not hash
829 virtual uint cmp( const Node &n ) const;
830 virtual uint size_of() const = 0; // Size is bigger
831 public:
832 const TypeFunc *_tf; // Function type
833 address _entry_point; // Address of the method being called
834 float _cnt; // Estimate of number of times called
835 uint _argsize; // Size of argument block on stack
836
837 const TypeFunc* tf() const { return _tf; }
838 const address entry_point() const { return _entry_point; }
839 const float cnt() const { return _cnt; }
840 uint argsize() const { return _argsize; }
841
842 void set_tf(const TypeFunc* tf) { _tf = tf; }
843 void set_entry_point(address p) { _entry_point = p; }
844 void set_cnt(float c) { _cnt = c; }
845 void set_argsize(int s) { _argsize = s; }
846
847 MachCallNode() : MachSafePointNode() {
848 init_class_id(Class_MachCall);
849 }
850
851 virtual const Type *bottom_type() const;
852 virtual bool pinned() const { return false; }
853 virtual const Type *Value( PhaseTransform *phase ) const;
854 virtual const RegMask &in_RegMask(uint) const;
855 virtual int ret_addr_offset() { return 0; }
856
857 bool returns_long() const { return tf()->return_type() == T_LONG; }
858 bool return_value_is_used() const;
859 #ifndef PRODUCT
860 virtual void dump_spec(outputStream *st) const;
861 #endif
862 };
863
864 //------------------------------MachCallJavaNode------------------------------
865 // "Base" class for machine-specific versions of subroutine calls
866 class MachCallJavaNode : public MachCallNode {
867 protected:
868 virtual uint cmp( const Node &n ) const;
869 virtual uint size_of() const; // Size is bigger
870 public:
871 ciMethod* _method; // Method being direct called
872 int _bci; // Byte Code index of call byte code
873 bool _optimized_virtual; // Tells if node is a static call or an optimized virtual
874 bool _method_handle_invoke; // Tells if the call has to preserve SP
875 MachCallJavaNode() : MachCallNode() {
876 init_class_id(Class_MachCallJava);
877 }
878
879 virtual const RegMask &in_RegMask(uint) const;
880
881 #ifndef PRODUCT
882 virtual void dump_spec(outputStream *st) const;
883 #endif
884 };
885
886 //------------------------------MachCallStaticJavaNode------------------------
887 // Machine-specific versions of monomorphic subroutine calls
888 class MachCallStaticJavaNode : public MachCallJavaNode {
889 virtual uint cmp( const Node &n ) const;
890 virtual uint size_of() const; // Size is bigger
891 public:
892 const char *_name; // Runtime wrapper name
893 MachCallStaticJavaNode() : MachCallJavaNode() {
894 init_class_id(Class_MachCallStaticJava);
895 }
896
897 // If this is an uncommon trap, return the request code, else zero.
898 int uncommon_trap_request() const;
899
900 virtual int ret_addr_offset();
901 #ifndef PRODUCT
902 virtual void dump_spec(outputStream *st) const;
903 void dump_trap_args(outputStream *st) const;
904 #endif
905 };
906
907 //------------------------------MachCallDynamicJavaNode------------------------
908 // Machine-specific versions of possibly megamorphic subroutine calls
909 class MachCallDynamicJavaNode : public MachCallJavaNode {
910 public:
911 int _vtable_index;
912 MachCallDynamicJavaNode() : MachCallJavaNode() {
913 init_class_id(Class_MachCallDynamicJava);
914 DEBUG_ONLY(_vtable_index = -99); // throw an assert if uninitialized
915 }
916 virtual int ret_addr_offset();
917 #ifndef PRODUCT
918 virtual void dump_spec(outputStream *st) const;
919 #endif
920 };
921
922 //------------------------------MachCallRuntimeNode----------------------------
923 // Machine-specific versions of subroutine calls
924 class MachCallRuntimeNode : public MachCallNode {
925 virtual uint cmp( const Node &n ) const;
926 virtual uint size_of() const; // Size is bigger
927 public:
928 const char *_name; // Printable name, if _method is NULL
929 MachCallRuntimeNode() : MachCallNode() {
930 init_class_id(Class_MachCallRuntime);
931 }
932 virtual int ret_addr_offset();
933 #ifndef PRODUCT
934 virtual void dump_spec(outputStream *st) const;
935 #endif
936 };
937
938 class MachCallLeafNode: public MachCallRuntimeNode {
939 public:
940 MachCallLeafNode() : MachCallRuntimeNode() {
941 init_class_id(Class_MachCallLeaf);
942 }
943 };
944
945 //------------------------------MachHaltNode-----------------------------------
946 // Machine-specific versions of halt nodes
947 class MachHaltNode : public MachReturnNode {
948 public:
949 virtual JVMState* jvms() const;
950 };
951
952
953 //------------------------------MachTempNode-----------------------------------
954 // Node used by the adlc to construct inputs to represent temporary registers
955 class MachTempNode : public MachNode {
956 private:
957 MachOper *_opnd_array[1];
958
959 public:
960 virtual const RegMask &out_RegMask() const { return *_opnds[0]->in_RegMask(0); }
961 virtual uint rule() const { return 9999999; }
962 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const {}
963
964 MachTempNode(MachOper* oper) {
965 init_class_id(Class_MachTemp);
966 _num_opnds = 1;
967 _opnds = _opnd_array;
968 add_req(NULL);
969 _opnds[0] = oper;
970 }
971 virtual uint size_of() const { return sizeof(MachTempNode); }
972
973 #ifndef PRODUCT
974 virtual void format(PhaseRegAlloc *, outputStream *st ) const {}
975 virtual const char *Name() const { return "MachTemp";}
976 #endif
977 };
978
979
980
981 //------------------------------labelOper--------------------------------------
982 // Machine-independent version of label operand
983 class labelOper : public MachOper {
984 private:
985 virtual uint num_edges() const { return 0; }
986 public:
987 // Supported for fixed size branches
988 Label* _label; // Label for branch(es)
989
990 uint _block_num;
991
992 labelOper() : _block_num(0), _label(0) {}
993
994 labelOper(Label* label, uint block_num) : _label(label), _block_num(block_num) {}
995
996 labelOper(labelOper* l) : _label(l->_label) , _block_num(l->_block_num) {}
997
998 virtual MachOper *clone(Compile* C) const;
999
1000 virtual Label *label() const { assert(_label != NULL, "need Label"); return _label; }
1001
1002 virtual uint opcode() const;
1003
1004 virtual uint hash() const;
1005 virtual uint cmp( const MachOper &oper ) const;
1006 #ifndef PRODUCT
1007 virtual const char *Name() const { return "Label";}
1008
1009 virtual void int_format(PhaseRegAlloc *ra, const MachNode *node, outputStream *st) const;
1010 virtual void ext_format(PhaseRegAlloc *ra, const MachNode *node, int idx, outputStream *st) const { int_format( ra, node, st ); }
1011 #endif
1012 };
1013
1014
1015 //------------------------------methodOper--------------------------------------
1016 // Machine-independent version of method operand
1017 class methodOper : public MachOper {
1018 private:
1019 virtual uint num_edges() const { return 0; }
1020 public:
1021 intptr_t _method; // Address of method
1022 methodOper() : _method(0) {}
1023 methodOper(intptr_t method) : _method(method) {}
1024
1025 virtual MachOper *clone(Compile* C) const;
1026
1027 virtual intptr_t method() const { return _method; }
1028
1029 virtual uint opcode() const;
1030
1031 virtual uint hash() const;
1032 virtual uint cmp( const MachOper &oper ) const;
1033 #ifndef PRODUCT
1034 virtual const char *Name() const { return "Method";}
1035
1036 virtual void int_format(PhaseRegAlloc *ra, const MachNode *node, outputStream *st) const;
1037 virtual void ext_format(PhaseRegAlloc *ra, const MachNode *node, int idx, outputStream *st) const { int_format( ra, node, st ); }
1038 #endif
1039 };
1040
1041 #endif // SHARE_VM_OPTO_MACHNODE_HPP