200 break; // Found it
201 } else {
202 continue; // Skip it
203 }
204 }
205 break;
206 }
207 // check if the offset is not too high for implicit exception
208 {
209 intptr_t offset = 0;
210 const TypePtr *adr_type = NULL; // Do not need this return value here
211 const Node* base = mach->get_base_and_disp(offset, adr_type);
212 if (base == NULL || base == NodeSentinel) {
213 // Narrow oop address doesn't have base, only index
214 if( val->bottom_type()->isa_narrowoop() &&
215 MacroAssembler::needs_explicit_null_check(offset) )
216 continue; // Give up if offset is beyond page size
217 // cannot reason about it; is probably not implicit null exception
218 } else {
219 const TypePtr* tptr;
220 if (UseCompressedOops && Universe::narrow_oop_shift() == 0) {
221 // 32-bits narrow oop can be the base of address expressions
222 tptr = base->bottom_type()->make_ptr();
223 } else {
224 // only regular oops are expected here
225 tptr = base->bottom_type()->is_ptr();
226 }
227 // Give up if offset is not a compile-time constant
228 if( offset == Type::OffsetBot || tptr->_offset == Type::OffsetBot )
229 continue;
230 offset += tptr->_offset; // correct if base is offseted
231 if( MacroAssembler::needs_explicit_null_check(offset) )
232 continue; // Give up is reference is beyond 4K page size
233 }
234 }
235
236 // Check ctrl input to see if the null-check dominates the memory op
237 Block *cb = cfg->_bbs[mach->_idx];
238 cb = cb->_idom; // Always hoist at least 1 block
239 if( !was_store ) { // Stores can be hoisted only one block
240 while( cb->_dom_depth > (_dom_depth + 1))
241 cb = cb->_idom; // Hoist loads as far as we want
242 // The non-null-block should dominate the memory op, too. Live
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200 break; // Found it
201 } else {
202 continue; // Skip it
203 }
204 }
205 break;
206 }
207 // check if the offset is not too high for implicit exception
208 {
209 intptr_t offset = 0;
210 const TypePtr *adr_type = NULL; // Do not need this return value here
211 const Node* base = mach->get_base_and_disp(offset, adr_type);
212 if (base == NULL || base == NodeSentinel) {
213 // Narrow oop address doesn't have base, only index
214 if( val->bottom_type()->isa_narrowoop() &&
215 MacroAssembler::needs_explicit_null_check(offset) )
216 continue; // Give up if offset is beyond page size
217 // cannot reason about it; is probably not implicit null exception
218 } else {
219 const TypePtr* tptr;
220 if (UseCompressedOops && (Universe::narrow_oop_shift() == 0)) {
221 // 32-bits narrow oop can be the base of address expressions
222 tptr = base->get_ptr_type();
223 } else {
224 // only regular oops are expected here
225 tptr = base->bottom_type()->is_ptr();
226 }
227 // Give up if offset is not a compile-time constant
228 if( offset == Type::OffsetBot || tptr->_offset == Type::OffsetBot )
229 continue;
230 offset += tptr->_offset; // correct if base is offseted
231 if( MacroAssembler::needs_explicit_null_check(offset) )
232 continue; // Give up is reference is beyond 4K page size
233 }
234 }
235
236 // Check ctrl input to see if the null-check dominates the memory op
237 Block *cb = cfg->_bbs[mach->_idx];
238 cb = cb->_idom; // Always hoist at least 1 block
239 if( !was_store ) { // Stores can be hoisted only one block
240 while( cb->_dom_depth > (_dom_depth + 1))
241 cb = cb->_idom; // Hoist loads as far as we want
242 // The non-null-block should dominate the memory op, too. Live
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