Print this page
rev 6900 : 8048169: Change 8037816 breaks HS build on PPC64 and CPP-Interpreter platforms
Summary: Fix the matching of format string parameter types to the actual argument types for the PPC64 and CPP-Interpreter files in the same way as 8037816 already did it for all the other files
Reviewed-by: stefank, coleenp, dholmes
| Split |
Split |
Close |
| Expand all |
| Collapse all |
--- old/hotspot/src/cpu/ppc/vm/vm_version_ppc.cpp
+++ new/hotspot/src/cpu/ppc/vm/vm_version_ppc.cpp
1 1 /*
2 2 * Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved.
3 3 * Copyright 2012, 2014 SAP AG. All rights reserved.
4 4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
5 5 *
6 6 * This code is free software; you can redistribute it and/or modify it
7 7 * under the terms of the GNU General Public License version 2 only, as
8 8 * published by the Free Software Foundation.
9 9 *
10 10 * This code is distributed in the hope that it will be useful, but WITHOUT
11 11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 13 * version 2 for more details (a copy is included in the LICENSE file that
14 14 * accompanied this code).
15 15 *
16 16 * You should have received a copy of the GNU General Public License version
17 17 * 2 along with this work; if not, write to the Free Software Foundation,
18 18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 19 *
20 20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 21 * or visit www.oracle.com if you need additional information or have any
22 22 * questions.
23 23 *
24 24 */
25 25
26 26 #include "precompiled.hpp"
27 27 #include "asm/assembler.inline.hpp"
28 28 #include "asm/macroAssembler.inline.hpp"
29 29 #include "compiler/disassembler.hpp"
30 30 #include "memory/resourceArea.hpp"
31 31 #include "runtime/java.hpp"
32 32 #include "runtime/stubCodeGenerator.hpp"
33 33 #include "utilities/defaultStream.hpp"
34 34 #include "vm_version_ppc.hpp"
35 35 #ifdef TARGET_OS_FAMILY_aix
36 36 # include "os_aix.inline.hpp"
37 37 #endif
38 38 #ifdef TARGET_OS_FAMILY_linux
39 39 # include "os_linux.inline.hpp"
40 40 #endif
41 41
42 42 # include <sys/sysinfo.h>
43 43
44 44 int VM_Version::_features = VM_Version::unknown_m;
45 45 int VM_Version::_measured_cache_line_size = 128; // default value
46 46 const char* VM_Version::_features_str = "";
47 47 bool VM_Version::_is_determine_features_test_running = false;
48 48
49 49
50 50 #define MSG(flag) \
51 51 if (flag && !FLAG_IS_DEFAULT(flag)) \
52 52 jio_fprintf(defaultStream::error_stream(), \
53 53 "warning: -XX:+" #flag " requires -XX:+UseSIGTRAP\n" \
54 54 " -XX:+" #flag " will be disabled!\n");
55 55
56 56 void VM_Version::initialize() {
57 57
58 58 // Test which instructions are supported and measure cache line size.
59 59 determine_features();
60 60
61 61 // If PowerArchitecturePPC64 hasn't been specified explicitly determine from features.
62 62 if (FLAG_IS_DEFAULT(PowerArchitecturePPC64)) {
63 63 if (VM_Version::has_popcntw()) {
64 64 FLAG_SET_ERGO(uintx, PowerArchitecturePPC64, 7);
65 65 } else if (VM_Version::has_cmpb()) {
66 66 FLAG_SET_ERGO(uintx, PowerArchitecturePPC64, 6);
67 67 } else if (VM_Version::has_popcntb()) {
68 68 FLAG_SET_ERGO(uintx, PowerArchitecturePPC64, 5);
69 69 } else {
70 70 FLAG_SET_ERGO(uintx, PowerArchitecturePPC64, 0);
71 71 }
72 72 }
73 73 guarantee(PowerArchitecturePPC64 == 0 || PowerArchitecturePPC64 == 5 ||
74 74 PowerArchitecturePPC64 == 6 || PowerArchitecturePPC64 == 7,
75 75 "PowerArchitecturePPC64 should be 0, 5, 6 or 7");
76 76
77 77 if (!UseSIGTRAP) {
78 78 MSG(TrapBasedICMissChecks);
79 79 MSG(TrapBasedNotEntrantChecks);
80 80 MSG(TrapBasedNullChecks);
81 81 FLAG_SET_ERGO(bool, TrapBasedNotEntrantChecks, false);
82 82 FLAG_SET_ERGO(bool, TrapBasedNullChecks, false);
83 83 FLAG_SET_ERGO(bool, TrapBasedICMissChecks, false);
84 84 }
85 85
86 86 #ifdef COMPILER2
87 87 if (!UseSIGTRAP) {
88 88 MSG(TrapBasedRangeChecks);
89 89 FLAG_SET_ERGO(bool, TrapBasedRangeChecks, false);
90 90 }
91 91
92 92 // On Power6 test for section size.
93 93 if (PowerArchitecturePPC64 == 6) {
94 94 determine_section_size();
95 95 // TODO: PPC port } else {
96 96 // TODO: PPC port PdScheduling::power6SectorSize = 0x20;
97 97 }
98 98
99 99 MaxVectorSize = 8;
100 100 #endif
101 101
102 102 // Create and print feature-string.
103 103 char buf[(num_features+1) * 16]; // Max 16 chars per feature.
104 104 jio_snprintf(buf, sizeof(buf),
105 105 "ppc64%s%s%s%s%s%s%s%s",
106 106 (has_fsqrt() ? " fsqrt" : ""),
107 107 (has_isel() ? " isel" : ""),
108 108 (has_lxarxeh() ? " lxarxeh" : ""),
109 109 (has_cmpb() ? " cmpb" : ""),
110 110 //(has_mftgpr()? " mftgpr" : ""),
111 111 (has_popcntb() ? " popcntb" : ""),
112 112 (has_popcntw() ? " popcntw" : ""),
113 113 (has_fcfids() ? " fcfids" : ""),
114 114 (has_vand() ? " vand" : "")
115 115 // Make sure number of %s matches num_features!
116 116 );
117 117 _features_str = strdup(buf);
118 118 NOT_PRODUCT(if (Verbose) print_features(););
119 119
120 120 // PPC64 supports 8-byte compare-exchange operations (see
121 121 // Atomic::cmpxchg and StubGenerator::generate_atomic_cmpxchg_ptr)
122 122 // and 'atomic long memory ops' (see Unsafe_GetLongVolatile).
123 123 _supports_cx8 = true;
124 124
125 125 UseSSE = 0; // Only on x86 and x64
126 126
127 127 intx cache_line_size = _measured_cache_line_size;
128 128
129 129 if (FLAG_IS_DEFAULT(AllocatePrefetchStyle)) AllocatePrefetchStyle = 1;
130 130
131 131 if (AllocatePrefetchStyle == 4) {
132 132 AllocatePrefetchStepSize = cache_line_size; // Need exact value.
133 133 if (FLAG_IS_DEFAULT(AllocatePrefetchLines)) AllocatePrefetchLines = 12; // Use larger blocks by default.
134 134 if (AllocatePrefetchDistance < 0) AllocatePrefetchDistance = 2*cache_line_size; // Default is not defined?
135 135 } else {
136 136 if (cache_line_size > AllocatePrefetchStepSize) AllocatePrefetchStepSize = cache_line_size;
137 137 if (FLAG_IS_DEFAULT(AllocatePrefetchLines)) AllocatePrefetchLines = 3; // Optimistic value.
138 138 if (AllocatePrefetchDistance < 0) AllocatePrefetchDistance = 3*cache_line_size; // Default is not defined?
139 139 }
140 140
141 141 assert(AllocatePrefetchLines > 0, "invalid value");
142 142 if (AllocatePrefetchLines < 1) // Set valid value in product VM.
143 143 AllocatePrefetchLines = 1; // Conservative value.
144 144
145 145 if (AllocatePrefetchStyle == 3 && AllocatePrefetchDistance < cache_line_size)
146 146 AllocatePrefetchStyle = 1; // Fall back if inappropriate.
147 147
148 148 assert(AllocatePrefetchStyle >= 0, "AllocatePrefetchStyle should be positive");
149 149 }
150 150
151 151 void VM_Version::print_features() {
152 152 tty->print_cr("Version: %s cache_line_size = %d", cpu_features(), (int) get_cache_line_size());
153 153 }
154 154
155 155 #ifdef COMPILER2
156 156 // Determine section size on power6: If section size is 8 instructions,
157 157 // there should be a difference between the two testloops of ~15 %. If
158 158 // no difference is detected the section is assumed to be 32 instructions.
159 159 void VM_Version::determine_section_size() {
160 160
161 161 int unroll = 80;
162 162
163 163 const int code_size = (2* unroll * 32 + 100)*BytesPerInstWord;
164 164
165 165 // Allocate space for the code.
166 166 ResourceMark rm;
167 167 CodeBuffer cb("detect_section_size", code_size, 0);
168 168 MacroAssembler* a = new MacroAssembler(&cb);
169 169
170 170 uint32_t *code = (uint32_t *)a->pc();
171 171 // Emit code.
172 172 void (*test1)() = (void(*)())(void *)a->function_entry();
173 173
174 174 Label l1;
175 175
176 176 a->li(R4, 1);
177 177 a->sldi(R4, R4, 28);
178 178 a->b(l1);
179 179 a->align(CodeEntryAlignment);
180 180
181 181 a->bind(l1);
182 182
183 183 for (int i = 0; i < unroll; i++) {
184 184 // Schleife 1
185 185 // ------- sector 0 ------------
186 186 // ;; 0
187 187 a->nop(); // 1
188 188 a->fpnop0(); // 2
189 189 a->fpnop1(); // 3
190 190 a->addi(R4,R4, -1); // 4
191 191
192 192 // ;; 1
193 193 a->nop(); // 5
194 194 a->fmr(F6, F6); // 6
195 195 a->fmr(F7, F7); // 7
196 196 a->endgroup(); // 8
197 197 // ------- sector 8 ------------
198 198
199 199 // ;; 2
200 200 a->nop(); // 9
201 201 a->nop(); // 10
202 202 a->fmr(F8, F8); // 11
203 203 a->fmr(F9, F9); // 12
204 204
205 205 // ;; 3
206 206 a->nop(); // 13
207 207 a->fmr(F10, F10); // 14
208 208 a->fmr(F11, F11); // 15
209 209 a->endgroup(); // 16
210 210 // -------- sector 16 -------------
211 211
212 212 // ;; 4
213 213 a->nop(); // 17
214 214 a->nop(); // 18
215 215 a->fmr(F15, F15); // 19
216 216 a->fmr(F16, F16); // 20
217 217
218 218 // ;; 5
219 219 a->nop(); // 21
220 220 a->fmr(F17, F17); // 22
221 221 a->fmr(F18, F18); // 23
222 222 a->endgroup(); // 24
223 223 // ------- sector 24 ------------
224 224
225 225 // ;; 6
226 226 a->nop(); // 25
227 227 a->nop(); // 26
228 228 a->fmr(F19, F19); // 27
229 229 a->fmr(F20, F20); // 28
230 230
231 231 // ;; 7
232 232 a->nop(); // 29
233 233 a->fmr(F21, F21); // 30
234 234 a->fmr(F22, F22); // 31
235 235 a->brnop0(); // 32
236 236
237 237 // ------- sector 32 ------------
238 238 }
239 239
240 240 // ;; 8
241 241 a->cmpdi(CCR0, R4, unroll); // 33
242 242 a->bge(CCR0, l1); // 34
243 243 a->blr();
244 244
245 245 // Emit code.
246 246 void (*test2)() = (void(*)())(void *)a->function_entry();
247 247 // uint32_t *code = (uint32_t *)a->pc();
248 248
249 249 Label l2;
250 250
251 251 a->li(R4, 1);
252 252 a->sldi(R4, R4, 28);
253 253 a->b(l2);
254 254 a->align(CodeEntryAlignment);
255 255
256 256 a->bind(l2);
257 257
258 258 for (int i = 0; i < unroll; i++) {
259 259 // Schleife 2
260 260 // ------- sector 0 ------------
261 261 // ;; 0
262 262 a->brnop0(); // 1
263 263 a->nop(); // 2
264 264 //a->cmpdi(CCR0, R4, unroll);
265 265 a->fpnop0(); // 3
266 266 a->fpnop1(); // 4
267 267 a->addi(R4,R4, -1); // 5
268 268
269 269 // ;; 1
270 270
271 271 a->nop(); // 6
272 272 a->fmr(F6, F6); // 7
273 273 a->fmr(F7, F7); // 8
274 274 // ------- sector 8 ---------------
275 275
276 276 // ;; 2
277 277 a->endgroup(); // 9
278 278
279 279 // ;; 3
280 280 a->nop(); // 10
281 281 a->nop(); // 11
282 282 a->fmr(F8, F8); // 12
283 283
284 284 // ;; 4
285 285 a->fmr(F9, F9); // 13
286 286 a->nop(); // 14
287 287 a->fmr(F10, F10); // 15
288 288
289 289 // ;; 5
290 290 a->fmr(F11, F11); // 16
291 291 // -------- sector 16 -------------
292 292
293 293 // ;; 6
294 294 a->endgroup(); // 17
295 295
296 296 // ;; 7
297 297 a->nop(); // 18
298 298 a->nop(); // 19
299 299 a->fmr(F15, F15); // 20
300 300
301 301 // ;; 8
302 302 a->fmr(F16, F16); // 21
303 303 a->nop(); // 22
304 304 a->fmr(F17, F17); // 23
305 305
306 306 // ;; 9
307 307 a->fmr(F18, F18); // 24
308 308 // -------- sector 24 -------------
309 309
310 310 // ;; 10
311 311 a->endgroup(); // 25
312 312
313 313 // ;; 11
314 314 a->nop(); // 26
315 315 a->nop(); // 27
316 316 a->fmr(F19, F19); // 28
317 317
318 318 // ;; 12
319 319 a->fmr(F20, F20); // 29
320 320 a->nop(); // 30
321 321 a->fmr(F21, F21); // 31
322 322
323 323 // ;; 13
324 324 a->fmr(F22, F22); // 32
325 325 }
326 326
327 327 // -------- sector 32 -------------
328 328 // ;; 14
329 329 a->cmpdi(CCR0, R4, unroll); // 33
330 330 a->bge(CCR0, l2); // 34
331 331
332 332 a->blr();
333 333 uint32_t *code_end = (uint32_t *)a->pc();
334 334 a->flush();
335 335
336 336 double loop1_seconds,loop2_seconds, rel_diff;
337 337 uint64_t start1, stop1;
338 338
339 339 start1 = os::current_thread_cpu_time(false);
340 340 (*test1)();
341 341 stop1 = os::current_thread_cpu_time(false);
342 342 loop1_seconds = (stop1- start1) / (1000 *1000 *1000.0);
343 343
344 344
|
↓ open down ↓ |
344 lines elided |
↑ open up ↑ |
345 345 start1 = os::current_thread_cpu_time(false);
346 346 (*test2)();
347 347 stop1 = os::current_thread_cpu_time(false);
348 348
349 349 loop2_seconds = (stop1 - start1) / (1000 *1000 *1000.0);
350 350
351 351 rel_diff = (loop2_seconds - loop1_seconds) / loop1_seconds *100;
352 352
353 353 if (PrintAssembly) {
354 354 ttyLocker ttyl;
355 - tty->print_cr("Decoding section size detection stub at " INTPTR_FORMAT " before execution:", code);
355 + tty->print_cr("Decoding section size detection stub at " INTPTR_FORMAT " before execution:", p2i(code));
356 356 Disassembler::decode((u_char*)code, (u_char*)code_end, tty);
357 357 tty->print_cr("Time loop1 :%f", loop1_seconds);
358 358 tty->print_cr("Time loop2 :%f", loop2_seconds);
359 359 tty->print_cr("(time2 - time1) / time1 = %f %%", rel_diff);
360 360
361 361 if (rel_diff > 12.0) {
362 362 tty->print_cr("Section Size 8 Instructions");
363 363 } else{
364 364 tty->print_cr("Section Size 32 Instructions or Power5");
365 365 }
366 366 }
367 367
368 368 #if 0 // TODO: PPC port
369 369 // Set sector size (if not set explicitly).
370 370 if (FLAG_IS_DEFAULT(Power6SectorSize128PPC64)) {
371 371 if (rel_diff > 12.0) {
372 372 PdScheduling::power6SectorSize = 0x20;
373 373 } else {
374 374 PdScheduling::power6SectorSize = 0x80;
375 375 }
376 376 } else if (Power6SectorSize128PPC64) {
377 377 PdScheduling::power6SectorSize = 0x80;
378 378 } else {
379 379 PdScheduling::power6SectorSize = 0x20;
380 380 }
381 381 #endif
382 382 if (UsePower6SchedulerPPC64) Unimplemented();
383 383 }
384 384 #endif // COMPILER2
385 385
386 386 void VM_Version::determine_features() {
387 387 #if defined(ABI_ELFv2)
388 388 const int code_size = (num_features+1+2*7)*BytesPerInstWord; // TODO(asmundak): calculation is incorrect.
389 389 #else
390 390 // 7 InstWords for each call (function descriptor + blr instruction).
391 391 const int code_size = (num_features+1+2*7)*BytesPerInstWord;
392 392 #endif
393 393 int features = 0;
394 394
395 395 // create test area
396 396 enum { BUFFER_SIZE = 2*4*K }; // Needs to be >=2* max cache line size (cache line size can't exceed min page size).
397 397 char test_area[BUFFER_SIZE];
398 398 char *mid_of_test_area = &test_area[BUFFER_SIZE>>1];
399 399
400 400 // Allocate space for the code.
401 401 ResourceMark rm;
402 402 CodeBuffer cb("detect_cpu_features", code_size, 0);
403 403 MacroAssembler* a = new MacroAssembler(&cb);
404 404
405 405 // Must be set to true so we can generate the test code.
406 406 _features = VM_Version::all_features_m;
407 407
408 408 // Emit code.
409 409 void (*test)(address addr, uint64_t offset)=(void(*)(address addr, uint64_t offset))(void *)a->function_entry();
410 410 uint32_t *code = (uint32_t *)a->pc();
411 411 // Don't use R0 in ldarx.
412 412 // Keep R3_ARG1 unmodified, it contains &field (see below).
413 413 // Keep R4_ARG2 unmodified, it contains offset = 0 (see below).
414 414 a->fsqrt(F3, F4); // code[0] -> fsqrt_m
415 415 a->fsqrts(F3, F4); // code[1] -> fsqrts_m
416 416 a->isel(R7, R5, R6, 0); // code[2] -> isel_m
417 417 a->ldarx_unchecked(R7, R3_ARG1, R4_ARG2, 1); // code[3] -> lxarx_m
418 418 a->cmpb(R7, R5, R6); // code[4] -> bcmp
419 419 //a->mftgpr(R7, F3); // code[5] -> mftgpr
420 420 a->popcntb(R7, R5); // code[6] -> popcntb
421 421 a->popcntw(R7, R5); // code[7] -> popcntw
422 422 a->fcfids(F3, F4); // code[8] -> fcfids
423 423 a->vand(VR0, VR0, VR0); // code[9] -> vand
424 424 a->blr();
425 425
426 426 // Emit function to set one cache line to zero. Emit function descriptor and get pointer to it.
427 427 void (*zero_cacheline_func_ptr)(char*) = (void(*)(char*))(void *)a->function_entry();
|
↓ open down ↓ |
62 lines elided |
↑ open up ↑ |
428 428 a->dcbz(R3_ARG1); // R3_ARG1 = addr
429 429 a->blr();
430 430
431 431 uint32_t *code_end = (uint32_t *)a->pc();
432 432 a->flush();
433 433 _features = VM_Version::unknown_m;
434 434
435 435 // Print the detection code.
436 436 if (PrintAssembly) {
437 437 ttyLocker ttyl;
438 - tty->print_cr("Decoding cpu-feature detection stub at " INTPTR_FORMAT " before execution:", code);
438 + tty->print_cr("Decoding cpu-feature detection stub at " INTPTR_FORMAT " before execution:", p2i(code));
439 439 Disassembler::decode((u_char*)code, (u_char*)code_end, tty);
440 440 }
441 441
442 442 // Measure cache line size.
443 443 memset(test_area, 0xFF, BUFFER_SIZE); // Fill test area with 0xFF.
444 444 (*zero_cacheline_func_ptr)(mid_of_test_area); // Call function which executes dcbz to the middle.
445 445 int count = 0; // count zeroed bytes
446 446 for (int i = 0; i < BUFFER_SIZE; i++) if (test_area[i] == 0) count++;
447 447 guarantee(is_power_of_2(count), "cache line size needs to be a power of 2");
448 448 _measured_cache_line_size = count;
449 449
450 450 // Execute code. Illegal instructions will be replaced by 0 in the signal handler.
451 451 VM_Version::_is_determine_features_test_running = true;
452 452 (*test)((address)mid_of_test_area, (uint64_t)0);
453 453 VM_Version::_is_determine_features_test_running = false;
454 454
455 455 // determine which instructions are legal.
456 456 int feature_cntr = 0;
457 457 if (code[feature_cntr++]) features |= fsqrt_m;
458 458 if (code[feature_cntr++]) features |= fsqrts_m;
459 459 if (code[feature_cntr++]) features |= isel_m;
460 460 if (code[feature_cntr++]) features |= lxarxeh_m;
|
↓ open down ↓ |
12 lines elided |
↑ open up ↑ |
461 461 if (code[feature_cntr++]) features |= cmpb_m;
462 462 //if(code[feature_cntr++])features |= mftgpr_m;
463 463 if (code[feature_cntr++]) features |= popcntb_m;
464 464 if (code[feature_cntr++]) features |= popcntw_m;
465 465 if (code[feature_cntr++]) features |= fcfids_m;
466 466 if (code[feature_cntr++]) features |= vand_m;
467 467
468 468 // Print the detection code.
469 469 if (PrintAssembly) {
470 470 ttyLocker ttyl;
471 - tty->print_cr("Decoding cpu-feature detection stub at " INTPTR_FORMAT " after execution:", code);
471 + tty->print_cr("Decoding cpu-feature detection stub at " INTPTR_FORMAT " after execution:", p2i(code));
472 472 Disassembler::decode((u_char*)code, (u_char*)code_end, tty);
473 473 }
474 474
475 475 _features = features;
476 476 }
477 477
478 478
479 479 static int saved_features = 0;
480 480
481 481 void VM_Version::allow_all() {
482 482 saved_features = _features;
483 483 _features = all_features_m;
484 484 }
485 485
486 486 void VM_Version::revert() {
487 487 _features = saved_features;
488 488 }
XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX