1 /*
2 * Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #ifndef SHARE_VM_OPTO_MACHNODE_HPP
26 #define SHARE_VM_OPTO_MACHNODE_HPP
27
28 #include "opto/callnode.hpp"
29 #include "opto/matcher.hpp"
30 #include "opto/multnode.hpp"
31 #include "opto/node.hpp"
32 #include "opto/regmask.hpp"
33
34 class BiasedLockingCounters;
35 class BufferBlob;
36 class CodeBuffer;
37 class JVMState;
38 class MachCallDynamicJavaNode;
39 class MachCallJavaNode;
40 class MachCallLeafNode;
41 class MachCallNode;
42 class MachCallRuntimeNode;
43 class MachCallStaticJavaNode;
44 class MachEpilogNode;
45 class MachIfNode;
46 class MachNullCheckNode;
47 class MachOper;
48 class MachProjNode;
49 class MachPrologNode;
50 class MachReturnNode;
51 class MachSafePointNode;
52 class MachSpillCopyNode;
53 class Matcher;
54 class PhaseRegAlloc;
55 class RegMask;
56 class RTMLockingCounters;
57 class State;
58
59 //---------------------------MachOper------------------------------------------
60 class MachOper : public ResourceObj {
61 public:
62 // Allocate right next to the MachNodes in the same arena
63 void *operator new( size_t x, Compile* C ) throw() { return C->node_arena()->Amalloc_D(x); }
64
65 // Opcode
66 virtual uint opcode() const = 0;
67
68 // Number of input edges.
69 // Generally at least 1
70 virtual uint num_edges() const { return 1; }
71 // Array of Register masks
72 virtual const RegMask *in_RegMask(int index) const;
73
74 // Methods to output the encoding of the operand
75
76 // Negate conditional branches. Error for non-branch Nodes
77 virtual void negate();
78
79 // Return the value requested
80 // result register lookup, corresponding to int_format
81 virtual int reg(PhaseRegAlloc *ra_, const Node *node) const;
82 // input register lookup, corresponding to ext_format
83 virtual int reg(PhaseRegAlloc *ra_, const Node *node, int idx) const;
84
85 // helpers for MacroAssembler generation from ADLC
86 Register as_Register(PhaseRegAlloc *ra_, const Node *node) const {
87 return ::as_Register(reg(ra_, node));
88 }
89 Register as_Register(PhaseRegAlloc *ra_, const Node *node, int idx) const {
90 return ::as_Register(reg(ra_, node, idx));
91 }
92 FloatRegister as_FloatRegister(PhaseRegAlloc *ra_, const Node *node) const {
93 return ::as_FloatRegister(reg(ra_, node));
94 }
95 FloatRegister as_FloatRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const {
96 return ::as_FloatRegister(reg(ra_, node, idx));
97 }
98
99 #if defined(IA32) || defined(AMD64)
100 XMMRegister as_XMMRegister(PhaseRegAlloc *ra_, const Node *node) const {
101 return ::as_XMMRegister(reg(ra_, node));
102 }
103 XMMRegister as_XMMRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const {
104 return ::as_XMMRegister(reg(ra_, node, idx));
105 }
106 #endif
107 // CondRegister reg converter
108 #if defined(PPC64)
109 ConditionRegister as_ConditionRegister(PhaseRegAlloc *ra_, const Node *node) const {
110 return ::as_ConditionRegister(reg(ra_, node));
111 }
112 ConditionRegister as_ConditionRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const {
113 return ::as_ConditionRegister(reg(ra_, node, idx));
114 }
115 #endif
116
117 virtual intptr_t constant() const;
118 virtual relocInfo::relocType constant_reloc() const;
119 virtual jdouble constantD() const;
120 virtual jfloat constantF() const;
121 virtual jlong constantL() const;
122 virtual TypeOopPtr *oop() const;
123 virtual int ccode() const;
124 // A zero, default, indicates this value is not needed.
125 // May need to lookup the base register, as done in int_ and ext_format
126 virtual int base (PhaseRegAlloc *ra_, const Node *node, int idx) const;
127 virtual int index(PhaseRegAlloc *ra_, const Node *node, int idx) const;
128 virtual int scale() const;
129 // Parameters needed to support MEMORY_INTERFACE access to stackSlot
130 virtual int disp (PhaseRegAlloc *ra_, const Node *node, int idx) const;
131 // Check for PC-Relative displacement
132 virtual relocInfo::relocType disp_reloc() const;
133 virtual int constant_disp() const; // usu. 0, may return Type::OffsetBot
134 virtual int base_position() const; // base edge position, or -1
135 virtual int index_position() const; // index edge position, or -1
136
137 // Access the TypeKlassPtr of operands with a base==RegI and disp==RegP
138 // Only returns non-null value for i486.ad's indOffset32X
139 virtual const TypePtr *disp_as_type() const { return NULL; }
140
141 // Return the label
142 virtual Label *label() const;
143
144 // Return the method's address
145 virtual intptr_t method() const;
146
147 // Hash and compare over operands are currently identical
148 virtual uint hash() const;
149 virtual uint cmp( const MachOper &oper ) const;
150
151 // Virtual clone, since I do not know how big the MachOper is.
152 virtual MachOper *clone(Compile* C) const = 0;
153
154 // Return ideal Type from simple operands. Fail for complex operands.
155 virtual const Type *type() const;
156
157 // Set an integer offset if we have one, or error otherwise
158 virtual void set_con( jint c0 ) { ShouldNotReachHere(); }
159
160 #ifndef PRODUCT
161 // Return name of operand
162 virtual const char *Name() const { return "???";}
163
164 // Methods to output the text version of the operand
165 virtual void int_format(PhaseRegAlloc *,const MachNode *node, outputStream *st) const = 0;
166 virtual void ext_format(PhaseRegAlloc *,const MachNode *node,int idx, outputStream *st) const=0;
167
168 virtual void dump_spec(outputStream *st) const; // Print per-operand info
169
170 // Check whether o is a valid oper.
171 static bool notAnOper(const MachOper *o) {
172 if (o == NULL) return true;
173 if (((intptr_t)o & 1) != 0) return true;
174 if (*(address*)o == badAddress) return true; // kill by Node::destruct
175 return false;
176 }
177 #endif // !PRODUCT
178 };
179
180 //------------------------------MachNode---------------------------------------
181 // Base type for all machine specific nodes. All node classes generated by the
182 // ADLC inherit from this class.
183 class MachNode : public Node {
184 public:
185 MachNode() : Node((uint)0), _num_opnds(0), _opnds(NULL) {
186 init_class_id(Class_Mach);
187 }
188 // Required boilerplate
189 virtual uint size_of() const { return sizeof(MachNode); }
190 virtual int Opcode() const; // Always equal to MachNode
191 virtual uint rule() const = 0; // Machine-specific opcode
192 // Number of inputs which come before the first operand.
193 // Generally at least 1, to skip the Control input
194 virtual uint oper_input_base() const { return 1; }
195 // Position of constant base node in node's inputs. -1 if
196 // no constant base node input.
197 virtual uint mach_constant_base_node_input() const { return (uint)-1; }
198
199 // Copy inputs and operands to new node of instruction.
200 // Called from cisc_version() and short_branch_version().
201 // !!!! The method's body is defined in ad_<arch>.cpp file.
202 void fill_new_machnode(MachNode *n, Compile* C) const;
203
204 // Return an equivalent instruction using memory for cisc_operand position
205 virtual MachNode *cisc_version(int offset, Compile* C);
206 // Modify this instruction's register mask to use stack version for cisc_operand
207 virtual void use_cisc_RegMask();
208
209 // Support for short branches
210 bool may_be_short_branch() const { return (flags() & Flag_may_be_short_branch) != 0; }
211
212 // Avoid back to back some instructions on some CPUs.
213 enum AvoidBackToBackFlag { AVOID_NONE = 0,
214 AVOID_BEFORE = Flag_avoid_back_to_back_before,
215 AVOID_AFTER = Flag_avoid_back_to_back_after,
216 AVOID_BEFORE_AND_AFTER = AVOID_BEFORE | AVOID_AFTER };
217
218 bool avoid_back_to_back(AvoidBackToBackFlag flag_value) const {
219 return (flags() & flag_value) == flag_value;
220 }
221
222 // instruction implemented with a call
223 bool has_call() const { return (flags() & Flag_has_call) != 0; }
224
225 // First index in _in[] corresponding to operand, or -1 if there is none
226 int operand_index(uint operand) const;
227 int operand_index(const MachOper *oper) const;
228
229 // Register class input is expected in
230 virtual const RegMask &in_RegMask(uint) const;
231
232 // cisc-spillable instructions redefine for use by in_RegMask
233 virtual const RegMask *cisc_RegMask() const { return NULL; }
234
235 // If this instruction is a 2-address instruction, then return the
236 // index of the input which must match the output. Not nessecary
237 // for instructions which bind the input and output register to the
238 // same singleton regiser (e.g., Intel IDIV which binds AX to be
239 // both an input and an output). It is nessecary when the input and
240 // output have choices - but they must use the same choice.
241 virtual uint two_adr( ) const { return 0; }
242
243 // Array of complex operand pointers. Each corresponds to zero or
244 // more leafs. Must be set by MachNode constructor to point to an
245 // internal array of MachOpers. The MachOper array is sized by
246 // specific MachNodes described in the ADL.
247 uint _num_opnds;
248 MachOper **_opnds;
249 uint num_opnds() const { return _num_opnds; }
250
251 // Emit bytes into cbuf
252 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
253 // Expand node after register allocation.
254 // Node is replaced by several nodes in the postalloc expand phase.
255 // Corresponding methods are generated for nodes if they specify
256 // postalloc_expand. See block.cpp for more documentation.
257 virtual bool requires_postalloc_expand() const { return false; }
258 virtual void postalloc_expand(GrowableArray <Node *> *nodes, PhaseRegAlloc *ra_);
259 // Size of instruction in bytes
260 virtual uint size(PhaseRegAlloc *ra_) const;
261 // Helper function that computes size by emitting code
262 virtual uint emit_size(PhaseRegAlloc *ra_) const;
263
264 // Return the alignment required (in units of relocInfo::addr_unit())
265 // for this instruction (must be a power of 2)
266 virtual int alignment_required() const { return 1; }
267
268 // Return the padding (in bytes) to be emitted before this
269 // instruction to properly align it.
270 virtual int compute_padding(int current_offset) const { return 0; }
271
272 // Return number of relocatable values contained in this instruction
273 virtual int reloc() const { return 0; }
274
275 // Return number of words used for double constants in this instruction
276 virtual int ins_num_consts() const { return 0; }
277
278 // Hash and compare over operands. Used to do GVN on machine Nodes.
279 virtual uint hash() const;
280 virtual uint cmp( const Node &n ) const;
281
282 // Expand method for MachNode, replaces nodes representing pseudo
283 // instructions with a set of nodes which represent real machine
284 // instructions and compute the same value.
285 virtual MachNode *Expand( State *, Node_List &proj_list, Node* mem ) { return this; }
286
287 // Bottom_type call; value comes from operand0
288 virtual const class Type *bottom_type() const { return _opnds[0]->type(); }
289 virtual uint ideal_reg() const { const Type *t = _opnds[0]->type(); return t == TypeInt::CC ? Op_RegFlags : t->ideal_reg(); }
290
291 // If this is a memory op, return the base pointer and fixed offset.
292 // If there are no such, return NULL. If there are multiple addresses
293 // or the address is indeterminate (rare cases) then return (Node*)-1,
294 // which serves as node bottom.
295 // If the offset is not statically determined, set it to Type::OffsetBot.
296 // This method is free to ignore stack slots if that helps.
297 #define TYPE_PTR_SENTINAL ((const TypePtr*)-1)
298 // Passing TYPE_PTR_SENTINAL as adr_type asks for computation of the adr_type if possible
299 const Node* get_base_and_disp(intptr_t &offset, const TypePtr* &adr_type) const;
300
301 // Helper for get_base_and_disp: find the base and index input nodes.
302 // Returns the MachOper as determined by memory_operand(), for use, if
303 // needed by the caller. If (MachOper *)-1 is returned, base and index
304 // are set to NodeSentinel. If (MachOper *) NULL is returned, base and
305 // index are set to NULL.
306 const MachOper* memory_inputs(Node* &base, Node* &index) const;
307
308 // Helper for memory_inputs: Which operand carries the necessary info?
309 // By default, returns NULL, which means there is no such operand.
310 // If it returns (MachOper*)-1, this means there are multiple memories.
311 virtual const MachOper* memory_operand() const { return NULL; }
312
313 // Call "get_base_and_disp" to decide which category of memory is used here.
314 virtual const class TypePtr *adr_type() const;
315
316 // Apply peephole rule(s) to this instruction
317 virtual MachNode *peephole( Block *block, int block_index, PhaseRegAlloc *ra_, int &deleted, Compile* C );
318
319 // Top-level ideal Opcode matched
320 virtual int ideal_Opcode() const { return Op_Node; }
321
322 // Adds the label for the case
323 virtual void add_case_label( int switch_val, Label* blockLabel);
324
325 // Set the absolute address for methods
326 virtual void method_set( intptr_t addr );
327
328 // Should we clone rather than spill this instruction?
329 bool rematerialize() const;
330
331 // Get the pipeline info
332 static const Pipeline *pipeline_class();
333 virtual const Pipeline *pipeline() const;
334
335 // Returns true if this node is a check that can be implemented with a trap.
336 virtual bool is_TrapBasedCheckNode() const { return false; }
337
338 #ifndef PRODUCT
339 virtual const char *Name() const = 0; // Machine-specific name
340 virtual void dump_spec(outputStream *st) const; // Print per-node info
341 void dump_format(PhaseRegAlloc *ra, outputStream *st) const; // access to virtual
342 #endif
343 };
344
345 //------------------------------MachIdealNode----------------------------
346 // Machine specific versions of nodes that must be defined by user.
347 // These are not converted by matcher from ideal nodes to machine nodes
348 // but are inserted into the code by the compiler.
349 class MachIdealNode : public MachNode {
350 public:
351 MachIdealNode( ) {}
352
353 // Define the following defaults for non-matched machine nodes
354 virtual uint oper_input_base() const { return 0; }
355 virtual uint rule() const { return 9999999; }
356 virtual const class Type *bottom_type() const { return _opnds == NULL ? Type::CONTROL : MachNode::bottom_type(); }
357 };
358
359 //------------------------------MachTypeNode----------------------------
360 // Machine Nodes that need to retain a known Type.
361 class MachTypeNode : public MachNode {
362 virtual uint size_of() const { return sizeof(*this); } // Size is bigger
363 public:
364 MachTypeNode( ) {}
365 const Type *_bottom_type;
366
367 virtual const class Type *bottom_type() const { return _bottom_type; }
368 #ifndef PRODUCT
369 virtual void dump_spec(outputStream *st) const;
370 #endif
371 };
372
373 //------------------------------MachBreakpointNode----------------------------
374 // Machine breakpoint or interrupt Node
375 class MachBreakpointNode : public MachIdealNode {
376 public:
377 MachBreakpointNode( ) {}
378 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
379 virtual uint size(PhaseRegAlloc *ra_) const;
380
381 #ifndef PRODUCT
382 virtual const char *Name() const { return "Breakpoint"; }
383 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
384 #endif
385 };
386
387 //------------------------------MachConstantBaseNode--------------------------
388 // Machine node that represents the base address of the constant table.
389 class MachConstantBaseNode : public MachIdealNode {
390 public:
391 static const RegMask& _out_RegMask; // We need the out_RegMask statically in MachConstantNode::in_RegMask().
392
393 public:
394 MachConstantBaseNode() : MachIdealNode() {
395 init_class_id(Class_MachConstantBase);
396 }
397 virtual const class Type* bottom_type() const { return TypeRawPtr::NOTNULL; }
398 virtual uint ideal_reg() const { return Op_RegP; }
399 virtual uint oper_input_base() const { return 1; }
400
401 virtual bool requires_postalloc_expand() const;
402 virtual void postalloc_expand(GrowableArray <Node *> *nodes, PhaseRegAlloc *ra_);
403
404 virtual void emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const;
405 virtual uint size(PhaseRegAlloc* ra_) const;
406 virtual bool pinned() const { return UseRDPCForConstantTableBase; }
407
408 static const RegMask& static_out_RegMask() { return _out_RegMask; }
409 virtual const RegMask& out_RegMask() const { return static_out_RegMask(); }
410
411 #ifndef PRODUCT
412 virtual const char* Name() const { return "MachConstantBaseNode"; }
413 virtual void format(PhaseRegAlloc*, outputStream* st) const;
414 #endif
415 };
416
417 //------------------------------MachConstantNode-------------------------------
418 // Machine node that holds a constant which is stored in the constant table.
419 class MachConstantNode : public MachTypeNode {
420 protected:
421 Compile::Constant _constant; // This node's constant.
422
423 public:
424 MachConstantNode() : MachTypeNode() {
425 init_class_id(Class_MachConstant);
426 }
427
428 virtual void eval_constant(Compile* C) {
429 #ifdef ASSERT
430 tty->print("missing MachConstantNode eval_constant function: ");
431 dump();
432 #endif
433 ShouldNotCallThis();
434 }
435
436 virtual const RegMask &in_RegMask(uint idx) const {
437 if (idx == mach_constant_base_node_input())
438 return MachConstantBaseNode::static_out_RegMask();
439 return MachNode::in_RegMask(idx);
440 }
441
442 // Input edge of MachConstantBaseNode.
443 virtual uint mach_constant_base_node_input() const { return req() - 1; }
444
445 int constant_offset();
446 int constant_offset() const { return ((MachConstantNode*) this)->constant_offset(); }
447 // Unchecked version to avoid assertions in debug output.
448 int constant_offset_unchecked() const;
449 };
450
451 //------------------------------MachUEPNode-----------------------------------
452 // Machine Unvalidated Entry Point Node
453 class MachUEPNode : public MachIdealNode {
454 public:
455 MachUEPNode( ) {}
456 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
457 virtual uint size(PhaseRegAlloc *ra_) const;
458
459 #ifndef PRODUCT
460 virtual const char *Name() const { return "Unvalidated-Entry-Point"; }
461 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
462 #endif
463 };
464
465 //------------------------------MachPrologNode--------------------------------
466 // Machine function Prolog Node
467 class MachPrologNode : public MachIdealNode {
468 public:
469 MachPrologNode( ) {}
470 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
471 virtual uint size(PhaseRegAlloc *ra_) const;
472 virtual int reloc() const;
473
474 #ifndef PRODUCT
475 virtual const char *Name() const { return "Prolog"; }
476 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
477 #endif
478 };
479
480 //------------------------------MachEpilogNode--------------------------------
481 // Machine function Epilog Node
482 class MachEpilogNode : public MachIdealNode {
483 public:
484 MachEpilogNode(bool do_poll = false) : _do_polling(do_poll) {}
485 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
486 virtual uint size(PhaseRegAlloc *ra_) const;
487 virtual int reloc() const;
488 virtual const Pipeline *pipeline() const;
489
490 private:
491 bool _do_polling;
492
493 public:
494 bool do_polling() const { return _do_polling; }
495
496 // Offset of safepoint from the beginning of the node
497 int safepoint_offset() const;
498
499 #ifndef PRODUCT
500 virtual const char *Name() const { return "Epilog"; }
501 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
502 #endif
503 };
504
505 //------------------------------MachNopNode-----------------------------------
506 // Machine function Nop Node
507 class MachNopNode : public MachIdealNode {
508 private:
509 int _count;
510 public:
511 MachNopNode( ) : _count(1) {}
512 MachNopNode( int count ) : _count(count) {}
513 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
514 virtual uint size(PhaseRegAlloc *ra_) const;
515
516 virtual const class Type *bottom_type() const { return Type::CONTROL; }
517
518 virtual int ideal_Opcode() const { return Op_Con; } // bogus; see output.cpp
519 virtual const Pipeline *pipeline() const;
520 #ifndef PRODUCT
521 virtual const char *Name() const { return "Nop"; }
522 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
523 virtual void dump_spec(outputStream *st) const { } // No per-operand info
524 #endif
525 };
526
527 //------------------------------MachSpillCopyNode------------------------------
528 // Machine SpillCopy Node. Copies 1 or 2 words from any location to any
529 // location (stack or register).
530 class MachSpillCopyNode : public MachIdealNode {
531 const RegMask *_in; // RegMask for input
532 const RegMask *_out; // RegMask for output
533 const Type *_type;
534 public:
535 MachSpillCopyNode( Node *n, const RegMask &in, const RegMask &out ) :
536 MachIdealNode(), _in(&in), _out(&out), _type(n->bottom_type()) {
537 init_class_id(Class_MachSpillCopy);
538 init_flags(Flag_is_Copy);
539 add_req(NULL);
540 add_req(n);
541 }
542 virtual uint size_of() const { return sizeof(*this); }
543 void set_out_RegMask(const RegMask &out) { _out = &out; }
544 void set_in_RegMask(const RegMask &in) { _in = ∈ }
545 virtual const RegMask &out_RegMask() const { return *_out; }
546 virtual const RegMask &in_RegMask(uint) const { return *_in; }
547 virtual const class Type *bottom_type() const { return _type; }
548 virtual uint ideal_reg() const { return _type->ideal_reg(); }
549 virtual uint oper_input_base() const { return 1; }
550 uint implementation( CodeBuffer *cbuf, PhaseRegAlloc *ra_, bool do_size, outputStream* st ) const;
551
552 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
553 virtual uint size(PhaseRegAlloc *ra_) const;
554
555 #ifndef PRODUCT
556 virtual const char *Name() const { return "MachSpillCopy"; }
557 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
558 #endif
559 };
560
561 //------------------------------MachBranchNode--------------------------------
562 // Abstract machine branch Node
563 class MachBranchNode : public MachIdealNode {
564 public:
565 MachBranchNode() : MachIdealNode() {
566 init_class_id(Class_MachBranch);
567 }
568 virtual void label_set(Label* label, uint block_num) = 0;
569 virtual void save_label(Label** label, uint* block_num) = 0;
570
571 // Support for short branches
572 virtual MachNode *short_branch_version(Compile* C) { return NULL; }
573
574 virtual bool pinned() const { return true; };
575 };
576
577 //------------------------------MachNullChkNode--------------------------------
578 // Machine-dependent null-pointer-check Node. Points a real MachNode that is
579 // also some kind of memory op. Turns the indicated MachNode into a
580 // conditional branch with good latency on the ptr-not-null path and awful
581 // latency on the pointer-is-null path.
582
583 class MachNullCheckNode : public MachBranchNode {
584 public:
585 const uint _vidx; // Index of memop being tested
586 MachNullCheckNode( Node *ctrl, Node *memop, uint vidx ) : MachBranchNode(), _vidx(vidx) {
587 init_class_id(Class_MachNullCheck);
588 add_req(ctrl);
589 add_req(memop);
590 }
591 virtual uint size_of() const { return sizeof(*this); }
592
593 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
594 virtual void label_set(Label* label, uint block_num);
595 virtual void save_label(Label** label, uint* block_num);
596 virtual void negate() { }
597 virtual const class Type *bottom_type() const { return TypeTuple::IFBOTH; }
598 virtual uint ideal_reg() const { return NotAMachineReg; }
599 virtual const RegMask &in_RegMask(uint) const;
600 virtual const RegMask &out_RegMask() const { return RegMask::Empty; }
601 #ifndef PRODUCT
602 virtual const char *Name() const { return "NullCheck"; }
603 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
604 #endif
605 };
606
607 //------------------------------MachProjNode----------------------------------
608 // Machine-dependent Ideal projections (how is that for an oxymoron). Really
609 // just MachNodes made by the Ideal world that replicate simple projections
610 // but with machine-dependent input & output register masks. Generally
611 // produced as part of calling conventions. Normally I make MachNodes as part
612 // of the Matcher process, but the Matcher is ill suited to issues involving
613 // frame handling, so frame handling is all done in the Ideal world with
614 // occasional callbacks to the machine model for important info.
615 class MachProjNode : public ProjNode {
616 public:
617 MachProjNode( Node *multi, uint con, const RegMask &out, uint ideal_reg ) : ProjNode(multi,con), _rout(out), _ideal_reg(ideal_reg) {
618 init_class_id(Class_MachProj);
619 }
620 RegMask _rout;
621 const uint _ideal_reg;
622 enum projType {
623 unmatched_proj = 0, // Projs for Control, I/O, memory not matched
624 fat_proj = 999 // Projs killing many regs, defined by _rout
625 };
626 virtual int Opcode() const;
627 virtual const Type *bottom_type() const;
628 virtual const TypePtr *adr_type() const;
629 virtual const RegMask &in_RegMask(uint) const { return RegMask::Empty; }
630 virtual const RegMask &out_RegMask() const { return _rout; }
631 virtual uint ideal_reg() const { return _ideal_reg; }
632 // Need size_of() for virtual ProjNode::clone()
633 virtual uint size_of() const { return sizeof(MachProjNode); }
634 #ifndef PRODUCT
635 virtual void dump_spec(outputStream *st) const;
636 #endif
637 };
638
639 //------------------------------MachIfNode-------------------------------------
640 // Machine-specific versions of IfNodes
641 class MachIfNode : public MachBranchNode {
642 virtual uint size_of() const { return sizeof(*this); } // Size is bigger
643 public:
644 float _prob; // Probability branch goes either way
645 float _fcnt; // Frequency counter
646 MachIfNode() : MachBranchNode() {
647 init_class_id(Class_MachIf);
648 }
649 // Negate conditional branches.
650 virtual void negate() = 0;
651 #ifndef PRODUCT
652 virtual void dump_spec(outputStream *st) const;
653 #endif
654 };
655
656 //------------------------------MachGotoNode-----------------------------------
657 // Machine-specific versions of GotoNodes
658 class MachGotoNode : public MachBranchNode {
659 public:
660 MachGotoNode() : MachBranchNode() {
661 init_class_id(Class_MachGoto);
662 }
663 };
664
665 //------------------------------MachFastLockNode-------------------------------------
666 // Machine-specific versions of FastLockNodes
667 class MachFastLockNode : public MachNode {
668 virtual uint size_of() const { return sizeof(*this); } // Size is bigger
669 public:
670 BiasedLockingCounters* _counters;
671 RTMLockingCounters* _rtm_counters; // RTM lock counters for inflated locks
672 RTMLockingCounters* _stack_rtm_counters; // RTM lock counters for stack locks
673 MachFastLockNode() : MachNode() {}
674 };
675
676 //------------------------------MachReturnNode--------------------------------
677 // Machine-specific versions of subroutine returns
678 class MachReturnNode : public MachNode {
679 virtual uint size_of() const; // Size is bigger
680 public:
681 RegMask *_in_rms; // Input register masks, set during allocation
682 ReallocMark _nesting; // assertion check for reallocations
683 const TypePtr* _adr_type; // memory effects of call or return
684 MachReturnNode() : MachNode() {
685 init_class_id(Class_MachReturn);
686 _adr_type = TypePtr::BOTTOM; // the default: all of memory
687 }
688
689 void set_adr_type(const TypePtr* atp) { _adr_type = atp; }
690
691 virtual const RegMask &in_RegMask(uint) const;
692 virtual bool pinned() const { return true; };
693 virtual const TypePtr *adr_type() const;
694 };
695
696 //------------------------------MachSafePointNode-----------------------------
697 // Machine-specific versions of safepoints
698 class MachSafePointNode : public MachReturnNode {
699 public:
700 OopMap* _oop_map; // Array of OopMap info (8-bit char) for GC
701 JVMState* _jvms; // Pointer to list of JVM State Objects
702 uint _jvmadj; // Extra delta to jvms indexes (mach. args)
703 OopMap* oop_map() const { return _oop_map; }
704 void set_oop_map(OopMap* om) { _oop_map = om; }
705
706 MachSafePointNode() : MachReturnNode(), _oop_map(NULL), _jvms(NULL), _jvmadj(0) {
707 init_class_id(Class_MachSafePoint);
708 }
709
710 virtual JVMState* jvms() const { return _jvms; }
711 void set_jvms(JVMState* s) {
712 _jvms = s;
713 }
714 virtual const Type *bottom_type() const;
715
716 virtual const RegMask &in_RegMask(uint) const;
717
718 // Functionality from old debug nodes
719 Node *returnadr() const { return in(TypeFunc::ReturnAdr); }
720 Node *frameptr () const { return in(TypeFunc::FramePtr); }
721
722 Node *local(const JVMState* jvms, uint idx) const {
723 assert(verify_jvms(jvms), "jvms must match");
724 return in(_jvmadj + jvms->locoff() + idx);
725 }
726 Node *stack(const JVMState* jvms, uint idx) const {
727 assert(verify_jvms(jvms), "jvms must match");
728 return in(_jvmadj + jvms->stkoff() + idx);
729 }
730 Node *monitor_obj(const JVMState* jvms, uint idx) const {
731 assert(verify_jvms(jvms), "jvms must match");
732 return in(_jvmadj + jvms->monitor_obj_offset(idx));
733 }
734 Node *monitor_box(const JVMState* jvms, uint idx) const {
735 assert(verify_jvms(jvms), "jvms must match");
736 return in(_jvmadj + jvms->monitor_box_offset(idx));
737 }
738 void set_local(const JVMState* jvms, uint idx, Node *c) {
739 assert(verify_jvms(jvms), "jvms must match");
740 set_req(_jvmadj + jvms->locoff() + idx, c);
741 }
742 void set_stack(const JVMState* jvms, uint idx, Node *c) {
743 assert(verify_jvms(jvms), "jvms must match");
744 set_req(_jvmadj + jvms->stkoff() + idx, c);
745 }
746 void set_monitor(const JVMState* jvms, uint idx, Node *c) {
747 assert(verify_jvms(jvms), "jvms must match");
748 set_req(_jvmadj + jvms->monoff() + idx, c);
749 }
750 };
751
752 //------------------------------MachCallNode----------------------------------
753 // Machine-specific versions of subroutine calls
754 class MachCallNode : public MachSafePointNode {
755 protected:
756 virtual uint hash() const { return NO_HASH; } // CFG nodes do not hash
757 virtual uint cmp( const Node &n ) const;
758 virtual uint size_of() const = 0; // Size is bigger
759 public:
760 const TypeFunc *_tf; // Function type
761 address _entry_point; // Address of the method being called
762 float _cnt; // Estimate of number of times called
763 uint _argsize; // Size of argument block on stack
764
765 const TypeFunc* tf() const { return _tf; }
766 const address entry_point() const { return _entry_point; }
767 const float cnt() const { return _cnt; }
768 uint argsize() const { return _argsize; }
769
770 void set_tf(const TypeFunc* tf) { _tf = tf; }
771 void set_entry_point(address p) { _entry_point = p; }
772 void set_cnt(float c) { _cnt = c; }
773 void set_argsize(int s) { _argsize = s; }
774
775 MachCallNode() : MachSafePointNode() {
776 init_class_id(Class_MachCall);
777 }
778
779 virtual const Type *bottom_type() const;
780 virtual bool pinned() const { return false; }
781 virtual const Type *Value( PhaseTransform *phase ) const;
782 virtual const RegMask &in_RegMask(uint) const;
783 virtual int ret_addr_offset() { return 0; }
784
785 bool returns_long() const { return tf()->return_type() == T_LONG; }
786 bool return_value_is_used() const;
787
788 // Similar to cousin class CallNode::returns_pointer
789 bool returns_pointer() const;
790
791 #ifndef PRODUCT
792 virtual void dump_spec(outputStream *st) const;
793 #endif
794 };
795
796 //------------------------------MachCallJavaNode------------------------------
797 // "Base" class for machine-specific versions of subroutine calls
798 class MachCallJavaNode : public MachCallNode {
799 protected:
800 virtual uint cmp( const Node &n ) const;
801 virtual uint size_of() const; // Size is bigger
802 public:
803 ciMethod* _method; // Method being direct called
804 int _bci; // Byte Code index of call byte code
805 bool _optimized_virtual; // Tells if node is a static call or an optimized virtual
806 bool _method_handle_invoke; // Tells if the call has to preserve SP
807 MachCallJavaNode() : MachCallNode() {
808 init_class_id(Class_MachCallJava);
809 }
810
811 virtual const RegMask &in_RegMask(uint) const;
812
813 #ifndef PRODUCT
814 virtual void dump_spec(outputStream *st) const;
815 #endif
816 };
817
818 //------------------------------MachCallStaticJavaNode------------------------
819 // Machine-specific versions of monomorphic subroutine calls
820 class MachCallStaticJavaNode : public MachCallJavaNode {
821 virtual uint cmp( const Node &n ) const;
822 virtual uint size_of() const; // Size is bigger
823 public:
824 const char *_name; // Runtime wrapper name
825 MachCallStaticJavaNode() : MachCallJavaNode() {
826 init_class_id(Class_MachCallStaticJava);
827 }
828
829 // If this is an uncommon trap, return the request code, else zero.
830 int uncommon_trap_request() const;
831
832 virtual int ret_addr_offset();
833 #ifndef PRODUCT
834 virtual void dump_spec(outputStream *st) const;
835 void dump_trap_args(outputStream *st) const;
836 #endif
837 };
838
839 //------------------------------MachCallDynamicJavaNode------------------------
840 // Machine-specific versions of possibly megamorphic subroutine calls
841 class MachCallDynamicJavaNode : public MachCallJavaNode {
842 public:
843 int _vtable_index;
844 MachCallDynamicJavaNode() : MachCallJavaNode() {
845 init_class_id(Class_MachCallDynamicJava);
846 DEBUG_ONLY(_vtable_index = -99); // throw an assert if uninitialized
847 }
848 virtual int ret_addr_offset();
849 #ifndef PRODUCT
850 virtual void dump_spec(outputStream *st) const;
851 #endif
852 };
853
854 //------------------------------MachCallRuntimeNode----------------------------
855 // Machine-specific versions of subroutine calls
856 class MachCallRuntimeNode : public MachCallNode {
857 virtual uint cmp( const Node &n ) const;
858 virtual uint size_of() const; // Size is bigger
859 public:
860 const char *_name; // Printable name, if _method is NULL
861 MachCallRuntimeNode() : MachCallNode() {
862 init_class_id(Class_MachCallRuntime);
863 }
864 virtual int ret_addr_offset();
865 #ifndef PRODUCT
866 virtual void dump_spec(outputStream *st) const;
867 #endif
868 };
869
870 class MachCallLeafNode: public MachCallRuntimeNode {
871 public:
872 MachCallLeafNode() : MachCallRuntimeNode() {
873 init_class_id(Class_MachCallLeaf);
874 }
875 };
876
877 //------------------------------MachHaltNode-----------------------------------
878 // Machine-specific versions of halt nodes
879 class MachHaltNode : public MachReturnNode {
880 public:
881 virtual JVMState* jvms() const;
882 };
883
884
885 //------------------------------MachTempNode-----------------------------------
886 // Node used by the adlc to construct inputs to represent temporary registers
887 class MachTempNode : public MachNode {
888 private:
889 MachOper *_opnd_array[1];
890
891 public:
892 virtual const RegMask &out_RegMask() const { return *_opnds[0]->in_RegMask(0); }
893 virtual uint rule() const { return 9999999; }
894 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const {}
895
896 MachTempNode(MachOper* oper) {
897 init_class_id(Class_MachTemp);
898 _num_opnds = 1;
899 _opnds = _opnd_array;
900 add_req(NULL);
901 _opnds[0] = oper;
902 }
903 virtual uint size_of() const { return sizeof(MachTempNode); }
904
905 #ifndef PRODUCT
906 virtual void format(PhaseRegAlloc *, outputStream *st ) const {}
907 virtual const char *Name() const { return "MachTemp";}
908 #endif
909 };
910
911
912
913 //------------------------------labelOper--------------------------------------
914 // Machine-independent version of label operand
915 class labelOper : public MachOper {
916 private:
917 virtual uint num_edges() const { return 0; }
918 public:
919 // Supported for fixed size branches
920 Label* _label; // Label for branch(es)
921
922 uint _block_num;
923
924 labelOper() : _block_num(0), _label(0) {}
925
926 labelOper(Label* label, uint block_num) : _label(label), _block_num(block_num) {}
927
928 labelOper(labelOper* l) : _label(l->_label) , _block_num(l->_block_num) {}
929
930 virtual MachOper *clone(Compile* C) const;
931
932 virtual Label *label() const { assert(_label != NULL, "need Label"); return _label; }
933
934 virtual uint opcode() const;
935
936 virtual uint hash() const;
937 virtual uint cmp( const MachOper &oper ) const;
938 #ifndef PRODUCT
939 virtual const char *Name() const { return "Label";}
940
941 virtual void int_format(PhaseRegAlloc *ra, const MachNode *node, outputStream *st) const;
942 virtual void ext_format(PhaseRegAlloc *ra, const MachNode *node, int idx, outputStream *st) const { int_format( ra, node, st ); }
943 #endif
944 };
945
946
947 //------------------------------methodOper--------------------------------------
948 // Machine-independent version of method operand
949 class methodOper : public MachOper {
950 private:
951 virtual uint num_edges() const { return 0; }
952 public:
953 intptr_t _method; // Address of method
954 methodOper() : _method(0) {}
955 methodOper(intptr_t method) : _method(method) {}
956
957 virtual MachOper *clone(Compile* C) const;
958
959 virtual intptr_t method() const { return _method; }
960
961 virtual uint opcode() const;
962
963 virtual uint hash() const;
964 virtual uint cmp( const MachOper &oper ) const;
965 #ifndef PRODUCT
966 virtual const char *Name() const { return "Method";}
967
968 virtual void int_format(PhaseRegAlloc *ra, const MachNode *node, outputStream *st) const;
969 virtual void ext_format(PhaseRegAlloc *ra, const MachNode *node, int idx, outputStream *st) const { int_format( ra, node, st ); }
970 #endif
971 };
972
973 #endif // SHARE_VM_OPTO_MACHNODE_HPP