hotspot/src/cpu/sparc/vm/assembler_sparc.hpp
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rev 611 : Merge
*** 1,10 ****
- #ifdef USE_PRAGMA_IDENT_HDR
- #pragma ident "@(#)assembler_sparc.hpp 1.180 07/08/29 13:42:15 JVM"
- #endif
/*
! * Copyright 1997-2007 Sun Microsystems, Inc. All Rights Reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 only, as
* published by the Free Software Foundation.
--- 1,7 ----
/*
! * Copyright 1997-2008 Sun Microsystems, Inc. All Rights Reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 only, as
* published by the Free Software Foundation.
*** 60,69 ****
--- 57,67 ----
// %%%% The interpreter should be revisited to reduce global scratch regs.
// This global always holds the current JavaThread pointer:
REGISTER_DECLARATION(Register, G2_thread , G2);
+ REGISTER_DECLARATION(Register, G6_heapbase , G6);
// The following globals are part of the Java calling convention:
REGISTER_DECLARATION(Register, G5_method , G5);
REGISTER_DECLARATION(Register, G5_megamorphic_method , G5_method);
*** 1439,1449 ****
inline void rett( Register s1, int simm13a, relocInfo::relocType rt = relocInfo::none);
// pp 214
void save( Register s1, Register s2, Register d ) { emit_long( op(arith_op) | rd(d) | op3(save_op3) | rs1(s1) | rs2(s2) ); }
! void save( Register s1, int simm13a, Register d ) { emit_long( op(arith_op) | rd(d) | op3(save_op3) | rs1(s1) | immed(true) | simm(simm13a, 13) ); }
void restore( Register s1 = G0, Register s2 = G0, Register d = G0 ) { emit_long( op(arith_op) | rd(d) | op3(restore_op3) | rs1(s1) | rs2(s2) ); }
void restore( Register s1, int simm13a, Register d ) { emit_long( op(arith_op) | rd(d) | op3(restore_op3) | rs1(s1) | immed(true) | simm(simm13a, 13) ); }
// pp 216
--- 1437,1451 ----
inline void rett( Register s1, int simm13a, relocInfo::relocType rt = relocInfo::none);
// pp 214
void save( Register s1, Register s2, Register d ) { emit_long( op(arith_op) | rd(d) | op3(save_op3) | rs1(s1) | rs2(s2) ); }
! void save( Register s1, int simm13a, Register d ) {
! // make sure frame is at least large enough for the register save area
! assert(-simm13a >= 16 * wordSize, "frame too small");
! emit_long( op(arith_op) | rd(d) | op3(save_op3) | rs1(s1) | immed(true) | simm(simm13a, 13) );
! }
void restore( Register s1 = G0, Register s2 = G0, Register d = G0 ) { emit_long( op(arith_op) | rd(d) | op3(restore_op3) | rs1(s1) | rs2(s2) ); }
void restore( Register s1, int simm13a, Register d ) { emit_long( op(arith_op) | rd(d) | op3(restore_op3) | rs1(s1) | immed(true) | simm(simm13a, 13) ); }
// pp 216
*** 1594,1603 ****
--- 1596,1610 ----
u_field(1, 13, 13) |
simm(simm13a, 13)); }
inline void wrasi( Register d) { v9_only(); emit_long( op(arith_op) | rs1(d) | op3(wrreg_op3) | u_field(3, 29, 25)); }
inline void wrfprs( Register d) { v9_only(); emit_long( op(arith_op) | rs1(d) | op3(wrreg_op3) | u_field(6, 29, 25)); }
+ // For a given register condition, return the appropriate condition code
+ // Condition (the one you would use to get the same effect after "tst" on
+ // the target register.)
+ Assembler::Condition reg_cond_to_cc_cond(RCondition in);
+
// Creation
Assembler(CodeBuffer* code) : AbstractAssembler(code) {
#ifdef CHECK_DELAY
delay_state = no_delay;
*** 1630,1639 ****
--- 1637,1648 ----
// gen asm code to save regs
static void save_registers(MacroAssembler* a);
// restore global registers in case C code disturbed them
static void restore_registers(MacroAssembler* a, Register r);
+
+
};
// MacroAssembler extends Assembler by a few frequently used macros.
//
*** 1722,1731 ****
--- 1731,1746 ----
// Compares a pointer register with zero and branches on (not)null.
// Does a test & branch on 32-bit systems and a register-branch on 64-bit.
void br_null ( Register s1, bool a, Predict p, Label& L );
void br_notnull( Register s1, bool a, Predict p, Label& L );
+ // These versions will do the most efficient thing on v8 and v9. Perhaps
+ // this is what the routine above was meant to do, but it didn't (and
+ // didn't cover both target address kinds.)
+ void br_on_reg_cond( RCondition c, bool a, Predict p, Register s1, address d, relocInfo::relocType rt = relocInfo::none );
+ void br_on_reg_cond( RCondition c, bool a, Predict p, Register s1, Label& L);
+
inline void bp( Condition c, bool a, CC cc, Predict p, address d, relocInfo::relocType rt = relocInfo::none );
inline void bp( Condition c, bool a, CC cc, Predict p, Label& L );
// Branch that tests xcc in LP64 and icc in !LP64
inline void brx( Condition c, bool a, Predict p, address d, relocInfo::relocType rt = relocInfo::none );
*** 1976,1985 ****
--- 1991,2026 ----
inline void stbool( Register d, const Address& a, int offset = 0 ) { stb(d, a, offset); }
inline void ldbool( const Address& a, Register d, int offset = 0 ) { ldsb( a, d, offset ); }
inline void tstbool( Register s ) { tst(s); }
inline void movbool( bool boolconst, Register d) { mov( (int) boolconst, d); }
+ // klass oop manipulations if compressed
+ void load_klass(Register src_oop, Register klass);
+ void store_klass(Register klass, Register dst_oop);
+ void store_klass_gap(Register s, Register dst_oop);
+
+ // oop manipulations
+ void load_heap_oop(const Address& s, Register d, int offset = 0);
+ void load_heap_oop(Register s1, Register s2, Register d);
+ void load_heap_oop(Register s1, int simm13a, Register d);
+ void store_heap_oop(Register d, Register s1, Register s2);
+ void store_heap_oop(Register d, Register s1, int simm13a);
+ void store_heap_oop(Register d, const Address& a, int offset = 0);
+
+ void encode_heap_oop(Register src, Register dst);
+ void encode_heap_oop(Register r) {
+ encode_heap_oop(r, r);
+ }
+ void decode_heap_oop(Register src, Register dst);
+ void decode_heap_oop(Register r) {
+ decode_heap_oop(r, r);
+ }
+ void encode_heap_oop_not_null(Register r);
+ void decode_heap_oop_not_null(Register r);
+ void encode_heap_oop_not_null(Register src, Register dst);
+ void decode_heap_oop_not_null(Register src, Register dst);
+
// Support for managing the JavaThread pointer (i.e.; the reference to
// thread-local information).
void get_thread(); // load G2_thread
void verify_thread(); // verify G2_thread contents
void save_thread (const Register threache); // save to cache
*** 2030,2042 ****
void read_ccr_v8_assert(Register ccr_save);
void write_ccr_v8_assert(Register ccr_save);
#endif // ASSERT
public:
! // Stores
! void store_check(Register tmp, Register obj); // store check for obj - register is destroyed afterwards
! void store_check(Register tmp, Register obj, Register offset); // store check for obj - register is destroyed afterwards
// pushes double TOS element of FPU stack on CPU stack; pops from FPU stack
void push_fTOS();
// pops double TOS element from CPU stack and pushes on FPU stack
--- 2071,2097 ----
void read_ccr_v8_assert(Register ccr_save);
void write_ccr_v8_assert(Register ccr_save);
#endif // ASSERT
public:
!
! // Write to card table for - register is destroyed afterwards.
! void card_table_write(jbyte* byte_map_base, Register tmp, Register obj);
!
! void card_write_barrier_post(Register store_addr, Register new_val, Register tmp);
!
! #ifndef SERIALGC
! // Array store and offset
! void g1_write_barrier_pre(Register obj, Register index, int offset, Register tmp, bool preserve_o_regs);
!
! void g1_write_barrier_post(Register store_addr, Register new_val, Register tmp);
!
! // May do filtering, depending on the boolean arguments.
! void g1_card_table_write(jbyte* byte_map_base,
! Register tmp, Register obj, Register new_val,
! bool region_filter, bool null_filter);
! #endif // SERIALGC
// pushes double TOS element of FPU stack on CPU stack; pops from FPU stack
void push_fTOS();
// pops double TOS element from CPU stack and pushes on FPU stack
*** 2051,2060 ****
--- 2106,2118 ----
void pop_FPU_state();
void push_CPU_state();
void pop_CPU_state();
+ // if heap base register is used - reinit it with the correct value
+ void reinit_heapbase();
+
// Debugging
void _verify_oop(Register reg, const char * msg, const char * file, int line);
void _verify_oop_addr(Address addr, const char * msg, const char * file, int line);
#define verify_oop(reg) _verify_oop(reg, "broken oop " #reg, __FILE__, __LINE__)
*** 2075,2084 ****
--- 2133,2144 ----
Address constant_oop_address( jobject obj, Register d ); // find_index
inline void set_oop ( jobject obj, Register d ); // uses allocate_oop_address
inline void set_oop_constant( jobject obj, Register d ); // uses constant_oop_address
inline void set_oop ( Address obj_addr ); // same as load_address
+ void set_narrow_oop( jobject obj, Register d );
+
// nop padding
void align(int modulus);
// declare a safepoint
void safepoint();
*** 2158,2170 ****
address lock_addr=0, bool use_call_vm=false);
void casn (Register addr_reg, Register cmp_reg, Register set_reg) ;
// These set the icc condition code to equal if the lock succeeded
// and notEqual if it failed and requires a slow case
! void compiler_lock_object(Register Roop, Register Rmark, Register Rbox, Register Rscratch,
! BiasedLockingCounters* counters = NULL);
! void compiler_unlock_object(Register Roop, Register Rmark, Register Rbox, Register Rscratch);
// Biased locking support
// Upon entry, lock_reg must point to the lock record on the stack,
// obj_reg must contain the target object, and mark_reg must contain
// the target object's header.
--- 2218,2234 ----
address lock_addr=0, bool use_call_vm=false);
void casn (Register addr_reg, Register cmp_reg, Register set_reg) ;
// These set the icc condition code to equal if the lock succeeded
// and notEqual if it failed and requires a slow case
! void compiler_lock_object(Register Roop, Register Rmark, Register Rbox,
! Register Rscratch,
! BiasedLockingCounters* counters = NULL,
! bool try_bias = UseBiasedLocking);
! void compiler_unlock_object(Register Roop, Register Rmark, Register Rbox,
! Register Rscratch,
! bool try_bias = UseBiasedLocking);
// Biased locking support
// Upon entry, lock_reg must point to the lock record on the stack,
// obj_reg must contain the target object, and mark_reg must contain
// the target object's header.