1 #ifdef USE_PRAGMA_IDENT_SRC
2 #pragma ident "@(#)interp_masm_sparc.cpp 1.199 07/08/29 13:42:17 JVM"
3 #endif
4 /*
5 * Copyright 1997-2007 Sun Microsystems, Inc. All Rights Reserved.
6 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
7 *
8 * This code is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License version 2 only, as
10 * published by the Free Software Foundation.
11 *
12 * This code is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 * version 2 for more details (a copy is included in the LICENSE file that
16 * accompanied this code).
17 *
18 * You should have received a copy of the GNU General Public License version
19 * 2 along with this work; if not, write to the Free Software Foundation,
20 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
21 *
22 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
23 * CA 95054 USA or visit www.sun.com if you need additional information or
24 * have any questions.
25 *
26 */
27
28 #include "incls/_precompiled.incl"
29 #include "incls/_interp_masm_sparc.cpp.incl"
30
31 #ifndef CC_INTERP
32 #ifndef FAST_DISPATCH
33 #define FAST_DISPATCH 1
34 #endif
35 #undef FAST_DISPATCH
36
37 // Implementation of InterpreterMacroAssembler
38
39 // This file specializes the assember with interpreter-specific macros
40
41 const Address InterpreterMacroAssembler::l_tmp( FP, 0, (frame::interpreter_frame_l_scratch_fp_offset * wordSize ) + STACK_BIAS);
42 const Address InterpreterMacroAssembler::d_tmp( FP, 0, (frame::interpreter_frame_d_scratch_fp_offset * wordSize) + STACK_BIAS);
43
44 #else // CC_INTERP
45 #ifndef STATE
46 #define STATE(field_name) Lstate, in_bytes(byte_offset_of(BytecodeInterpreter, field_name))
47 #endif // STATE
48
49 #endif // CC_INTERP
50
51 void InterpreterMacroAssembler::compute_extra_locals_size_in_bytes(Register args_size, Register locals_size, Register delta) {
52 // Note: this algorithm is also used by C1's OSR entry sequence.
53 // Any changes should also be applied to CodeEmitter::emit_osr_entry().
54 assert_different_registers(args_size, locals_size);
55 // max_locals*2 for TAGS. Assumes that args_size has already been adjusted.
56 if (TaggedStackInterpreter) sll(locals_size, 1, locals_size);
57 subcc(locals_size, args_size, delta);// extra space for non-arguments locals in words
58 // Use br/mov combination because it works on both V8 and V9 and is
59 // faster.
60 Label skip_move;
61 br(Assembler::negative, true, Assembler::pt, skip_move);
62 delayed()->mov(G0, delta);
63 bind(skip_move);
64 round_to(delta, WordsPerLong); // make multiple of 2 (SP must be 2-word aligned)
65 sll(delta, LogBytesPerWord, delta); // extra space for locals in bytes
66 }
67
68 #ifndef CC_INTERP
69
70 // Dispatch code executed in the prolog of a bytecode which does not do it's
71 // own dispatch. The dispatch address is computed and placed in IdispatchAddress
72 void InterpreterMacroAssembler::dispatch_prolog(TosState state, int bcp_incr) {
73 assert_not_delayed();
74 #ifdef FAST_DISPATCH
75 // FAST_DISPATCH and ProfileInterpreter are mutually exclusive since
76 // they both use I2.
77 assert(!ProfileInterpreter, "FAST_DISPATCH and +ProfileInterpreter are mutually exclusive");
78 ldub(Lbcp, bcp_incr, Lbyte_code); // load next bytecode
79 add(Lbyte_code, Interpreter::distance_from_dispatch_table(state), Lbyte_code);
80 // add offset to correct dispatch table
81 sll(Lbyte_code, LogBytesPerWord, Lbyte_code); // multiply by wordSize
82 ld_ptr(IdispatchTables, Lbyte_code, IdispatchAddress);// get entry addr
83 #else
84 ldub( Lbcp, bcp_incr, Lbyte_code); // load next bytecode
85 // dispatch table to use
86 Address tbl(G3_scratch, (address)Interpreter::dispatch_table(state));
87
88 sethi(tbl);
89 sll(Lbyte_code, LogBytesPerWord, Lbyte_code); // multiply by wordSize
90 add(tbl, tbl.base(), 0);
91 ld_ptr( G3_scratch, Lbyte_code, IdispatchAddress); // get entry addr
92 #endif
93 }
94
95
96 // Dispatch code executed in the epilog of a bytecode which does not do it's
97 // own dispatch. The dispatch address in IdispatchAddress is used for the
98 // dispatch.
99 void InterpreterMacroAssembler::dispatch_epilog(TosState state, int bcp_incr) {
100 assert_not_delayed();
101 verify_FPU(1, state);
102 interp_verify_oop(Otos_i, state, __FILE__, __LINE__);
103 jmp( IdispatchAddress, 0 );
104 if (bcp_incr != 0) delayed()->inc(Lbcp, bcp_incr);
105 else delayed()->nop();
106 }
107
108
109 void InterpreterMacroAssembler::dispatch_next(TosState state, int bcp_incr) {
110 // %%%% consider branching to a single shared dispatch stub (for each bcp_incr)
111 assert_not_delayed();
112 ldub( Lbcp, bcp_incr, Lbyte_code); // load next bytecode
113 dispatch_Lbyte_code(state, Interpreter::dispatch_table(state), bcp_incr);
114 }
115
116
117 void InterpreterMacroAssembler::dispatch_next_noverify_oop(TosState state, int bcp_incr) {
118 // %%%% consider branching to a single shared dispatch stub (for each bcp_incr)
119 assert_not_delayed();
120 ldub( Lbcp, bcp_incr, Lbyte_code); // load next bytecode
121 dispatch_Lbyte_code(state, Interpreter::dispatch_table(state), bcp_incr, false);
122 }
123
124
125 void InterpreterMacroAssembler::dispatch_via(TosState state, address* table) {
126 // load current bytecode
127 assert_not_delayed();
128 ldub( Lbcp, 0, Lbyte_code); // load next bytecode
129 dispatch_base(state, table);
130 }
131
132
133 void InterpreterMacroAssembler::call_VM_leaf_base(
134 Register java_thread,
135 address entry_point,
136 int number_of_arguments
137 ) {
138 if (!java_thread->is_valid())
139 java_thread = L7_thread_cache;
140 // super call
141 MacroAssembler::call_VM_leaf_base(java_thread, entry_point, number_of_arguments);
142 }
143
144
145 void InterpreterMacroAssembler::call_VM_base(
146 Register oop_result,
147 Register java_thread,
148 Register last_java_sp,
149 address entry_point,
150 int number_of_arguments,
151 bool check_exception
152 ) {
153 if (!java_thread->is_valid())
154 java_thread = L7_thread_cache;
155 // See class ThreadInVMfromInterpreter, which assumes that the interpreter
156 // takes responsibility for setting its own thread-state on call-out.
157 // However, ThreadInVMfromInterpreter resets the state to "in_Java".
158
159 //save_bcp(); // save bcp
160 MacroAssembler::call_VM_base(oop_result, java_thread, last_java_sp, entry_point, number_of_arguments, check_exception);
161 //restore_bcp(); // restore bcp
162 //restore_locals(); // restore locals pointer
163 }
164
165
166 void InterpreterMacroAssembler::check_and_handle_popframe(Register scratch_reg) {
167 if (JvmtiExport::can_pop_frame()) {
168 Label L;
169
170 // Check the "pending popframe condition" flag in the current thread
171 Address popframe_condition_addr(G2_thread, 0, in_bytes(JavaThread::popframe_condition_offset()));
172 ld(popframe_condition_addr, scratch_reg);
173
174 // Initiate popframe handling only if it is not already being processed. If the flag
175 // has the popframe_processing bit set, it means that this code is called *during* popframe
176 // handling - we don't want to reenter.
177 btst(JavaThread::popframe_pending_bit, scratch_reg);
178 br(zero, false, pt, L);
179 delayed()->nop();
180 btst(JavaThread::popframe_processing_bit, scratch_reg);
181 br(notZero, false, pt, L);
182 delayed()->nop();
183
184 // Call Interpreter::remove_activation_preserving_args_entry() to get the
185 // address of the same-named entrypoint in the generated interpreter code.
186 call_VM_leaf(noreg, CAST_FROM_FN_PTR(address, Interpreter::remove_activation_preserving_args_entry));
187
188 // Jump to Interpreter::_remove_activation_preserving_args_entry
189 jmpl(O0, G0, G0);
190 delayed()->nop();
191 bind(L);
192 }
193 }
194
195
196 void InterpreterMacroAssembler::load_earlyret_value(TosState state) {
197 Register thr_state = G4_scratch;
198 ld_ptr(Address(G2_thread, 0, in_bytes(JavaThread::jvmti_thread_state_offset())),
199 thr_state);
200 const Address tos_addr(thr_state, 0, in_bytes(JvmtiThreadState::earlyret_tos_offset()));
201 const Address oop_addr(thr_state, 0, in_bytes(JvmtiThreadState::earlyret_oop_offset()));
202 const Address val_addr(thr_state, 0, in_bytes(JvmtiThreadState::earlyret_value_offset()));
203 switch (state) {
204 case ltos: ld_long(val_addr, Otos_l); break;
205 case atos: ld_ptr(oop_addr, Otos_l);
206 st_ptr(G0, oop_addr); break;
207 case btos: // fall through
208 case ctos: // fall through
209 case stos: // fall through
210 case itos: ld(val_addr, Otos_l1); break;
211 case ftos: ldf(FloatRegisterImpl::S, val_addr, Ftos_f); break;
212 case dtos: ldf(FloatRegisterImpl::D, val_addr, Ftos_d); break;
213 case vtos: /* nothing to do */ break;
214 default : ShouldNotReachHere();
215 }
216 // Clean up tos value in the jvmti thread state
217 or3(G0, ilgl, G3_scratch);
218 stw(G3_scratch, tos_addr);
219 st_long(G0, val_addr);
220 interp_verify_oop(Otos_i, state, __FILE__, __LINE__);
221 }
222
223
224 void InterpreterMacroAssembler::check_and_handle_earlyret(Register scratch_reg) {
225 if (JvmtiExport::can_force_early_return()) {
226 Label L;
227 Register thr_state = G3_scratch;
228 ld_ptr(Address(G2_thread, 0, in_bytes(JavaThread::jvmti_thread_state_offset())),
229 thr_state);
230 tst(thr_state);
231 br(zero, false, pt, L); // if (thread->jvmti_thread_state() == NULL) exit;
232 delayed()->nop();
233
234 // Initiate earlyret handling only if it is not already being processed.
235 // If the flag has the earlyret_processing bit set, it means that this code
236 // is called *during* earlyret handling - we don't want to reenter.
237 ld(Address(thr_state, 0, in_bytes(JvmtiThreadState::earlyret_state_offset())),
238 G4_scratch);
239 cmp(G4_scratch, JvmtiThreadState::earlyret_pending);
240 br(Assembler::notEqual, false, pt, L);
241 delayed()->nop();
242
243 // Call Interpreter::remove_activation_early_entry() to get the address of the
244 // same-named entrypoint in the generated interpreter code
245 Address tos_addr(thr_state, 0, in_bytes(JvmtiThreadState::earlyret_tos_offset()));
246 ld(tos_addr, Otos_l1);
247 call_VM_leaf(noreg, CAST_FROM_FN_PTR(address, Interpreter::remove_activation_early_entry), Otos_l1);
248
249 // Jump to Interpreter::_remove_activation_early_entry
250 jmpl(O0, G0, G0);
251 delayed()->nop();
252 bind(L);
253 }
254 }
255
256
257 void InterpreterMacroAssembler::super_call_VM_leaf(Register thread_cache, address entry_point, Register arg_1) {
258 mov(arg_1, O0);
259 MacroAssembler::call_VM_leaf_base(thread_cache, entry_point, 1);
260 }
261 #endif /* CC_INTERP */
262
263
264 #ifndef CC_INTERP
265
266 void InterpreterMacroAssembler::dispatch_base(TosState state, address* table) {
267 assert_not_delayed();
268 dispatch_Lbyte_code(state, table);
269 }
270
271
272 void InterpreterMacroAssembler::dispatch_normal(TosState state) {
273 dispatch_base(state, Interpreter::normal_table(state));
274 }
275
276
277 void InterpreterMacroAssembler::dispatch_only(TosState state) {
278 dispatch_base(state, Interpreter::dispatch_table(state));
279 }
280
281
282 // common code to dispatch and dispatch_only
283 // dispatch value in Lbyte_code and increment Lbcp
284
285 void InterpreterMacroAssembler::dispatch_Lbyte_code(TosState state, address* table, int bcp_incr, bool verify) {
286 verify_FPU(1, state);
287 // %%%%% maybe implement +VerifyActivationFrameSize here
288 //verify_thread(); //too slow; we will just verify on method entry & exit
289 if (verify) interp_verify_oop(Otos_i, state, __FILE__, __LINE__);
290 #ifdef FAST_DISPATCH
291 if (table == Interpreter::dispatch_table(state)) {
292 // use IdispatchTables
293 add(Lbyte_code, Interpreter::distance_from_dispatch_table(state), Lbyte_code);
294 // add offset to correct dispatch table
295 sll(Lbyte_code, LogBytesPerWord, Lbyte_code); // multiply by wordSize
296 ld_ptr(IdispatchTables, Lbyte_code, G3_scratch); // get entry addr
297 } else {
298 #endif
299 // dispatch table to use
300 Address tbl(G3_scratch, (address)table);
301
302 sll(Lbyte_code, LogBytesPerWord, Lbyte_code); // multiply by wordSize
303 load_address(tbl); // compute addr of table
304 ld_ptr(G3_scratch, Lbyte_code, G3_scratch); // get entry addr
305 #ifdef FAST_DISPATCH
306 }
307 #endif
308 jmp( G3_scratch, 0 );
309 if (bcp_incr != 0) delayed()->inc(Lbcp, bcp_incr);
310 else delayed()->nop();
311 }
312
313
314 // Helpers for expression stack
315
316 // Longs and doubles are Category 2 computational types in the
317 // JVM specification (section 3.11.1) and take 2 expression stack or
318 // local slots.
319 // Aligning them on 32 bit with tagged stacks is hard because the code generated
320 // for the dup* bytecodes depends on what types are already on the stack.
321 // If the types are split into the two stack/local slots, that is much easier
322 // (and we can use 0 for non-reference tags).
323
324 // Known good alignment in _LP64 but unknown otherwise
325 void InterpreterMacroAssembler::load_unaligned_double(Register r1, int offset, FloatRegister d) {
326 assert_not_delayed();
327
328 #ifdef _LP64
329 ldf(FloatRegisterImpl::D, r1, offset, d);
330 #else
331 ldf(FloatRegisterImpl::S, r1, offset, d);
332 ldf(FloatRegisterImpl::S, r1, offset + Interpreter::stackElementSize(), d->successor());
333 #endif
334 }
335
336 // Known good alignment in _LP64 but unknown otherwise
337 void InterpreterMacroAssembler::store_unaligned_double(FloatRegister d, Register r1, int offset) {
338 assert_not_delayed();
339
340 #ifdef _LP64
341 stf(FloatRegisterImpl::D, d, r1, offset);
342 // store something more useful here
343 debug_only(stx(G0, r1, offset+Interpreter::stackElementSize());)
344 #else
345 stf(FloatRegisterImpl::S, d, r1, offset);
346 stf(FloatRegisterImpl::S, d->successor(), r1, offset + Interpreter::stackElementSize());
347 #endif
348 }
349
350
351 // Known good alignment in _LP64 but unknown otherwise
352 void InterpreterMacroAssembler::load_unaligned_long(Register r1, int offset, Register rd) {
353 assert_not_delayed();
354 #ifdef _LP64
355 ldx(r1, offset, rd);
356 #else
357 ld(r1, offset, rd);
358 ld(r1, offset + Interpreter::stackElementSize(), rd->successor());
359 #endif
360 }
361
362 // Known good alignment in _LP64 but unknown otherwise
363 void InterpreterMacroAssembler::store_unaligned_long(Register l, Register r1, int offset) {
364 assert_not_delayed();
365
366 #ifdef _LP64
367 stx(l, r1, offset);
368 // store something more useful here
369 debug_only(stx(G0, r1, offset+Interpreter::stackElementSize());)
370 #else
371 st(l, r1, offset);
372 st(l->successor(), r1, offset + Interpreter::stackElementSize());
373 #endif
374 }
375
376 #ifdef ASSERT
377 void InterpreterMacroAssembler::verify_stack_tag(frame::Tag t,
378 Register r,
379 Register scratch) {
380 if (TaggedStackInterpreter) {
381 Label ok, long_ok;
382 ld_ptr(Lesp, Interpreter::expr_tag_offset_in_bytes(0), r);
383 if (t == frame::TagCategory2) {
384 cmp(r, G0);
385 brx(Assembler::equal, false, Assembler::pt, long_ok);
386 delayed()->ld_ptr(Lesp, Interpreter::expr_tag_offset_in_bytes(1), r);
387 stop("stack long/double tag value bad");
388 bind(long_ok);
389 cmp(r, G0);
390 } else if (t == frame::TagValue) {
391 cmp(r, G0);
392 } else {
393 assert_different_registers(r, scratch);
394 mov(t, scratch);
395 cmp(r, scratch);
396 }
397 brx(Assembler::equal, false, Assembler::pt, ok);
398 delayed()->nop();
399 // Also compare if the stack value is zero, then the tag might
400 // not have been set coming from deopt.
401 ld_ptr(Lesp, Interpreter::expr_offset_in_bytes(0), r);
402 cmp(r, G0);
403 brx(Assembler::equal, false, Assembler::pt, ok);
404 delayed()->nop();
405 stop("Stack tag value is bad");
406 bind(ok);
407 }
408 }
409 #endif // ASSERT
410
411 void InterpreterMacroAssembler::pop_i(Register r) {
412 assert_not_delayed();
413 // Uses destination register r for scratch
414 debug_only(verify_stack_tag(frame::TagValue, r));
415 ld(Lesp, Interpreter::expr_offset_in_bytes(0), r);
416 inc(Lesp, Interpreter::stackElementSize());
417 debug_only(verify_esp(Lesp));
418 }
419
420 void InterpreterMacroAssembler::pop_ptr(Register r, Register scratch) {
421 assert_not_delayed();
422 // Uses destination register r for scratch
423 debug_only(verify_stack_tag(frame::TagReference, r, scratch));
424 ld_ptr(Lesp, Interpreter::expr_offset_in_bytes(0), r);
425 inc(Lesp, Interpreter::stackElementSize());
426 debug_only(verify_esp(Lesp));
427 }
428
429 void InterpreterMacroAssembler::pop_l(Register r) {
430 assert_not_delayed();
431 // Uses destination register r for scratch
432 debug_only(verify_stack_tag(frame::TagCategory2, r));
433 load_unaligned_long(Lesp, Interpreter::expr_offset_in_bytes(0), r);
434 inc(Lesp, 2*Interpreter::stackElementSize());
435 debug_only(verify_esp(Lesp));
436 }
437
438
439 void InterpreterMacroAssembler::pop_f(FloatRegister f, Register scratch) {
440 assert_not_delayed();
441 debug_only(verify_stack_tag(frame::TagValue, scratch));
442 ldf(FloatRegisterImpl::S, Lesp, Interpreter::expr_offset_in_bytes(0), f);
443 inc(Lesp, Interpreter::stackElementSize());
444 debug_only(verify_esp(Lesp));
445 }
446
447
448 void InterpreterMacroAssembler::pop_d(FloatRegister f, Register scratch) {
449 assert_not_delayed();
450 debug_only(verify_stack_tag(frame::TagCategory2, scratch));
451 load_unaligned_double(Lesp, Interpreter::expr_offset_in_bytes(0), f);
452 inc(Lesp, 2*Interpreter::stackElementSize());
453 debug_only(verify_esp(Lesp));
454 }
455
456
457 // (Note use register first, then decrement so dec can be done during store stall)
458 void InterpreterMacroAssembler::tag_stack(Register r) {
459 if (TaggedStackInterpreter) {
460 st_ptr(r, Lesp, Interpreter::tag_offset_in_bytes());
461 }
462 }
463
464 void InterpreterMacroAssembler::tag_stack(frame::Tag t, Register r) {
465 if (TaggedStackInterpreter) {
466 assert (frame::TagValue == 0, "TagValue must be zero");
467 if (t == frame::TagValue) {
468 st_ptr(G0, Lesp, Interpreter::tag_offset_in_bytes());
469 } else if (t == frame::TagCategory2) {
470 st_ptr(G0, Lesp, Interpreter::tag_offset_in_bytes());
471 // Tag next slot down too
472 st_ptr(G0, Lesp, -Interpreter::stackElementSize() + Interpreter::tag_offset_in_bytes());
473 } else {
474 assert_different_registers(r, O3);
475 mov(t, O3);
476 st_ptr(O3, Lesp, Interpreter::tag_offset_in_bytes());
477 }
478 }
479 }
480
481 void InterpreterMacroAssembler::push_i(Register r) {
482 assert_not_delayed();
483 debug_only(verify_esp(Lesp));
484 tag_stack(frame::TagValue, r);
485 st( r, Lesp, Interpreter::value_offset_in_bytes());
486 dec( Lesp, Interpreter::stackElementSize());
487 }
488
489 void InterpreterMacroAssembler::push_ptr(Register r) {
490 assert_not_delayed();
491 tag_stack(frame::TagReference, r);
492 st_ptr( r, Lesp, Interpreter::value_offset_in_bytes());
493 dec( Lesp, Interpreter::stackElementSize());
494 }
495
496 void InterpreterMacroAssembler::push_ptr(Register r, Register tag) {
497 assert_not_delayed();
498 tag_stack(tag);
499 st_ptr(r, Lesp, Interpreter::value_offset_in_bytes());
500 dec( Lesp, Interpreter::stackElementSize());
501 }
502
503 // remember: our convention for longs in SPARC is:
504 // O0 (Otos_l1) has high-order part in first word,
505 // O1 (Otos_l2) has low-order part in second word
506
507 void InterpreterMacroAssembler::push_l(Register r) {
508 assert_not_delayed();
509 debug_only(verify_esp(Lesp));
510 tag_stack(frame::TagCategory2, r);
511 // Longs are in stored in memory-correct order, even if unaligned.
512 // and may be separated by stack tags.
513 int offset = -Interpreter::stackElementSize() + Interpreter::value_offset_in_bytes();
514 store_unaligned_long(r, Lesp, offset);
515 dec(Lesp, 2 * Interpreter::stackElementSize());
516 }
517
518
519 void InterpreterMacroAssembler::push_f(FloatRegister f) {
520 assert_not_delayed();
521 debug_only(verify_esp(Lesp));
522 tag_stack(frame::TagValue, Otos_i);
523 stf(FloatRegisterImpl::S, f, Lesp, Interpreter::value_offset_in_bytes());
524 dec(Lesp, Interpreter::stackElementSize());
525 }
526
527
528 void InterpreterMacroAssembler::push_d(FloatRegister d) {
529 assert_not_delayed();
530 debug_only(verify_esp(Lesp));
531 tag_stack(frame::TagCategory2, Otos_i);
532 // Longs are in stored in memory-correct order, even if unaligned.
533 // and may be separated by stack tags.
534 int offset = -Interpreter::stackElementSize() + Interpreter::value_offset_in_bytes();
535 store_unaligned_double(d, Lesp, offset);
536 dec(Lesp, 2 * Interpreter::stackElementSize());
537 }
538
539
540 void InterpreterMacroAssembler::push(TosState state) {
541 interp_verify_oop(Otos_i, state, __FILE__, __LINE__);
542 switch (state) {
543 case atos: push_ptr(); break;
544 case btos: push_i(); break;
545 case ctos:
546 case stos: push_i(); break;
547 case itos: push_i(); break;
548 case ltos: push_l(); break;
549 case ftos: push_f(); break;
550 case dtos: push_d(); break;
551 case vtos: /* nothing to do */ break;
552 default : ShouldNotReachHere();
553 }
554 }
555
556
557 void InterpreterMacroAssembler::pop(TosState state) {
558 switch (state) {
559 case atos: pop_ptr(); break;
560 case btos: pop_i(); break;
561 case ctos:
562 case stos: pop_i(); break;
563 case itos: pop_i(); break;
564 case ltos: pop_l(); break;
565 case ftos: pop_f(); break;
566 case dtos: pop_d(); break;
567 case vtos: /* nothing to do */ break;
568 default : ShouldNotReachHere();
569 }
570 interp_verify_oop(Otos_i, state, __FILE__, __LINE__);
571 }
572
573
574 // Tagged stack helpers for swap and dup
575 void InterpreterMacroAssembler::load_ptr_and_tag(int n, Register val,
576 Register tag) {
577 ld_ptr(Lesp, Interpreter::expr_offset_in_bytes(n), val);
578 if (TaggedStackInterpreter) {
579 ld_ptr(Lesp, Interpreter::expr_tag_offset_in_bytes(n), tag);
580 }
581 }
582 void InterpreterMacroAssembler::store_ptr_and_tag(int n, Register val,
583 Register tag) {
584 st_ptr(val, Lesp, Interpreter::expr_offset_in_bytes(n));
585 if (TaggedStackInterpreter) {
586 st_ptr(tag, Lesp, Interpreter::expr_tag_offset_in_bytes(n));
587 }
588 }
589
590
591 void InterpreterMacroAssembler::load_receiver(Register param_count,
592 Register recv) {
593
594 sll(param_count, Interpreter::logStackElementSize(), param_count);
595 if (TaggedStackInterpreter) {
596 add(param_count, Interpreter::value_offset_in_bytes(), param_count); // get obj address
597 }
598 ld_ptr(Lesp, param_count, recv); // gets receiver Oop
599 }
600
601 void InterpreterMacroAssembler::empty_expression_stack() {
602 // Reset Lesp.
603 sub( Lmonitors, wordSize, Lesp );
604
605 // Reset SP by subtracting more space from Lesp.
606 Label done;
607
608 const Address max_stack (Lmethod, 0, in_bytes(methodOopDesc::max_stack_offset()));
609 const Address access_flags(Lmethod, 0, in_bytes(methodOopDesc::access_flags_offset()));
610
611 verify_oop(Lmethod);
612
613
614 assert( G4_scratch != Gframe_size,
615 "Only you can prevent register aliasing!");
616
617 // A native does not need to do this, since its callee does not change SP.
618 ld(access_flags, Gframe_size);
619 btst(JVM_ACC_NATIVE, Gframe_size);
620 br(Assembler::notZero, false, Assembler::pt, done);
621 delayed()->nop();
622
623 //
624 // Compute max expression stack+register save area
625 //
626 lduh( max_stack, Gframe_size );
627 if (TaggedStackInterpreter) sll ( Gframe_size, 1, Gframe_size); // max_stack * 2 for TAGS
628 add( Gframe_size, frame::memory_parameter_word_sp_offset, Gframe_size );
629
630 //
631 // now set up a stack frame with the size computed above
632 //
633 //round_to( Gframe_size, WordsPerLong ); // -- moved down to the "and" below
634 sll( Gframe_size, LogBytesPerWord, Gframe_size );
635 sub( Lesp, Gframe_size, Gframe_size );
636 and3( Gframe_size, -(2 * wordSize), Gframe_size ); // align SP (downwards) to an 8/16-byte boundary
637 debug_only(verify_sp(Gframe_size, G4_scratch));
638 #ifdef _LP64
639 sub(Gframe_size, STACK_BIAS, Gframe_size );
640 #endif
641 mov(Gframe_size, SP);
642
643 bind(done);
644 }
645
646
647 #ifdef ASSERT
648 void InterpreterMacroAssembler::verify_sp(Register Rsp, Register Rtemp) {
649 Label Bad, OK;
650
651 // Saved SP must be aligned.
652 #ifdef _LP64
653 btst(2*BytesPerWord-1, Rsp);
654 #else
655 btst(LongAlignmentMask, Rsp);
656 #endif
657 br(Assembler::notZero, false, Assembler::pn, Bad);
658 delayed()->nop();
659
660 // Saved SP, plus register window size, must not be above FP.
661 add(Rsp, frame::register_save_words * wordSize, Rtemp);
662 #ifdef _LP64
663 sub(Rtemp, STACK_BIAS, Rtemp); // Bias Rtemp before cmp to FP
664 #endif
665 cmp(Rtemp, FP);
666 brx(Assembler::greaterUnsigned, false, Assembler::pn, Bad);
667 delayed()->nop();
668
669 // Saved SP must not be ridiculously below current SP.
670 size_t maxstack = MAX2(JavaThread::stack_size_at_create(), (size_t) 4*K*K);
671 set(maxstack, Rtemp);
672 sub(SP, Rtemp, Rtemp);
673 #ifdef _LP64
674 add(Rtemp, STACK_BIAS, Rtemp); // Unbias Rtemp before cmp to Rsp
675 #endif
676 cmp(Rsp, Rtemp);
677 brx(Assembler::lessUnsigned, false, Assembler::pn, Bad);
678 delayed()->nop();
679
680 br(Assembler::always, false, Assembler::pn, OK);
681 delayed()->nop();
682
683 bind(Bad);
684 stop("on return to interpreted call, restored SP is corrupted");
685
686 bind(OK);
687 }
688
689
690 void InterpreterMacroAssembler::verify_esp(Register Resp) {
691 // about to read or write Resp[0]
692 // make sure it is not in the monitors or the register save area
693 Label OK1, OK2;
694
695 cmp(Resp, Lmonitors);
696 brx(Assembler::lessUnsigned, true, Assembler::pt, OK1);
697 delayed()->sub(Resp, frame::memory_parameter_word_sp_offset * wordSize, Resp);
698 stop("too many pops: Lesp points into monitor area");
699 bind(OK1);
700 #ifdef _LP64
701 sub(Resp, STACK_BIAS, Resp);
702 #endif
703 cmp(Resp, SP);
704 brx(Assembler::greaterEqualUnsigned, false, Assembler::pt, OK2);
705 delayed()->add(Resp, STACK_BIAS + frame::memory_parameter_word_sp_offset * wordSize, Resp);
706 stop("too many pushes: Lesp points into register window");
707 bind(OK2);
708 }
709 #endif // ASSERT
710
711 // Load compiled (i2c) or interpreter entry when calling from interpreted and
712 // do the call. Centralized so that all interpreter calls will do the same actions.
713 // If jvmti single stepping is on for a thread we must not call compiled code.
714 void InterpreterMacroAssembler::call_from_interpreter(Register target, Register scratch, Register Rret) {
715
716 // Assume we want to go compiled if available
717
718 ld_ptr(G5_method, in_bytes(methodOopDesc::from_interpreted_offset()), target);
719
720 if (JvmtiExport::can_post_interpreter_events()) {
721 // JVMTI events, such as single-stepping, are implemented partly by avoiding running
722 // compiled code in threads for which the event is enabled. Check here for
723 // interp_only_mode if these events CAN be enabled.
724 verify_thread();
725 Label skip_compiled_code;
726
727 const Address interp_only (G2_thread, 0, in_bytes(JavaThread::interp_only_mode_offset()));
728
729 ld(interp_only, scratch);
730 tst(scratch);
731 br(Assembler::notZero, true, Assembler::pn, skip_compiled_code);
732 delayed()->ld_ptr(G5_method, in_bytes(methodOopDesc::interpreter_entry_offset()), target);
733 bind(skip_compiled_code);
734 }
735
736 // the i2c_adapters need methodOop in G5_method (right? %%%)
737 // do the call
738 #ifdef ASSERT
739 {
740 Label ok;
741 br_notnull(target, false, Assembler::pt, ok);
742 delayed()->nop();
743 stop("null entry point");
744 bind(ok);
745 }
746 #endif // ASSERT
747
748 // Adjust Rret first so Llast_SP can be same as Rret
749 add(Rret, -frame::pc_return_offset, O7);
750 add(Lesp, BytesPerWord, Gargs); // setup parameter pointer
751 // Record SP so we can remove any stack space allocated by adapter transition
752 jmp(target, 0);
753 delayed()->mov(SP, Llast_SP);
754 }
755
756 void InterpreterMacroAssembler::if_cmp(Condition cc, bool ptr_compare) {
757 assert_not_delayed();
758
759 Label not_taken;
760 if (ptr_compare) brx(cc, false, Assembler::pn, not_taken);
761 else br (cc, false, Assembler::pn, not_taken);
762 delayed()->nop();
763
764 TemplateTable::branch(false,false);
765
766 bind(not_taken);
767
768 profile_not_taken_branch(G3_scratch);
769 }
770
771
772 void InterpreterMacroAssembler::get_2_byte_integer_at_bcp(
773 int bcp_offset,
774 Register Rtmp,
775 Register Rdst,
776 signedOrNot is_signed,
777 setCCOrNot should_set_CC ) {
778 assert(Rtmp != Rdst, "need separate temp register");
779 assert_not_delayed();
780 switch (is_signed) {
781 default: ShouldNotReachHere();
782
783 case Signed: ldsb( Lbcp, bcp_offset, Rdst ); break; // high byte
784 case Unsigned: ldub( Lbcp, bcp_offset, Rdst ); break; // high byte
785 }
786 ldub( Lbcp, bcp_offset + 1, Rtmp ); // low byte
787 sll( Rdst, BitsPerByte, Rdst);
788 switch (should_set_CC ) {
789 default: ShouldNotReachHere();
790
791 case set_CC: orcc( Rdst, Rtmp, Rdst ); break;
792 case dont_set_CC: or3( Rdst, Rtmp, Rdst ); break;
793 }
794 }
795
796
797 void InterpreterMacroAssembler::get_4_byte_integer_at_bcp(
798 int bcp_offset,
799 Register Rtmp,
800 Register Rdst,
801 setCCOrNot should_set_CC ) {
802 assert(Rtmp != Rdst, "need separate temp register");
803 assert_not_delayed();
804 add( Lbcp, bcp_offset, Rtmp);
805 andcc( Rtmp, 3, G0);
806 Label aligned;
807 switch (should_set_CC ) {
808 default: ShouldNotReachHere();
809
810 case set_CC: break;
811 case dont_set_CC: break;
812 }
813
814 br(Assembler::zero, true, Assembler::pn, aligned);
815 #ifdef _LP64
816 delayed()->ldsw(Rtmp, 0, Rdst);
817 #else
818 delayed()->ld(Rtmp, 0, Rdst);
819 #endif
820
821 ldub(Lbcp, bcp_offset + 3, Rdst);
822 ldub(Lbcp, bcp_offset + 2, Rtmp); sll(Rtmp, 8, Rtmp); or3(Rtmp, Rdst, Rdst);
823 ldub(Lbcp, bcp_offset + 1, Rtmp); sll(Rtmp, 16, Rtmp); or3(Rtmp, Rdst, Rdst);
824 #ifdef _LP64
825 ldsb(Lbcp, bcp_offset + 0, Rtmp); sll(Rtmp, 24, Rtmp);
826 #else
827 // Unsigned load is faster than signed on some implementations
828 ldub(Lbcp, bcp_offset + 0, Rtmp); sll(Rtmp, 24, Rtmp);
829 #endif
830 or3(Rtmp, Rdst, Rdst );
831
832 bind(aligned);
833 if (should_set_CC == set_CC) tst(Rdst);
834 }
835
836
837 void InterpreterMacroAssembler::get_cache_and_index_at_bcp(Register cache, Register tmp, int bcp_offset) {
838 assert(bcp_offset > 0, "bcp is still pointing to start of bytecode");
839 assert_different_registers(cache, tmp);
840 assert_not_delayed();
841 get_2_byte_integer_at_bcp(bcp_offset, cache, tmp, Unsigned);
842 // convert from field index to ConstantPoolCacheEntry index
843 // and from word index to byte offset
844 sll(tmp, exact_log2(in_words(ConstantPoolCacheEntry::size()) * BytesPerWord), tmp);
845 add(LcpoolCache, tmp, cache);
846 }
847
848
849 void InterpreterMacroAssembler::get_cache_entry_pointer_at_bcp(Register cache, Register tmp, int bcp_offset) {
850 assert(bcp_offset > 0, "bcp is still pointing to start of bytecode");
851 assert_different_registers(cache, tmp);
852 assert_not_delayed();
853 get_2_byte_integer_at_bcp(bcp_offset, cache, tmp, Unsigned);
854 // convert from field index to ConstantPoolCacheEntry index
855 // and from word index to byte offset
856 sll(tmp, exact_log2(in_words(ConstantPoolCacheEntry::size()) * BytesPerWord), tmp);
857 // skip past the header
858 add(tmp, in_bytes(constantPoolCacheOopDesc::base_offset()), tmp);
859 // construct pointer to cache entry
860 add(LcpoolCache, tmp, cache);
861 }
862
863
864 // Generate a subtype check: branch to ok_is_subtype if sub_klass is
865 // a subtype of super_klass. Blows registers Rsub_klass, tmp1, tmp2.
866 void InterpreterMacroAssembler::gen_subtype_check(Register Rsub_klass,
867 Register Rsuper_klass,
868 Register Rtmp1,
869 Register Rtmp2,
870 Register Rtmp3,
871 Label &ok_is_subtype ) {
872 Label not_subtype, loop;
873
874 // Profile the not-null value's klass.
875 profile_typecheck(Rsub_klass, Rtmp1);
876
877 // Load the super-klass's check offset into Rtmp1
878 ld( Rsuper_klass, sizeof(oopDesc) + Klass::super_check_offset_offset_in_bytes(), Rtmp1 );
879 // Load from the sub-klass's super-class display list, or a 1-word cache of
880 // the secondary superclass list, or a failing value with a sentinel offset
881 // if the super-klass is an interface or exceptionally deep in the Java
882 // hierarchy and we have to scan the secondary superclass list the hard way.
883 ld_ptr( Rsub_klass, Rtmp1, Rtmp2 );
884 // See if we get an immediate positive hit
885 cmp( Rtmp2, Rsuper_klass );
886 brx( Assembler::equal, false, Assembler::pt, ok_is_subtype );
887 // In the delay slot, check for immediate negative hit
888 delayed()->cmp( Rtmp1, sizeof(oopDesc) + Klass::secondary_super_cache_offset_in_bytes() );
889 br( Assembler::notEqual, false, Assembler::pt, not_subtype );
890 // In the delay slot, check for self
891 delayed()->cmp( Rsub_klass, Rsuper_klass );
892 brx( Assembler::equal, false, Assembler::pt, ok_is_subtype );
893
894 // Now do a linear scan of the secondary super-klass chain.
895 delayed()->ld_ptr( Rsub_klass, sizeof(oopDesc) + Klass::secondary_supers_offset_in_bytes(), Rtmp2 );
896
897 // Rtmp2 holds the objArrayOop of secondary supers.
898 ld( Rtmp2, arrayOopDesc::length_offset_in_bytes(), Rtmp1 );// Load the array length
899 // Check for empty secondary super list
900 tst(Rtmp1);
901
902 // Top of search loop
903 bind( loop );
904 br( Assembler::equal, false, Assembler::pn, not_subtype );
905 delayed()->nop();
906 // load next super to check
907 ld_ptr( Rtmp2, arrayOopDesc::base_offset_in_bytes(T_OBJECT), Rtmp3 );
908
909 // Bump array pointer forward one oop
910 add( Rtmp2, wordSize, Rtmp2 );
911 // Look for Rsuper_klass on Rsub_klass's secondary super-class-overflow list
912 cmp( Rtmp3, Rsuper_klass );
913 // A miss means we are NOT a subtype and need to keep looping
914 brx( Assembler::notEqual, false, Assembler::pt, loop );
915 delayed()->deccc( Rtmp1 ); // dec trip counter in delay slot
916 // Falling out the bottom means we found a hit; we ARE a subtype
917 br( Assembler::always, false, Assembler::pt, ok_is_subtype );
918 // Update the cache
919 delayed()->st_ptr( Rsuper_klass, Rsub_klass, sizeof(oopDesc) + Klass::secondary_super_cache_offset_in_bytes() );
920
921 bind(not_subtype);
922 profile_typecheck_failed(Rtmp1);
923 }
924
925 // Separate these two to allow for delay slot in middle
926 // These are used to do a test and full jump to exception-throwing code.
927
928 // %%%%% Could possibly reoptimize this by testing to see if could use
929 // a single conditional branch (i.e. if span is small enough.
930 // If you go that route, than get rid of the split and give up
931 // on the delay-slot hack.
932
933 void InterpreterMacroAssembler::throw_if_not_1_icc( Condition ok_condition,
934 Label& ok ) {
935 assert_not_delayed();
936 br(ok_condition, true, pt, ok);
937 // DELAY SLOT
938 }
939
940 void InterpreterMacroAssembler::throw_if_not_1_xcc( Condition ok_condition,
941 Label& ok ) {
942 assert_not_delayed();
943 bp( ok_condition, true, Assembler::xcc, pt, ok);
944 // DELAY SLOT
945 }
946
947 void InterpreterMacroAssembler::throw_if_not_1_x( Condition ok_condition,
948 Label& ok ) {
949 assert_not_delayed();
950 brx(ok_condition, true, pt, ok);
951 // DELAY SLOT
952 }
953
954 void InterpreterMacroAssembler::throw_if_not_2( address throw_entry_point,
955 Register Rscratch,
956 Label& ok ) {
957 assert(throw_entry_point != NULL, "entry point must be generated by now");
958 Address dest(Rscratch, throw_entry_point);
959 jump_to(dest);
960 delayed()->nop();
961 bind(ok);
962 }
963
964
965 // And if you cannot use the delay slot, here is a shorthand:
966
967 void InterpreterMacroAssembler::throw_if_not_icc( Condition ok_condition,
968 address throw_entry_point,
969 Register Rscratch ) {
970 Label ok;
971 if (ok_condition != never) {
972 throw_if_not_1_icc( ok_condition, ok);
973 delayed()->nop();
974 }
975 throw_if_not_2( throw_entry_point, Rscratch, ok);
976 }
977 void InterpreterMacroAssembler::throw_if_not_xcc( Condition ok_condition,
978 address throw_entry_point,
979 Register Rscratch ) {
980 Label ok;
981 if (ok_condition != never) {
982 throw_if_not_1_xcc( ok_condition, ok);
983 delayed()->nop();
984 }
985 throw_if_not_2( throw_entry_point, Rscratch, ok);
986 }
987 void InterpreterMacroAssembler::throw_if_not_x( Condition ok_condition,
988 address throw_entry_point,
989 Register Rscratch ) {
990 Label ok;
991 if (ok_condition != never) {
992 throw_if_not_1_x( ok_condition, ok);
993 delayed()->nop();
994 }
995 throw_if_not_2( throw_entry_point, Rscratch, ok);
996 }
997
998 // Check that index is in range for array, then shift index by index_shift, and put arrayOop + shifted_index into res
999 // Note: res is still shy of address by array offset into object.
1000
1001 void InterpreterMacroAssembler::index_check_without_pop(Register array, Register index, int index_shift, Register tmp, Register res) {
1002 assert_not_delayed();
1003
1004 verify_oop(array);
1005 #ifdef _LP64
1006 // sign extend since tos (index) can be a 32bit value
1007 sra(index, G0, index);
1008 #endif // _LP64
1009
1010 // check array
1011 Label ptr_ok;
1012 tst(array);
1013 throw_if_not_1_x( notZero, ptr_ok );
1014 delayed()->ld( array, arrayOopDesc::length_offset_in_bytes(), tmp ); // check index
1015 throw_if_not_2( Interpreter::_throw_NullPointerException_entry, G3_scratch, ptr_ok);
1016
1017 Label index_ok;
1018 cmp(index, tmp);
1019 throw_if_not_1_icc( lessUnsigned, index_ok );
1020 if (index_shift > 0) delayed()->sll(index, index_shift, index);
1021 else delayed()->add(array, index, res); // addr - const offset in index
1022 // convention: move aberrant index into G3_scratch for exception message
1023 mov(index, G3_scratch);
1024 throw_if_not_2( Interpreter::_throw_ArrayIndexOutOfBoundsException_entry, G4_scratch, index_ok);
1025
1026 // add offset if didn't do it in delay slot
1027 if (index_shift > 0) add(array, index, res); // addr - const offset in index
1028 }
1029
1030
1031 void InterpreterMacroAssembler::index_check(Register array, Register index, int index_shift, Register tmp, Register res) {
1032 assert_not_delayed();
1033
1034 // pop array
1035 pop_ptr(array);
1036
1037 // check array
1038 index_check_without_pop(array, index, index_shift, tmp, res);
1039 }
1040
1041
1042 void InterpreterMacroAssembler::get_constant_pool(Register Rdst) {
1043 ld_ptr(Lmethod, in_bytes(methodOopDesc::constants_offset()), Rdst);
1044 }
1045
1046
1047 void InterpreterMacroAssembler::get_constant_pool_cache(Register Rdst) {
1048 get_constant_pool(Rdst);
1049 ld_ptr(Rdst, constantPoolOopDesc::cache_offset_in_bytes(), Rdst);
1050 }
1051
1052
1053 void InterpreterMacroAssembler::get_cpool_and_tags(Register Rcpool, Register Rtags) {
1054 get_constant_pool(Rcpool);
1055 ld_ptr(Rcpool, constantPoolOopDesc::tags_offset_in_bytes(), Rtags);
1056 }
1057
1058
1059 // unlock if synchronized method
1060 //
1061 // Unlock the receiver if this is a synchronized method.
1062 // Unlock any Java monitors from syncronized blocks.
1063 //
1064 // If there are locked Java monitors
1065 // If throw_monitor_exception
1066 // throws IllegalMonitorStateException
1067 // Else if install_monitor_exception
1068 // installs IllegalMonitorStateException
1069 // Else
1070 // no error processing
1071 void InterpreterMacroAssembler::unlock_if_synchronized_method(TosState state,
1072 bool throw_monitor_exception,
1073 bool install_monitor_exception) {
1074 Label unlocked, unlock, no_unlock;
1075
1076 // get the value of _do_not_unlock_if_synchronized into G1_scratch
1077 const Address do_not_unlock_if_synchronized(G2_thread, 0,
1078 in_bytes(JavaThread::do_not_unlock_if_synchronized_offset()));
1079 ldbool(do_not_unlock_if_synchronized, G1_scratch);
1080 stbool(G0, do_not_unlock_if_synchronized); // reset the flag
1081
1082 // check if synchronized method
1083 const Address access_flags(Lmethod, 0, in_bytes(methodOopDesc::access_flags_offset()));
1084 interp_verify_oop(Otos_i, state, __FILE__, __LINE__);
1085 push(state); // save tos
1086 ld(access_flags, G3_scratch);
1087 btst(JVM_ACC_SYNCHRONIZED, G3_scratch);
1088 br( zero, false, pt, unlocked);
1089 delayed()->nop();
1090
1091 // Don't unlock anything if the _do_not_unlock_if_synchronized flag
1092 // is set.
1093 tstbool(G1_scratch);
1094 br(Assembler::notZero, false, pn, no_unlock);
1095 delayed()->nop();
1096
1097 // BasicObjectLock will be first in list, since this is a synchronized method. However, need
1098 // to check that the object has not been unlocked by an explicit monitorexit bytecode.
1099
1100 //Intel: if (throw_monitor_exception) ... else ...
1101 // Entry already unlocked, need to throw exception
1102 //...
1103
1104 // pass top-most monitor elem
1105 add( top_most_monitor(), O1 );
1106
1107 ld_ptr(O1, BasicObjectLock::obj_offset_in_bytes(), G3_scratch);
1108 br_notnull(G3_scratch, false, pt, unlock);
1109 delayed()->nop();
1110
1111 if (throw_monitor_exception) {
1112 // Entry already unlocked need to throw an exception
1113 MacroAssembler::call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::throw_illegal_monitor_state_exception));
1114 should_not_reach_here();
1115 } else {
1116 // Monitor already unlocked during a stack unroll.
1117 // If requested, install an illegal_monitor_state_exception.
1118 // Continue with stack unrolling.
1119 if (install_monitor_exception) {
1120 MacroAssembler::call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::new_illegal_monitor_state_exception));
1121 }
1122 ba(false, unlocked);
1123 delayed()->nop();
1124 }
1125
1126 bind(unlock);
1127
1128 unlock_object(O1);
1129
1130 bind(unlocked);
1131
1132 // I0, I1: Might contain return value
1133
1134 // Check that all monitors are unlocked
1135 { Label loop, exception, entry, restart;
1136
1137 Register Rmptr = O0;
1138 Register Rtemp = O1;
1139 Register Rlimit = Lmonitors;
1140 const jint delta = frame::interpreter_frame_monitor_size() * wordSize;
1141 assert( (delta & LongAlignmentMask) == 0,
1142 "sizeof BasicObjectLock must be even number of doublewords");
1143
1144 #ifdef ASSERT
1145 add(top_most_monitor(), Rmptr, delta);
1146 { Label L;
1147 // ensure that Rmptr starts out above (or at) Rlimit
1148 cmp(Rmptr, Rlimit);
1149 brx(Assembler::greaterEqualUnsigned, false, pn, L);
1150 delayed()->nop();
1151 stop("monitor stack has negative size");
1152 bind(L);
1153 }
1154 #endif
1155 bind(restart);
1156 ba(false, entry);
1157 delayed()->
1158 add(top_most_monitor(), Rmptr, delta); // points to current entry, starting with bottom-most entry
1159
1160 // Entry is still locked, need to throw exception
1161 bind(exception);
1162 if (throw_monitor_exception) {
1163 MacroAssembler::call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::throw_illegal_monitor_state_exception));
1164 should_not_reach_here();
1165 } else {
1166 // Stack unrolling. Unlock object and if requested, install illegal_monitor_exception.
1167 // Unlock does not block, so don't have to worry about the frame
1168 unlock_object(Rmptr);
1169 if (install_monitor_exception) {
1170 MacroAssembler::call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::new_illegal_monitor_state_exception));
1171 }
1172 ba(false, restart);
1173 delayed()->nop();
1174 }
1175
1176 bind(loop);
1177 cmp(Rtemp, G0); // check if current entry is used
1178 brx(Assembler::notEqual, false, pn, exception);
1179 delayed()->
1180 dec(Rmptr, delta); // otherwise advance to next entry
1181 #ifdef ASSERT
1182 { Label L;
1183 // ensure that Rmptr has not somehow stepped below Rlimit
1184 cmp(Rmptr, Rlimit);
1185 brx(Assembler::greaterEqualUnsigned, false, pn, L);
1186 delayed()->nop();
1187 stop("ran off the end of the monitor stack");
1188 bind(L);
1189 }
1190 #endif
1191 bind(entry);
1192 cmp(Rmptr, Rlimit); // check if bottom reached
1193 brx(Assembler::notEqual, true, pn, loop); // if not at bottom then check this entry
1194 delayed()->
1195 ld_ptr(Rmptr, BasicObjectLock::obj_offset_in_bytes() - delta, Rtemp);
1196 }
1197
1198 bind(no_unlock);
1199 pop(state);
1200 interp_verify_oop(Otos_i, state, __FILE__, __LINE__);
1201 }
1202
1203
1204 // remove activation
1205 //
1206 // Unlock the receiver if this is a synchronized method.
1207 // Unlock any Java monitors from syncronized blocks.
1208 // Remove the activation from the stack.
1209 //
1210 // If there are locked Java monitors
1211 // If throw_monitor_exception
1212 // throws IllegalMonitorStateException
1213 // Else if install_monitor_exception
1214 // installs IllegalMonitorStateException
1215 // Else
1216 // no error processing
1217 void InterpreterMacroAssembler::remove_activation(TosState state,
1218 bool throw_monitor_exception,
1219 bool install_monitor_exception) {
1220
1221 unlock_if_synchronized_method(state, throw_monitor_exception, install_monitor_exception);
1222
1223 // save result (push state before jvmti call and pop it afterwards) and notify jvmti
1224 notify_method_exit(false, state, NotifyJVMTI);
1225
1226 interp_verify_oop(Otos_i, state, __FILE__, __LINE__);
1227 verify_oop(Lmethod);
1228 verify_thread();
1229
1230 // return tos
1231 assert(Otos_l1 == Otos_i, "adjust code below");
1232 switch (state) {
1233 #ifdef _LP64
1234 case ltos: mov(Otos_l, Otos_l->after_save()); break; // O0 -> I0
1235 #else
1236 case ltos: mov(Otos_l2, Otos_l2->after_save()); // fall through // O1 -> I1
1237 #endif
1238 case btos: // fall through
1239 case ctos:
1240 case stos: // fall through
1241 case atos: // fall through
1242 case itos: mov(Otos_l1, Otos_l1->after_save()); break; // O0 -> I0
1243 case ftos: // fall through
1244 case dtos: // fall through
1245 case vtos: /* nothing to do */ break;
1246 default : ShouldNotReachHere();
1247 }
1248
1249 #if defined(COMPILER2) && !defined(_LP64)
1250 if (state == ltos) {
1251 // C2 expects long results in G1 we can't tell if we're returning to interpreted
1252 // or compiled so just be safe use G1 and O0/O1
1253
1254 // Shift bits into high (msb) of G1
1255 sllx(Otos_l1->after_save(), 32, G1);
1256 // Zero extend low bits
1257 srl (Otos_l2->after_save(), 0, Otos_l2->after_save());
1258 or3 (Otos_l2->after_save(), G1, G1);
1259 }
1260 #endif /* COMPILER2 */
1261
1262 }
1263 #endif /* CC_INTERP */
1264
1265
1266 // Lock object
1267 //
1268 // Argument - lock_reg points to the BasicObjectLock to be used for locking,
1269 // it must be initialized with the object to lock
1270 void InterpreterMacroAssembler::lock_object(Register lock_reg, Register Object) {
1271 if (UseHeavyMonitors) {
1272 call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::monitorenter), lock_reg);
1273 }
1274 else {
1275 Register obj_reg = Object;
1276 Register mark_reg = G4_scratch;
1277 Register temp_reg = G1_scratch;
1278 Address lock_addr = Address(lock_reg, 0, BasicObjectLock::lock_offset_in_bytes());
1279 Address mark_addr = Address(obj_reg, 0, oopDesc::mark_offset_in_bytes());
1280 Label done;
1281
1282 Label slow_case;
1283
1284 assert_different_registers(lock_reg, obj_reg, mark_reg, temp_reg);
1285
1286 // load markOop from object into mark_reg
1287 ld_ptr(mark_addr, mark_reg);
1288
1289 if (UseBiasedLocking) {
1290 biased_locking_enter(obj_reg, mark_reg, temp_reg, done, &slow_case);
1291 }
1292
1293 // get the address of basicLock on stack that will be stored in the object
1294 // we need a temporary register here as we do not want to clobber lock_reg
1295 // (cas clobbers the destination register)
1296 mov(lock_reg, temp_reg);
1297 // set mark reg to be (markOop of object | UNLOCK_VALUE)
1298 or3(mark_reg, markOopDesc::unlocked_value, mark_reg);
1299 // initialize the box (Must happen before we update the object mark!)
1300 st_ptr(mark_reg, lock_addr, BasicLock::displaced_header_offset_in_bytes());
1301 // compare and exchange object_addr, markOop | 1, stack address of basicLock
1302 assert(mark_addr.disp() == 0, "cas must take a zero displacement");
1303 casx_under_lock(mark_addr.base(), mark_reg, temp_reg,
1304 (address)StubRoutines::Sparc::atomic_memory_operation_lock_addr());
1305
1306 // if the compare and exchange succeeded we are done (we saw an unlocked object)
1307 cmp(mark_reg, temp_reg);
1308 brx(Assembler::equal, true, Assembler::pt, done);
1309 delayed()->nop();
1310
1311 // We did not see an unlocked object so try the fast recursive case
1312
1313 // Check if owner is self by comparing the value in the markOop of object
1314 // with the stack pointer
1315 sub(temp_reg, SP, temp_reg);
1316 #ifdef _LP64
1317 sub(temp_reg, STACK_BIAS, temp_reg);
1318 #endif
1319 assert(os::vm_page_size() > 0xfff, "page size too small - change the constant");
1320
1321 // Composite "andcc" test:
1322 // (a) %sp -vs- markword proximity check, and,
1323 // (b) verify mark word LSBs == 0 (Stack-locked).
1324 //
1325 // FFFFF003/FFFFFFFFFFFF003 is (markOopDesc::lock_mask_in_place | -os::vm_page_size())
1326 // Note that the page size used for %sp proximity testing is arbitrary and is
1327 // unrelated to the actual MMU page size. We use a 'logical' page size of
1328 // 4096 bytes. F..FFF003 is designed to fit conveniently in the SIMM13 immediate
1329 // field of the andcc instruction.
1330 andcc (temp_reg, 0xFFFFF003, G0) ;
1331
1332 // if condition is true we are done and hence we can store 0 in the displaced
1333 // header indicating it is a recursive lock and be done
1334 brx(Assembler::zero, true, Assembler::pt, done);
1335 delayed()->st_ptr(G0, lock_addr, BasicLock::displaced_header_offset_in_bytes());
1336
1337 // none of the above fast optimizations worked so we have to get into the
1338 // slow case of monitor enter
1339 bind(slow_case);
1340 call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::monitorenter), lock_reg);
1341
1342 bind(done);
1343 }
1344 }
1345
1346 // Unlocks an object. Used in monitorexit bytecode and remove_activation.
1347 //
1348 // Argument - lock_reg points to the BasicObjectLock for lock
1349 // Throw IllegalMonitorException if object is not locked by current thread
1350 void InterpreterMacroAssembler::unlock_object(Register lock_reg) {
1351 if (UseHeavyMonitors) {
1352 call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::monitorexit), lock_reg);
1353 } else {
1354 Register obj_reg = G3_scratch;
1355 Register mark_reg = G4_scratch;
1356 Register displaced_header_reg = G1_scratch;
1357 Address lock_addr = Address(lock_reg, 0, BasicObjectLock::lock_offset_in_bytes());
1358 Address lockobj_addr = Address(lock_reg, 0, BasicObjectLock::obj_offset_in_bytes());
1359 Address mark_addr = Address(obj_reg, 0, oopDesc::mark_offset_in_bytes());
1360 Label done;
1361
1362 if (UseBiasedLocking) {
1363 // load the object out of the BasicObjectLock
1364 ld_ptr(lockobj_addr, obj_reg);
1365 biased_locking_exit(mark_addr, mark_reg, done, true);
1366 st_ptr(G0, lockobj_addr); // free entry
1367 }
1368
1369 // Test first if we are in the fast recursive case
1370 ld_ptr(lock_addr, displaced_header_reg, BasicLock::displaced_header_offset_in_bytes());
1371 br_null(displaced_header_reg, true, Assembler::pn, done);
1372 delayed()->st_ptr(G0, lockobj_addr); // free entry
1373
1374 // See if it is still a light weight lock, if so we just unlock
1375 // the object and we are done
1376
1377 if (!UseBiasedLocking) {
1378 // load the object out of the BasicObjectLock
1379 ld_ptr(lockobj_addr, obj_reg);
1380 }
1381
1382 // we have the displaced header in displaced_header_reg
1383 // we expect to see the stack address of the basicLock in case the
1384 // lock is still a light weight lock (lock_reg)
1385 assert(mark_addr.disp() == 0, "cas must take a zero displacement");
1386 casx_under_lock(mark_addr.base(), lock_reg, displaced_header_reg,
1387 (address)StubRoutines::Sparc::atomic_memory_operation_lock_addr());
1388 cmp(lock_reg, displaced_header_reg);
1389 brx(Assembler::equal, true, Assembler::pn, done);
1390 delayed()->st_ptr(G0, lockobj_addr); // free entry
1391
1392 // The lock has been converted into a heavy lock and hence
1393 // we need to get into the slow case
1394
1395 call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::monitorexit), lock_reg);
1396
1397 bind(done);
1398 }
1399 }
1400
1401 #ifndef CC_INTERP
1402
1403 // Get the method data pointer from the methodOop and set the
1404 // specified register to its value.
1405
1406 void InterpreterMacroAssembler::set_method_data_pointer_offset(Register Roff) {
1407 assert(ProfileInterpreter, "must be profiling interpreter");
1408 Label get_continue;
1409
1410 ld_ptr(Lmethod, in_bytes(methodOopDesc::method_data_offset()), ImethodDataPtr);
1411 test_method_data_pointer(get_continue);
1412 add(ImethodDataPtr, in_bytes(methodDataOopDesc::data_offset()), ImethodDataPtr);
1413 if (Roff != noreg)
1414 // Roff contains a method data index ("mdi"). It defaults to zero.
1415 add(ImethodDataPtr, Roff, ImethodDataPtr);
1416 bind(get_continue);
1417 }
1418
1419 // Set the method data pointer for the current bcp.
1420
1421 void InterpreterMacroAssembler::set_method_data_pointer_for_bcp() {
1422 assert(ProfileInterpreter, "must be profiling interpreter");
1423 Label zero_continue;
1424
1425 // Test MDO to avoid the call if it is NULL.
1426 ld_ptr(Lmethod, in_bytes(methodOopDesc::method_data_offset()), ImethodDataPtr);
1427 test_method_data_pointer(zero_continue);
1428 call_VM_leaf(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::bcp_to_di), Lmethod, Lbcp);
1429 set_method_data_pointer_offset(O0);
1430 bind(zero_continue);
1431 }
1432
1433 // Test ImethodDataPtr. If it is null, continue at the specified label
1434
1435 void InterpreterMacroAssembler::test_method_data_pointer(Label& zero_continue) {
1436 assert(ProfileInterpreter, "must be profiling interpreter");
1437 #ifdef _LP64
1438 bpr(Assembler::rc_z, false, Assembler::pn, ImethodDataPtr, zero_continue);
1439 #else
1440 tst(ImethodDataPtr);
1441 br(Assembler::zero, false, Assembler::pn, zero_continue);
1442 #endif
1443 delayed()->nop();
1444 }
1445
1446 void InterpreterMacroAssembler::verify_method_data_pointer() {
1447 assert(ProfileInterpreter, "must be profiling interpreter");
1448 #ifdef ASSERT
1449 Label verify_continue;
1450 test_method_data_pointer(verify_continue);
1451
1452 // If the mdp is valid, it will point to a DataLayout header which is
1453 // consistent with the bcp. The converse is highly probable also.
1454 lduh(ImethodDataPtr, in_bytes(DataLayout::bci_offset()), G3_scratch);
1455 ld_ptr(Address(Lmethod, 0, in_bytes(methodOopDesc::const_offset())), O5);
1456 add(G3_scratch, in_bytes(constMethodOopDesc::codes_offset()), G3_scratch);
1457 add(G3_scratch, O5, G3_scratch);
1458 cmp(Lbcp, G3_scratch);
1459 brx(Assembler::equal, false, Assembler::pt, verify_continue);
1460
1461 Register temp_reg = O5;
1462 delayed()->mov(ImethodDataPtr, temp_reg);
1463 // %%% should use call_VM_leaf here?
1464 //call_VM_leaf(noreg, ..., Lmethod, Lbcp, ImethodDataPtr);
1465 save_frame_and_mov(sizeof(jdouble) / wordSize, Lmethod, O0, Lbcp, O1);
1466 Address d_save(FP, 0, -sizeof(jdouble) + STACK_BIAS);
1467 stf(FloatRegisterImpl::D, Ftos_d, d_save);
1468 mov(temp_reg->after_save(), O2);
1469 save_thread(L7_thread_cache);
1470 call(CAST_FROM_FN_PTR(address, InterpreterRuntime::verify_mdp), relocInfo::none);
1471 delayed()->nop();
1472 restore_thread(L7_thread_cache);
1473 ldf(FloatRegisterImpl::D, d_save, Ftos_d);
1474 restore();
1475 bind(verify_continue);
1476 #endif // ASSERT
1477 }
1478
1479 void InterpreterMacroAssembler::test_invocation_counter_for_mdp(Register invocation_count,
1480 Register cur_bcp,
1481 Register Rtmp,
1482 Label &profile_continue) {
1483 assert(ProfileInterpreter, "must be profiling interpreter");
1484 // Control will flow to "profile_continue" if the counter is less than the
1485 // limit or if we call profile_method()
1486
1487 Label done;
1488
1489 // if no method data exists, and the counter is high enough, make one
1490 #ifdef _LP64
1491 bpr(Assembler::rc_nz, false, Assembler::pn, ImethodDataPtr, done);
1492 #else
1493 tst(ImethodDataPtr);
1494 br(Assembler::notZero, false, Assembler::pn, done);
1495 #endif
1496
1497 // Test to see if we should create a method data oop
1498 Address profile_limit(Rtmp, (address)&InvocationCounter::InterpreterProfileLimit);
1499 #ifdef _LP64
1500 delayed()->nop();
1501 sethi(profile_limit);
1502 #else
1503 delayed()->sethi(profile_limit);
1504 #endif
1505 ld(profile_limit, Rtmp);
1506 cmp(invocation_count, Rtmp);
1507 br(Assembler::lessUnsigned, false, Assembler::pn, profile_continue);
1508 delayed()->nop();
1509
1510 // Build it now.
1511 call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::profile_method), cur_bcp);
1512 set_method_data_pointer_offset(O0);
1513 ba(false, profile_continue);
1514 delayed()->nop();
1515 bind(done);
1516 }
1517
1518 // Store a value at some constant offset from the method data pointer.
1519
1520 void InterpreterMacroAssembler::set_mdp_data_at(int constant, Register value) {
1521 assert(ProfileInterpreter, "must be profiling interpreter");
1522 st_ptr(value, ImethodDataPtr, constant);
1523 }
1524
1525 void InterpreterMacroAssembler::increment_mdp_data_at(Address counter,
1526 Register bumped_count,
1527 bool decrement) {
1528 assert(ProfileInterpreter, "must be profiling interpreter");
1529
1530 // Load the counter.
1531 ld_ptr(counter, bumped_count);
1532
1533 if (decrement) {
1534 // Decrement the register. Set condition codes.
1535 subcc(bumped_count, DataLayout::counter_increment, bumped_count);
1536
1537 // If the decrement causes the counter to overflow, stay negative
1538 Label L;
1539 brx(Assembler::negative, true, Assembler::pn, L);
1540
1541 // Store the decremented counter, if it is still negative.
1542 delayed()->st_ptr(bumped_count, counter);
1543 bind(L);
1544 } else {
1545 // Increment the register. Set carry flag.
1546 addcc(bumped_count, DataLayout::counter_increment, bumped_count);
1547
1548 // If the increment causes the counter to overflow, pull back by 1.
1549 assert(DataLayout::counter_increment == 1, "subc works");
1550 subc(bumped_count, G0, bumped_count);
1551
1552 // Store the incremented counter.
1553 st_ptr(bumped_count, counter);
1554 }
1555 }
1556
1557 // Increment the value at some constant offset from the method data pointer.
1558
1559 void InterpreterMacroAssembler::increment_mdp_data_at(int constant,
1560 Register bumped_count,
1561 bool decrement) {
1562 // Locate the counter at a fixed offset from the mdp:
1563 Address counter(ImethodDataPtr, 0, constant);
1564 increment_mdp_data_at(counter, bumped_count, decrement);
1565 }
1566
1567 // Increment the value at some non-fixed (reg + constant) offset from
1568 // the method data pointer.
1569
1570 void InterpreterMacroAssembler::increment_mdp_data_at(Register reg,
1571 int constant,
1572 Register bumped_count,
1573 Register scratch2,
1574 bool decrement) {
1575 // Add the constant to reg to get the offset.
1576 add(ImethodDataPtr, reg, scratch2);
1577 Address counter(scratch2, 0, constant);
1578 increment_mdp_data_at(counter, bumped_count, decrement);
1579 }
1580
1581 // Set a flag value at the current method data pointer position.
1582 // Updates a single byte of the header, to avoid races with other header bits.
1583
1584 void InterpreterMacroAssembler::set_mdp_flag_at(int flag_constant,
1585 Register scratch) {
1586 assert(ProfileInterpreter, "must be profiling interpreter");
1587 // Load the data header
1588 ldub(ImethodDataPtr, in_bytes(DataLayout::flags_offset()), scratch);
1589
1590 // Set the flag
1591 or3(scratch, flag_constant, scratch);
1592
1593 // Store the modified header.
1594 stb(scratch, ImethodDataPtr, in_bytes(DataLayout::flags_offset()));
1595 }
1596
1597 // Test the location at some offset from the method data pointer.
1598 // If it is not equal to value, branch to the not_equal_continue Label.
1599 // Set condition codes to match the nullness of the loaded value.
1600
1601 void InterpreterMacroAssembler::test_mdp_data_at(int offset,
1602 Register value,
1603 Label& not_equal_continue,
1604 Register scratch) {
1605 assert(ProfileInterpreter, "must be profiling interpreter");
1606 ld_ptr(ImethodDataPtr, offset, scratch);
1607 cmp(value, scratch);
1608 brx(Assembler::notEqual, false, Assembler::pn, not_equal_continue);
1609 delayed()->tst(scratch);
1610 }
1611
1612 // Update the method data pointer by the displacement located at some fixed
1613 // offset from the method data pointer.
1614
1615 void InterpreterMacroAssembler::update_mdp_by_offset(int offset_of_disp,
1616 Register scratch) {
1617 assert(ProfileInterpreter, "must be profiling interpreter");
1618 ld_ptr(ImethodDataPtr, offset_of_disp, scratch);
1619 add(ImethodDataPtr, scratch, ImethodDataPtr);
1620 }
1621
1622 // Update the method data pointer by the displacement located at the
1623 // offset (reg + offset_of_disp).
1624
1625 void InterpreterMacroAssembler::update_mdp_by_offset(Register reg,
1626 int offset_of_disp,
1627 Register scratch) {
1628 assert(ProfileInterpreter, "must be profiling interpreter");
1629 add(reg, offset_of_disp, scratch);
1630 ld_ptr(ImethodDataPtr, scratch, scratch);
1631 add(ImethodDataPtr, scratch, ImethodDataPtr);
1632 }
1633
1634 // Update the method data pointer by a simple constant displacement.
1635
1636 void InterpreterMacroAssembler::update_mdp_by_constant(int constant) {
1637 assert(ProfileInterpreter, "must be profiling interpreter");
1638 add(ImethodDataPtr, constant, ImethodDataPtr);
1639 }
1640
1641 // Update the method data pointer for a _ret bytecode whose target
1642 // was not among our cached targets.
1643
1644 void InterpreterMacroAssembler::update_mdp_for_ret(TosState state,
1645 Register return_bci) {
1646 assert(ProfileInterpreter, "must be profiling interpreter");
1647 push(state);
1648 st_ptr(return_bci, l_tmp); // protect return_bci, in case it is volatile
1649 call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::update_mdp_for_ret), return_bci);
1650 ld_ptr(l_tmp, return_bci);
1651 pop(state);
1652 }
1653
1654 // Count a taken branch in the bytecodes.
1655
1656 void InterpreterMacroAssembler::profile_taken_branch(Register scratch, Register bumped_count) {
1657 if (ProfileInterpreter) {
1658 Label profile_continue;
1659
1660 // If no method data exists, go to profile_continue.
1661 test_method_data_pointer(profile_continue);
1662
1663 // We are taking a branch. Increment the taken count.
1664 increment_mdp_data_at(in_bytes(JumpData::taken_offset()), bumped_count);
1665
1666 // The method data pointer needs to be updated to reflect the new target.
1667 update_mdp_by_offset(in_bytes(JumpData::displacement_offset()), scratch);
1668 bind (profile_continue);
1669 }
1670 }
1671
1672
1673 // Count a not-taken branch in the bytecodes.
1674
1675 void InterpreterMacroAssembler::profile_not_taken_branch(Register scratch) {
1676 if (ProfileInterpreter) {
1677 Label profile_continue;
1678
1679 // If no method data exists, go to profile_continue.
1680 test_method_data_pointer(profile_continue);
1681
1682 // We are taking a branch. Increment the not taken count.
1683 increment_mdp_data_at(in_bytes(BranchData::not_taken_offset()), scratch);
1684
1685 // The method data pointer needs to be updated to correspond to the
1686 // next bytecode.
1687 update_mdp_by_constant(in_bytes(BranchData::branch_data_size()));
1688 bind (profile_continue);
1689 }
1690 }
1691
1692
1693 // Count a non-virtual call in the bytecodes.
1694
1695 void InterpreterMacroAssembler::profile_call(Register scratch) {
1696 if (ProfileInterpreter) {
1697 Label profile_continue;
1698
1699 // If no method data exists, go to profile_continue.
1700 test_method_data_pointer(profile_continue);
1701
1702 // We are making a call. Increment the count.
1703 increment_mdp_data_at(in_bytes(CounterData::count_offset()), scratch);
1704
1705 // The method data pointer needs to be updated to reflect the new target.
1706 update_mdp_by_constant(in_bytes(CounterData::counter_data_size()));
1707 bind (profile_continue);
1708 }
1709 }
1710
1711
1712 // Count a final call in the bytecodes.
1713
1714 void InterpreterMacroAssembler::profile_final_call(Register scratch) {
1715 if (ProfileInterpreter) {
1716 Label profile_continue;
1717
1718 // If no method data exists, go to profile_continue.
1719 test_method_data_pointer(profile_continue);
1720
1721 // We are making a call. Increment the count.
1722 increment_mdp_data_at(in_bytes(CounterData::count_offset()), scratch);
1723
1724 // The method data pointer needs to be updated to reflect the new target.
1725 update_mdp_by_constant(in_bytes(VirtualCallData::virtual_call_data_size()));
1726 bind (profile_continue);
1727 }
1728 }
1729
1730
1731 // Count a virtual call in the bytecodes.
1732
1733 void InterpreterMacroAssembler::profile_virtual_call(Register receiver,
1734 Register scratch) {
1735 if (ProfileInterpreter) {
1736 Label profile_continue;
1737
1738 // If no method data exists, go to profile_continue.
1739 test_method_data_pointer(profile_continue);
1740
1741 // We are making a call. Increment the count.
1742 increment_mdp_data_at(in_bytes(CounterData::count_offset()), scratch);
1743
1744 // Record the receiver type.
1745 record_klass_in_profile(receiver, scratch);
1746
1747 // The method data pointer needs to be updated to reflect the new target.
1748 update_mdp_by_constant(in_bytes(VirtualCallData::virtual_call_data_size()));
1749 bind (profile_continue);
1750 }
1751 }
1752
1753 void InterpreterMacroAssembler::record_klass_in_profile_helper(
1754 Register receiver, Register scratch,
1755 int start_row, Label& done) {
1756 int last_row = VirtualCallData::row_limit() - 1;
1757 assert(start_row <= last_row, "must be work left to do");
1758 // Test this row for both the receiver and for null.
1759 // Take any of three different outcomes:
1760 // 1. found receiver => increment count and goto done
1761 // 2. found null => keep looking for case 1, maybe allocate this cell
1762 // 3. found something else => keep looking for cases 1 and 2
1763 // Case 3 is handled by a recursive call.
1764 for (int row = start_row; row <= last_row; row++) {
1765 Label next_test;
1766 bool test_for_null_also = (row == start_row);
1767
1768 // See if the receiver is receiver[n].
1769 int recvr_offset = in_bytes(VirtualCallData::receiver_offset(row));
1770 test_mdp_data_at(recvr_offset, receiver, next_test, scratch);
1771
1772 // The receiver is receiver[n]. Increment count[n].
1773 int count_offset = in_bytes(VirtualCallData::receiver_count_offset(row));
1774 increment_mdp_data_at(count_offset, scratch);
1775 ba(false, done);
1776 delayed()->nop();
1777 bind(next_test);
1778
1779 if (test_for_null_also) {
1780 // Failed the equality check on receiver[n]... Test for null.
1781 if (start_row == last_row) {
1782 // The only thing left to do is handle the null case.
1783 brx(Assembler::notZero, false, Assembler::pt, done);
1784 delayed()->nop();
1785 break;
1786 }
1787 // Since null is rare, make it be the branch-taken case.
1788 Label found_null;
1789 brx(Assembler::zero, false, Assembler::pn, found_null);
1790 delayed()->nop();
1791
1792 // Put all the "Case 3" tests here.
1793 record_klass_in_profile_helper(receiver, scratch, start_row + 1, done);
1794
1795 // Found a null. Keep searching for a matching receiver,
1796 // but remember that this is an empty (unused) slot.
1797 bind(found_null);
1798 }
1799 }
1800
1801 // In the fall-through case, we found no matching receiver, but we
1802 // observed the receiver[start_row] is NULL.
1803
1804 // Fill in the receiver field and increment the count.
1805 int recvr_offset = in_bytes(VirtualCallData::receiver_offset(start_row));
1806 set_mdp_data_at(recvr_offset, receiver);
1807 int count_offset = in_bytes(VirtualCallData::receiver_count_offset(start_row));
1808 mov(DataLayout::counter_increment, scratch);
1809 set_mdp_data_at(count_offset, scratch);
1810 ba(false, done);
1811 delayed()->nop();
1812 }
1813
1814 void InterpreterMacroAssembler::record_klass_in_profile(Register receiver,
1815 Register scratch) {
1816 assert(ProfileInterpreter, "must be profiling");
1817 Label done;
1818
1819 record_klass_in_profile_helper(receiver, scratch, 0, done);
1820
1821 bind (done);
1822 }
1823
1824
1825 // Count a ret in the bytecodes.
1826
1827 void InterpreterMacroAssembler::profile_ret(TosState state,
1828 Register return_bci,
1829 Register scratch) {
1830 if (ProfileInterpreter) {
1831 Label profile_continue;
1832 uint row;
1833
1834 // If no method data exists, go to profile_continue.
1835 test_method_data_pointer(profile_continue);
1836
1837 // Update the total ret count.
1838 increment_mdp_data_at(in_bytes(CounterData::count_offset()), scratch);
1839
1840 for (row = 0; row < RetData::row_limit(); row++) {
1841 Label next_test;
1842
1843 // See if return_bci is equal to bci[n]:
1844 test_mdp_data_at(in_bytes(RetData::bci_offset(row)),
1845 return_bci, next_test, scratch);
1846
1847 // return_bci is equal to bci[n]. Increment the count.
1848 increment_mdp_data_at(in_bytes(RetData::bci_count_offset(row)), scratch);
1849
1850 // The method data pointer needs to be updated to reflect the new target.
1851 update_mdp_by_offset(in_bytes(RetData::bci_displacement_offset(row)), scratch);
1852 ba(false, profile_continue);
1853 delayed()->nop();
1854 bind(next_test);
1855 }
1856
1857 update_mdp_for_ret(state, return_bci);
1858
1859 bind (profile_continue);
1860 }
1861 }
1862
1863 // Profile an unexpected null in the bytecodes.
1864 void InterpreterMacroAssembler::profile_null_seen(Register scratch) {
1865 if (ProfileInterpreter) {
1866 Label profile_continue;
1867
1868 // If no method data exists, go to profile_continue.
1869 test_method_data_pointer(profile_continue);
1870
1871 set_mdp_flag_at(BitData::null_seen_byte_constant(), scratch);
1872
1873 // The method data pointer needs to be updated.
1874 int mdp_delta = in_bytes(BitData::bit_data_size());
1875 if (TypeProfileCasts) {
1876 mdp_delta = in_bytes(VirtualCallData::virtual_call_data_size());
1877 }
1878 update_mdp_by_constant(mdp_delta);
1879
1880 bind (profile_continue);
1881 }
1882 }
1883
1884 void InterpreterMacroAssembler::profile_typecheck(Register klass,
1885 Register scratch) {
1886 if (ProfileInterpreter) {
1887 Label profile_continue;
1888
1889 // If no method data exists, go to profile_continue.
1890 test_method_data_pointer(profile_continue);
1891
1892 int mdp_delta = in_bytes(BitData::bit_data_size());
1893 if (TypeProfileCasts) {
1894 mdp_delta = in_bytes(VirtualCallData::virtual_call_data_size());
1895
1896 // Record the object type.
1897 record_klass_in_profile(klass, scratch);
1898 }
1899
1900 // The method data pointer needs to be updated.
1901 update_mdp_by_constant(mdp_delta);
1902
1903 bind (profile_continue);
1904 }
1905 }
1906
1907 void InterpreterMacroAssembler::profile_typecheck_failed(Register scratch) {
1908 if (ProfileInterpreter && TypeProfileCasts) {
1909 Label profile_continue;
1910
1911 // If no method data exists, go to profile_continue.
1912 test_method_data_pointer(profile_continue);
1913
1914 int count_offset = in_bytes(CounterData::count_offset());
1915 // Back up the address, since we have already bumped the mdp.
1916 count_offset -= in_bytes(VirtualCallData::virtual_call_data_size());
1917
1918 // *Decrement* the counter. We expect to see zero or small negatives.
1919 increment_mdp_data_at(count_offset, scratch, true);
1920
1921 bind (profile_continue);
1922 }
1923 }
1924
1925 // Count the default case of a switch construct.
1926
1927 void InterpreterMacroAssembler::profile_switch_default(Register scratch) {
1928 if (ProfileInterpreter) {
1929 Label profile_continue;
1930
1931 // If no method data exists, go to profile_continue.
1932 test_method_data_pointer(profile_continue);
1933
1934 // Update the default case count
1935 increment_mdp_data_at(in_bytes(MultiBranchData::default_count_offset()),
1936 scratch);
1937
1938 // The method data pointer needs to be updated.
1939 update_mdp_by_offset(
1940 in_bytes(MultiBranchData::default_displacement_offset()),
1941 scratch);
1942
1943 bind (profile_continue);
1944 }
1945 }
1946
1947 // Count the index'th case of a switch construct.
1948
1949 void InterpreterMacroAssembler::profile_switch_case(Register index,
1950 Register scratch,
1951 Register scratch2,
1952 Register scratch3) {
1953 if (ProfileInterpreter) {
1954 Label profile_continue;
1955
1956 // If no method data exists, go to profile_continue.
1957 test_method_data_pointer(profile_continue);
1958
1959 // Build the base (index * per_case_size_in_bytes()) + case_array_offset_in_bytes()
1960 set(in_bytes(MultiBranchData::per_case_size()), scratch);
1961 smul(index, scratch, scratch);
1962 add(scratch, in_bytes(MultiBranchData::case_array_offset()), scratch);
1963
1964 // Update the case count
1965 increment_mdp_data_at(scratch,
1966 in_bytes(MultiBranchData::relative_count_offset()),
1967 scratch2,
1968 scratch3);
1969
1970 // The method data pointer needs to be updated.
1971 update_mdp_by_offset(scratch,
1972 in_bytes(MultiBranchData::relative_displacement_offset()),
1973 scratch2);
1974
1975 bind (profile_continue);
1976 }
1977 }
1978
1979 // add a InterpMonitorElem to stack (see frame_sparc.hpp)
1980
1981 void InterpreterMacroAssembler::add_monitor_to_stack( bool stack_is_empty,
1982 Register Rtemp,
1983 Register Rtemp2 ) {
1984
1985 Register Rlimit = Lmonitors;
1986 const jint delta = frame::interpreter_frame_monitor_size() * wordSize;
1987 assert( (delta & LongAlignmentMask) == 0,
1988 "sizeof BasicObjectLock must be even number of doublewords");
1989
1990 sub( SP, delta, SP);
1991 sub( Lesp, delta, Lesp);
1992 sub( Lmonitors, delta, Lmonitors);
1993
1994 if (!stack_is_empty) {
1995
1996 // must copy stack contents down
1997
1998 Label start_copying, next;
1999
2000 // untested("monitor stack expansion");
2001 compute_stack_base(Rtemp);
2002 ba( false, start_copying );
2003 delayed()->cmp( Rtemp, Rlimit); // done? duplicated below
2004
2005 // note: must copy from low memory upwards
2006 // On entry to loop,
2007 // Rtemp points to new base of stack, Lesp points to new end of stack (1 past TOS)
2008 // Loop mutates Rtemp
2009
2010 bind( next);
2011
2012 st_ptr(Rtemp2, Rtemp, 0);
2013 inc(Rtemp, wordSize);
2014 cmp(Rtemp, Rlimit); // are we done? (duplicated above)
2015
2016 bind( start_copying );
2017
2018 brx( notEqual, true, pn, next );
2019 delayed()->ld_ptr( Rtemp, delta, Rtemp2 );
2020
2021 // done copying stack
2022 }
2023 }
2024
2025 // Locals
2026 #ifdef ASSERT
2027 void InterpreterMacroAssembler::verify_local_tag(frame::Tag t,
2028 Register base,
2029 Register scratch,
2030 int n) {
2031 if (TaggedStackInterpreter) {
2032 Label ok, long_ok;
2033 // Use dst for scratch
2034 assert_different_registers(base, scratch);
2035 ld_ptr(base, Interpreter::local_tag_offset_in_bytes(n), scratch);
2036 if (t == frame::TagCategory2) {
2037 cmp(scratch, G0);
2038 brx(Assembler::equal, false, Assembler::pt, long_ok);
2039 delayed()->ld_ptr(base, Interpreter::local_tag_offset_in_bytes(n+1), scratch);
2040 stop("local long/double tag value bad");
2041 bind(long_ok);
2042 // compare second half tag
2043 cmp(scratch, G0);
2044 } else if (t == frame::TagValue) {
2045 cmp(scratch, G0);
2046 } else {
2047 assert_different_registers(O3, base, scratch);
2048 mov(t, O3);
2049 cmp(scratch, O3);
2050 }
2051 brx(Assembler::equal, false, Assembler::pt, ok);
2052 delayed()->nop();
2053 // Also compare if the local value is zero, then the tag might
2054 // not have been set coming from deopt.
2055 ld_ptr(base, Interpreter::local_offset_in_bytes(n), scratch);
2056 cmp(scratch, G0);
2057 brx(Assembler::equal, false, Assembler::pt, ok);
2058 delayed()->nop();
2059 stop("Local tag value is bad");
2060 bind(ok);
2061 }
2062 }
2063 #endif // ASSERT
2064
2065 void InterpreterMacroAssembler::access_local_ptr( Register index, Register dst ) {
2066 assert_not_delayed();
2067 sll(index, Interpreter::logStackElementSize(), index);
2068 sub(Llocals, index, index);
2069 debug_only(verify_local_tag(frame::TagReference, index, dst));
2070 ld_ptr(index, Interpreter::value_offset_in_bytes(), dst);
2071 // Note: index must hold the effective address--the iinc template uses it
2072 }
2073
2074 // Just like access_local_ptr but the tag is a returnAddress
2075 void InterpreterMacroAssembler::access_local_returnAddress(Register index,
2076 Register dst ) {
2077 assert_not_delayed();
2078 sll(index, Interpreter::logStackElementSize(), index);
2079 sub(Llocals, index, index);
2080 debug_only(verify_local_tag(frame::TagValue, index, dst));
2081 ld_ptr(index, Interpreter::value_offset_in_bytes(), dst);
2082 }
2083
2084 void InterpreterMacroAssembler::access_local_int( Register index, Register dst ) {
2085 assert_not_delayed();
2086 sll(index, Interpreter::logStackElementSize(), index);
2087 sub(Llocals, index, index);
2088 debug_only(verify_local_tag(frame::TagValue, index, dst));
2089 ld(index, Interpreter::value_offset_in_bytes(), dst);
2090 // Note: index must hold the effective address--the iinc template uses it
2091 }
2092
2093
2094 void InterpreterMacroAssembler::access_local_long( Register index, Register dst ) {
2095 assert_not_delayed();
2096 sll(index, Interpreter::logStackElementSize(), index);
2097 sub(Llocals, index, index);
2098 debug_only(verify_local_tag(frame::TagCategory2, index, dst));
2099 // First half stored at index n+1 (which grows down from Llocals[n])
2100 load_unaligned_long(index, Interpreter::local_offset_in_bytes(1), dst);
2101 }
2102
2103
2104 void InterpreterMacroAssembler::access_local_float( Register index, FloatRegister dst ) {
2105 assert_not_delayed();
2106 sll(index, Interpreter::logStackElementSize(), index);
2107 sub(Llocals, index, index);
2108 debug_only(verify_local_tag(frame::TagValue, index, G1_scratch));
2109 ldf(FloatRegisterImpl::S, index, Interpreter::value_offset_in_bytes(), dst);
2110 }
2111
2112
2113 void InterpreterMacroAssembler::access_local_double( Register index, FloatRegister dst ) {
2114 assert_not_delayed();
2115 sll(index, Interpreter::logStackElementSize(), index);
2116 sub(Llocals, index, index);
2117 debug_only(verify_local_tag(frame::TagCategory2, index, G1_scratch));
2118 load_unaligned_double(index, Interpreter::local_offset_in_bytes(1), dst);
2119 }
2120
2121
2122 #ifdef ASSERT
2123 void InterpreterMacroAssembler::check_for_regarea_stomp(Register Rindex, int offset, Register Rlimit, Register Rscratch, Register Rscratch1) {
2124 Label L;
2125
2126 assert(Rindex != Rscratch, "Registers cannot be same");
2127 assert(Rindex != Rscratch1, "Registers cannot be same");
2128 assert(Rlimit != Rscratch, "Registers cannot be same");
2129 assert(Rlimit != Rscratch1, "Registers cannot be same");
2130 assert(Rscratch1 != Rscratch, "Registers cannot be same");
2131
2132 // untested("reg area corruption");
2133 add(Rindex, offset, Rscratch);
2134 add(Rlimit, 64 + STACK_BIAS, Rscratch1);
2135 cmp(Rscratch, Rscratch1);
2136 brx(Assembler::greaterEqualUnsigned, false, pn, L);
2137 delayed()->nop();
2138 stop("regsave area is being clobbered");
2139 bind(L);
2140 }
2141 #endif // ASSERT
2142
2143 void InterpreterMacroAssembler::tag_local(frame::Tag t,
2144 Register base,
2145 Register src,
2146 int n) {
2147 if (TaggedStackInterpreter) {
2148 // have to store zero because local slots can be reused (rats!)
2149 if (t == frame::TagValue) {
2150 st_ptr(G0, base, Interpreter::local_tag_offset_in_bytes(n));
2151 } else if (t == frame::TagCategory2) {
2152 st_ptr(G0, base, Interpreter::local_tag_offset_in_bytes(n));
2153 st_ptr(G0, base, Interpreter::local_tag_offset_in_bytes(n+1));
2154 } else {
2155 // assert that we don't stomp the value in 'src'
2156 // O3 is arbitrary because it's not used.
2157 assert_different_registers(src, base, O3);
2158 mov( t, O3);
2159 st_ptr(O3, base, Interpreter::local_tag_offset_in_bytes(n));
2160 }
2161 }
2162 }
2163
2164
2165 void InterpreterMacroAssembler::store_local_int( Register index, Register src ) {
2166 assert_not_delayed();
2167 sll(index, Interpreter::logStackElementSize(), index);
2168 sub(Llocals, index, index);
2169 debug_only(check_for_regarea_stomp(index, Interpreter::value_offset_in_bytes(), FP, G1_scratch, G4_scratch);)
2170 tag_local(frame::TagValue, index, src);
2171 st(src, index, Interpreter::value_offset_in_bytes());
2172 }
2173
2174 void InterpreterMacroAssembler::store_local_ptr( Register index, Register src,
2175 Register tag ) {
2176 assert_not_delayed();
2177 sll(index, Interpreter::logStackElementSize(), index);
2178 sub(Llocals, index, index);
2179 #ifdef ASSERT
2180 check_for_regarea_stomp(index, Interpreter::value_offset_in_bytes(), FP, G1_scratch, G4_scratch);
2181 #endif
2182 st_ptr(src, index, Interpreter::value_offset_in_bytes());
2183 // Store tag register directly
2184 if (TaggedStackInterpreter) {
2185 st_ptr(tag, index, Interpreter::tag_offset_in_bytes());
2186 }
2187 }
2188
2189
2190
2191 void InterpreterMacroAssembler::store_local_ptr( int n, Register src,
2192 Register tag ) {
2193 st_ptr(src, Llocals, Interpreter::local_offset_in_bytes(n));
2194 if (TaggedStackInterpreter) {
2195 st_ptr(tag, Llocals, Interpreter::local_tag_offset_in_bytes(n));
2196 }
2197 }
2198
2199 void InterpreterMacroAssembler::store_local_long( Register index, Register src ) {
2200 assert_not_delayed();
2201 sll(index, Interpreter::logStackElementSize(), index);
2202 sub(Llocals, index, index);
2203 #ifdef ASSERT
2204 check_for_regarea_stomp(index, Interpreter::local_offset_in_bytes(1), FP, G1_scratch, G4_scratch);
2205 #endif
2206 tag_local(frame::TagCategory2, index, src);
2207 store_unaligned_long(src, index, Interpreter::local_offset_in_bytes(1)); // which is n+1
2208 }
2209
2210
2211 void InterpreterMacroAssembler::store_local_float( Register index, FloatRegister src ) {
2212 assert_not_delayed();
2213 sll(index, Interpreter::logStackElementSize(), index);
2214 sub(Llocals, index, index);
2215 #ifdef ASSERT
2216 check_for_regarea_stomp(index, Interpreter::value_offset_in_bytes(), FP, G1_scratch, G4_scratch);
2217 #endif
2218 tag_local(frame::TagValue, index, G1_scratch);
2219 stf(FloatRegisterImpl::S, src, index, Interpreter::value_offset_in_bytes());
2220 }
2221
2222
2223 void InterpreterMacroAssembler::store_local_double( Register index, FloatRegister src ) {
2224 assert_not_delayed();
2225 sll(index, Interpreter::logStackElementSize(), index);
2226 sub(Llocals, index, index);
2227 #ifdef ASSERT
2228 check_for_regarea_stomp(index, Interpreter::local_offset_in_bytes(1), FP, G1_scratch, G4_scratch);
2229 #endif
2230 tag_local(frame::TagCategory2, index, G1_scratch);
2231 store_unaligned_double(src, index, Interpreter::local_offset_in_bytes(1));
2232 }
2233
2234
2235 int InterpreterMacroAssembler::top_most_monitor_byte_offset() {
2236 const jint delta = frame::interpreter_frame_monitor_size() * wordSize;
2237 int rounded_vm_local_words = ::round_to(frame::interpreter_frame_vm_local_words, WordsPerLong);
2238 return ((-rounded_vm_local_words * wordSize) - delta ) + STACK_BIAS;
2239 }
2240
2241
2242 Address InterpreterMacroAssembler::top_most_monitor() {
2243 return Address(FP, 0, top_most_monitor_byte_offset());
2244 }
2245
2246
2247 void InterpreterMacroAssembler::compute_stack_base( Register Rdest ) {
2248 add( Lesp, wordSize, Rdest );
2249 }
2250
2251 #endif /* CC_INTERP */
2252
2253 void InterpreterMacroAssembler::increment_invocation_counter( Register Rtmp, Register Rtmp2 ) {
2254 assert(UseCompiler, "incrementing must be useful");
2255 #ifdef CC_INTERP
2256 Address inv_counter(G5_method, 0, in_bytes(methodOopDesc::invocation_counter_offset()
2257 + InvocationCounter::counter_offset()));
2258 Address be_counter(G5_method, 0, in_bytes(methodOopDesc::backedge_counter_offset()
2259 + InvocationCounter::counter_offset()));
2260 #else
2261 Address inv_counter(Lmethod, 0, in_bytes(methodOopDesc::invocation_counter_offset()
2262 + InvocationCounter::counter_offset()));
2263 Address be_counter(Lmethod, 0, in_bytes(methodOopDesc::backedge_counter_offset()
2264 + InvocationCounter::counter_offset()));
2265 #endif /* CC_INTERP */
2266 int delta = InvocationCounter::count_increment;
2267
2268 // Load each counter in a register
2269 ld( inv_counter, Rtmp );
2270 ld( be_counter, Rtmp2 );
2271
2272 assert( is_simm13( delta ), " delta too large.");
2273
2274 // Add the delta to the invocation counter and store the result
2275 add( Rtmp, delta, Rtmp );
2276
2277 // Mask the backedge counter
2278 and3( Rtmp2, InvocationCounter::count_mask_value, Rtmp2 );
2279
2280 // Store value
2281 st( Rtmp, inv_counter);
2282
2283 // Add invocation counter + backedge counter
2284 add( Rtmp, Rtmp2, Rtmp);
2285
2286 // Note that this macro must leave the backedge_count + invocation_count in Rtmp!
2287 }
2288
2289 void InterpreterMacroAssembler::increment_backedge_counter( Register Rtmp, Register Rtmp2 ) {
2290 assert(UseCompiler, "incrementing must be useful");
2291 #ifdef CC_INTERP
2292 Address be_counter(G5_method, 0, in_bytes(methodOopDesc::backedge_counter_offset()
2293 + InvocationCounter::counter_offset()));
2294 Address inv_counter(G5_method, 0, in_bytes(methodOopDesc::invocation_counter_offset()
2295 + InvocationCounter::counter_offset()));
2296 #else
2297 Address be_counter(Lmethod, 0, in_bytes(methodOopDesc::backedge_counter_offset()
2298 + InvocationCounter::counter_offset()));
2299 Address inv_counter(Lmethod, 0, in_bytes(methodOopDesc::invocation_counter_offset()
2300 + InvocationCounter::counter_offset()));
2301 #endif /* CC_INTERP */
2302 int delta = InvocationCounter::count_increment;
2303 // Load each counter in a register
2304 ld( be_counter, Rtmp );
2305 ld( inv_counter, Rtmp2 );
2306
2307 // Add the delta to the backedge counter
2308 add( Rtmp, delta, Rtmp );
2309
2310 // Mask the invocation counter, add to backedge counter
2311 and3( Rtmp2, InvocationCounter::count_mask_value, Rtmp2 );
2312
2313 // and store the result to memory
2314 st( Rtmp, be_counter );
2315
2316 // Add backedge + invocation counter
2317 add( Rtmp, Rtmp2, Rtmp );
2318
2319 // Note that this macro must leave backedge_count + invocation_count in Rtmp!
2320 }
2321
2322 #ifndef CC_INTERP
2323 void InterpreterMacroAssembler::test_backedge_count_for_osr( Register backedge_count,
2324 Register branch_bcp,
2325 Register Rtmp ) {
2326 Label did_not_overflow;
2327 Label overflow_with_error;
2328 assert_different_registers(backedge_count, Rtmp, branch_bcp);
2329 assert(UseOnStackReplacement,"Must UseOnStackReplacement to test_backedge_count_for_osr");
2330
2331 Address limit(Rtmp, address(&InvocationCounter::InterpreterBackwardBranchLimit));
2332 load_contents(limit, Rtmp);
2333 cmp(backedge_count, Rtmp);
2334 br(Assembler::lessUnsigned, false, Assembler::pt, did_not_overflow);
2335 delayed()->nop();
2336
2337 // When ProfileInterpreter is on, the backedge_count comes from the
2338 // methodDataOop, which value does not get reset on the call to
2339 // frequency_counter_overflow(). To avoid excessive calls to the overflow
2340 // routine while the method is being compiled, add a second test to make sure
2341 // the overflow function is called only once every overflow_frequency.
2342 if (ProfileInterpreter) {
2343 const int overflow_frequency = 1024;
2344 andcc(backedge_count, overflow_frequency-1, Rtmp);
2345 brx(Assembler::notZero, false, Assembler::pt, did_not_overflow);
2346 delayed()->nop();
2347 }
2348
2349 // overflow in loop, pass branch bytecode
2350 set(6,Rtmp);
2351 call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::frequency_counter_overflow), branch_bcp, Rtmp);
2352
2353 // Was an OSR adapter generated?
2354 // O0 = osr nmethod
2355 tst(O0);
2356 brx(Assembler::zero, false, Assembler::pn, overflow_with_error);
2357 delayed()->nop();
2358
2359 // Has the nmethod been invalidated already?
2360 ld(O0, nmethod::entry_bci_offset(), O2);
2361 cmp(O2, InvalidOSREntryBci);
2362 br(Assembler::equal, false, Assembler::pn, overflow_with_error);
2363 delayed()->nop();
2364
2365 // migrate the interpreter frame off of the stack
2366
2367 mov(G2_thread, L7);
2368 // save nmethod
2369 mov(O0, L6);
2370 set_last_Java_frame(SP, noreg);
2371 call_VM_leaf(noreg, CAST_FROM_FN_PTR(address, SharedRuntime::OSR_migration_begin), L7);
2372 reset_last_Java_frame();
2373 mov(L7, G2_thread);
2374
2375 // move OSR nmethod to I1
2376 mov(L6, I1);
2377
2378 // OSR buffer to I0
2379 mov(O0, I0);
2380
2381 // remove the interpreter frame
2382 restore(I5_savedSP, 0, SP);
2383
2384 // Jump to the osr code.
2385 ld_ptr(O1, nmethod::osr_entry_point_offset(), O2);
2386 jmp(O2, G0);
2387 delayed()->nop();
2388
2389 bind(overflow_with_error);
2390
2391 bind(did_not_overflow);
2392 }
2393
2394
2395
2396 void InterpreterMacroAssembler::interp_verify_oop(Register reg, TosState state, const char * file, int line) {
2397 if (state == atos) { MacroAssembler::_verify_oop(reg, "broken oop ", file, line); }
2398 }
2399
2400
2401 // local helper function for the verify_oop_or_return_address macro
2402 static bool verify_return_address(methodOopDesc* m, int bci) {
2403 #ifndef PRODUCT
2404 address pc = (address)(m->constMethod())
2405 + in_bytes(constMethodOopDesc::codes_offset()) + bci;
2406 // assume it is a valid return address if it is inside m and is preceded by a jsr
2407 if (!m->contains(pc)) return false;
2408 address jsr_pc;
2409 jsr_pc = pc - Bytecodes::length_for(Bytecodes::_jsr);
2410 if (*jsr_pc == Bytecodes::_jsr && jsr_pc >= m->code_base()) return true;
2411 jsr_pc = pc - Bytecodes::length_for(Bytecodes::_jsr_w);
2412 if (*jsr_pc == Bytecodes::_jsr_w && jsr_pc >= m->code_base()) return true;
2413 #endif // PRODUCT
2414 return false;
2415 }
2416
2417
2418 void InterpreterMacroAssembler::verify_oop_or_return_address(Register reg, Register Rtmp) {
2419 if (!VerifyOops) return;
2420 // the VM documentation for the astore[_wide] bytecode allows
2421 // the TOS to be not only an oop but also a return address
2422 Label test;
2423 Label skip;
2424 // See if it is an address (in the current method):
2425
2426 mov(reg, Rtmp);
2427 const int log2_bytecode_size_limit = 16;
2428 srl(Rtmp, log2_bytecode_size_limit, Rtmp);
2429 br_notnull( Rtmp, false, pt, test );
2430 delayed()->nop();
2431
2432 // %%% should use call_VM_leaf here?
2433 save_frame_and_mov(0, Lmethod, O0, reg, O1);
2434 save_thread(L7_thread_cache);
2435 call(CAST_FROM_FN_PTR(address,verify_return_address), relocInfo::none);
2436 delayed()->nop();
2437 restore_thread(L7_thread_cache);
2438 br_notnull( O0, false, pt, skip );
2439 delayed()->restore();
2440
2441 // Perform a more elaborate out-of-line call
2442 // Not an address; verify it:
2443 bind(test);
2444 verify_oop(reg);
2445 bind(skip);
2446 }
2447
2448
2449 void InterpreterMacroAssembler::verify_FPU(int stack_depth, TosState state) {
2450 if (state == ftos || state == dtos) MacroAssembler::verify_FPU(stack_depth);
2451 }
2452 #endif /* CC_INTERP */
2453
2454 // Inline assembly for:
2455 //
2456 // if (thread is in interp_only_mode) {
2457 // InterpreterRuntime::post_method_entry();
2458 // }
2459 // if (DTraceMethodProbes) {
2460 // SharedRuntime::dtrace_method_entry(method, reciever);
2461 // }
2462
2463 void InterpreterMacroAssembler::notify_method_entry() {
2464
2465 // C++ interpreter only uses this for native methods.
2466
2467 // Whenever JVMTI puts a thread in interp_only_mode, method
2468 // entry/exit events are sent for that thread to track stack
2469 // depth. If it is possible to enter interp_only_mode we add
2470 // the code to check if the event should be sent.
2471 if (JvmtiExport::can_post_interpreter_events()) {
2472 Label L;
2473 Register temp_reg = O5;
2474
2475 const Address interp_only (G2_thread, 0, in_bytes(JavaThread::interp_only_mode_offset()));
2476
2477 ld(interp_only, temp_reg);
2478 tst(temp_reg);
2479 br(zero, false, pt, L);
2480 delayed()->nop();
2481 call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::post_method_entry));
2482 bind(L);
2483 }
2484
2485 {
2486 Register temp_reg = O5;
2487 SkipIfEqual skip_if(this, temp_reg, &DTraceMethodProbes, zero);
2488 call_VM_leaf(noreg,
2489 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_entry),
2490 G2_thread, Lmethod);
2491 }
2492 }
2493
2494
2495 // Inline assembly for:
2496 //
2497 // if (thread is in interp_only_mode) {
2498 // // save result
2499 // InterpreterRuntime::post_method_exit();
2500 // // restore result
2501 // }
2502 // if (DTraceMethodProbes) {
2503 // SharedRuntime::dtrace_method_exit(thread, method);
2504 // }
2505 //
2506 // Native methods have their result stored in d_tmp and l_tmp
2507 // Java methods have their result stored in the expression stack
2508
2509 void InterpreterMacroAssembler::notify_method_exit(bool is_native_method,
2510 TosState state,
2511 NotifyMethodExitMode mode) {
2512 // C++ interpreter only uses this for native methods.
2513
2514 // Whenever JVMTI puts a thread in interp_only_mode, method
2515 // entry/exit events are sent for that thread to track stack
2516 // depth. If it is possible to enter interp_only_mode we add
2517 // the code to check if the event should be sent.
2518 if (mode == NotifyJVMTI && JvmtiExport::can_post_interpreter_events()) {
2519 Label L;
2520 Register temp_reg = O5;
2521
2522 const Address interp_only (G2_thread, 0, in_bytes(JavaThread::interp_only_mode_offset()));
2523
2524 ld(interp_only, temp_reg);
2525 tst(temp_reg);
2526 br(zero, false, pt, L);
2527 delayed()->nop();
2528
2529 // Note: frame::interpreter_frame_result has a dependency on how the
2530 // method result is saved across the call to post_method_exit. For
2531 // native methods it assumes the result registers are saved to
2532 // l_scratch and d_scratch. If this changes then the interpreter_frame_result
2533 // implementation will need to be updated too.
2534
2535 save_return_value(state, is_native_method);
2536 call_VM(noreg,
2537 CAST_FROM_FN_PTR(address, InterpreterRuntime::post_method_exit));
2538 restore_return_value(state, is_native_method);
2539 bind(L);
2540 }
2541
2542 {
2543 Register temp_reg = O5;
2544 // Dtrace notification
2545 SkipIfEqual skip_if(this, temp_reg, &DTraceMethodProbes, zero);
2546 save_return_value(state, is_native_method);
2547 call_VM_leaf(
2548 noreg,
2549 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_exit),
2550 G2_thread, Lmethod);
2551 restore_return_value(state, is_native_method);
2552 }
2553 }
2554
2555 void InterpreterMacroAssembler::save_return_value(TosState state, bool is_native_call) {
2556 #ifdef CC_INTERP
2557 // result potentially in O0/O1: save it across calls
2558 stf(FloatRegisterImpl::D, F0, STATE(_native_fresult));
2559 #ifdef _LP64
2560 stx(O0, STATE(_native_lresult));
2561 #else
2562 std(O0, STATE(_native_lresult));
2563 #endif
2564 #else // CC_INTERP
2565 if (is_native_call) {
2566 stf(FloatRegisterImpl::D, F0, d_tmp);
2567 #ifdef _LP64
2568 stx(O0, l_tmp);
2569 #else
2570 std(O0, l_tmp);
2571 #endif
2572 } else {
2573 push(state);
2574 }
2575 #endif // CC_INTERP
2576 }
2577
2578 void InterpreterMacroAssembler::restore_return_value( TosState state, bool is_native_call) {
2579 #ifdef CC_INTERP
2580 ldf(FloatRegisterImpl::D, STATE(_native_fresult), F0);
2581 #ifdef _LP64
2582 ldx(STATE(_native_lresult), O0);
2583 #else
2584 ldd(STATE(_native_lresult), O0);
2585 #endif
2586 #else // CC_INTERP
2587 if (is_native_call) {
2588 ldf(FloatRegisterImpl::D, d_tmp, F0);
2589 #ifdef _LP64
2590 ldx(l_tmp, O0);
2591 #else
2592 ldd(l_tmp, O0);
2593 #endif
2594 } else {
2595 pop(state);
2596 }
2597 #endif // CC_INTERP
2598 }