1 #ifdef USE_PRAGMA_IDENT_HDR 2 #pragma ident "@(#)c1_Defs_x86.hpp 1.22 07/05/05 17:04:12 JVM" 3 #endif 4 /* 5 * Copyright 2000-2005 Sun Microsystems, Inc. All Rights Reserved. 6 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 7 * 8 * This code is free software; you can redistribute it and/or modify it 9 * under the terms of the GNU General Public License version 2 only, as 10 * published by the Free Software Foundation. 11 * 12 * This code is distributed in the hope that it will be useful, but WITHOUT 13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 15 * version 2 for more details (a copy is included in the LICENSE file that 16 * accompanied this code). 17 * 18 * You should have received a copy of the GNU General Public License version 19 * 2 along with this work; if not, write to the Free Software Foundation, 20 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 21 * 22 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, 23 * CA 95054 USA or visit www.sun.com if you need additional information or 24 * have any questions. 25 * 26 */ 27 28 // native word offsets from memory address (little endian) 29 enum { 30 pd_lo_word_offset_in_bytes = 0, 31 pd_hi_word_offset_in_bytes = BytesPerWord 32 }; 33 34 // explicit rounding operations are required to implement the strictFP mode 35 enum { 36 pd_strict_fp_requires_explicit_rounding = true 37 }; 38 39 40 // registers 41 enum { 42 pd_nof_cpu_regs_frame_map = 8, // number of registers used during code emission 43 pd_nof_fpu_regs_frame_map = 8, // number of registers used during code emission 44 pd_nof_xmm_regs_frame_map = 8, // number of registers used during code emission 45 pd_nof_caller_save_cpu_regs_frame_map = 6, // number of registers killed by calls 46 pd_nof_caller_save_fpu_regs_frame_map = 8, // number of registers killed by calls 47 pd_nof_caller_save_xmm_regs_frame_map = 8, // number of registers killed by calls 48 49 pd_nof_cpu_regs_reg_alloc = 6, // number of registers that are visible to register allocator 50 pd_nof_fpu_regs_reg_alloc = 6, // number of registers that are visible to register allocator 51 52 pd_nof_cpu_regs_linearscan = 8, // number of registers visible to linear scan 53 pd_nof_fpu_regs_linearscan = 8, // number of registers visible to linear scan 54 pd_nof_xmm_regs_linearscan = 8, // number of registers visible to linear scan 55 pd_first_cpu_reg = 0, 56 pd_last_cpu_reg = 5, 57 pd_first_byte_reg = 2, 58 pd_last_byte_reg = 5, 59 pd_first_fpu_reg = pd_nof_cpu_regs_frame_map, 60 pd_last_fpu_reg = pd_first_fpu_reg + 7, 61 pd_first_xmm_reg = pd_nof_cpu_regs_frame_map + pd_nof_fpu_regs_frame_map, 62 pd_last_xmm_reg = pd_first_xmm_reg + 7 63 }; 64 65 66 // encoding of float value in debug info: 67 enum { 68 pd_float_saved_as_double = true 69 };