1 #ifdef USE_PRAGMA_IDENT_SRC
2 #pragma ident "@(#)c1_LIRGenerator_x86.cpp 1.16 07/09/17 09:25:58 JVM"
3 #endif
4 /*
5 * Copyright 2005-2006 Sun Microsystems, Inc. All Rights Reserved.
6 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
7 *
8 * This code is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License version 2 only, as
10 * published by the Free Software Foundation.
11 *
12 * This code is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 * version 2 for more details (a copy is included in the LICENSE file that
16 * accompanied this code).
17 *
18 * You should have received a copy of the GNU General Public License version
19 * 2 along with this work; if not, write to the Free Software Foundation,
20 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
21 *
22 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
23 * CA 95054 USA or visit www.sun.com if you need additional information or
24 * have any questions.
25 *
63 //--------------------------------------------------------------
64 // LIRGenerator
65 //--------------------------------------------------------------
66
67
68 LIR_Opr LIRGenerator::exceptionOopOpr() { return FrameMap::rax_oop_opr; }
69 LIR_Opr LIRGenerator::exceptionPcOpr() { return FrameMap::rdx_opr; }
70 LIR_Opr LIRGenerator::divInOpr() { return FrameMap::rax_opr; }
71 LIR_Opr LIRGenerator::divOutOpr() { return FrameMap::rax_opr; }
72 LIR_Opr LIRGenerator::remOutOpr() { return FrameMap::rdx_opr; }
73 LIR_Opr LIRGenerator::shiftCountOpr() { return FrameMap::rcx_opr; }
74 LIR_Opr LIRGenerator::syncTempOpr() { return FrameMap::rax_opr; }
75 LIR_Opr LIRGenerator::getThreadTemp() { return LIR_OprFact::illegalOpr; }
76
77
78 LIR_Opr LIRGenerator::result_register_for(ValueType* type, bool callee) {
79 LIR_Opr opr;
80 switch (type->tag()) {
81 case intTag: opr = FrameMap::rax_opr; break;
82 case objectTag: opr = FrameMap::rax_oop_opr; break;
83 case longTag: opr = FrameMap::rax_rdx_long_opr; break;
84 case floatTag: opr = UseSSE >= 1 ? FrameMap::xmm0_float_opr : FrameMap::fpu0_float_opr; break;
85 case doubleTag: opr = UseSSE >= 2 ? FrameMap::xmm0_double_opr : FrameMap::fpu0_double_opr; break;
86
87 case addressTag:
88 default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr;
89 }
90
91 assert(opr->type_field() == as_OprType(as_BasicType(type)), "type mismatch");
92 return opr;
93 }
94
95
96 LIR_Opr LIRGenerator::rlock_byte(BasicType type) {
97 LIR_Opr reg = new_register(T_INT);
98 set_vreg_flag(reg, LIRGenerator::byte_reg);
99 return reg;
100 }
101
102
103 //--------- loading items into registers --------------------------------
104
105
106 // i486 instructions can inline constants
107 bool LIRGenerator::can_store_as_constant(Value v, BasicType type) const {
108 if (type == T_SHORT || type == T_CHAR) {
109 // there is no immediate move of word values in asembler_i486.?pp
110 return false;
111 }
112 Constant* c = v->as_Constant();
113 if (c && c->state() == NULL) {
114 // constants of any type can be stored directly, except for
115 // unloaded object constants.
116 return true;
117 }
118 return false;
119 }
120
121
122 bool LIRGenerator::can_inline_as_constant(Value v) const {
123 return v->type()->tag() != objectTag ||
124 (v->type()->is_constant() && v->type()->as_ObjectType()->constant_value()->is_null_object());
125 }
126
127
128 bool LIRGenerator::can_inline_as_constant(LIR_Const* c) const {
129 return c->type() != T_OBJECT || c->as_jobject() == NULL;
130 }
131
132
133 LIR_Opr LIRGenerator::safepoint_poll_register() {
134 return LIR_OprFact::illegalOpr;
135 }
136
137
138 LIR_Address* LIRGenerator::generate_address(LIR_Opr base, LIR_Opr index,
139 int shift, int disp, BasicType type) {
140 assert(base->is_register(), "must be");
141 if (index->is_constant()) {
142 return new LIR_Address(base,
143 (index->as_constant_ptr()->as_jint() << shift) + disp,
144 type);
145 } else {
146 return new LIR_Address(base, index, (LIR_Address::Scale)shift, disp, type);
147 }
148 }
149
150
151 LIR_Address* LIRGenerator::emit_array_address(LIR_Opr array_opr, LIR_Opr index_opr,
152 BasicType type, bool needs_card_mark) {
153 int offset_in_bytes = arrayOopDesc::base_offset_in_bytes(type);
154
155 LIR_Address* addr;
156 if (index_opr->is_constant()) {
157 int elem_size = type2aelembytes[type];
158 addr = new LIR_Address(array_opr,
159 offset_in_bytes + index_opr->as_jint() * elem_size, type);
160 } else {
161 addr = new LIR_Address(array_opr,
162 index_opr,
163 LIR_Address::scale(type),
164 offset_in_bytes, type);
165 }
166 if (needs_card_mark) {
167 // This store will need a precise card mark, so go ahead and
168 // compute the full adddres instead of computing once for the
169 // store and again for the card mark.
170 LIR_Opr tmp = new_register(T_INT);
171 __ leal(LIR_OprFact::address(addr), tmp);
172 return new LIR_Address(tmp, 0, type);
173 } else {
174 return addr;
175 }
176 }
177
178
179 void LIRGenerator::increment_counter(address counter, int step) {
180 LIR_Opr temp = new_register(T_INT);
181 LIR_Opr pointer = new_register(T_INT);
182 __ move(LIR_OprFact::intConst((int)counter), pointer);
183 LIR_Address* addr = new LIR_Address(pointer, 0, T_INT);
184 increment_counter(addr, step);
185 }
186
187
188 void LIRGenerator::increment_counter(LIR_Address* addr, int step) {
189 __ add((LIR_Opr)addr, LIR_OprFact::intConst(step), (LIR_Opr)addr);
190 }
191
192
193 void LIRGenerator::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) {
194 __ cmp_mem_int(condition, base, disp, c, info);
195 }
196
197
198 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, int disp, BasicType type, CodeEmitInfo* info) {
199 __ cmp_reg_mem(condition, reg, new LIR_Address(base, disp, type), info);
200 }
201
202
280 if (use_length) {
281 __ cmp(lir_cond_belowEqual, length.result(), index.result());
282 __ branch(lir_cond_belowEqual, T_INT, new RangeCheckStub(range_check_info, index.result()));
283 } else {
284 array_range_check(array.result(), index.result(), null_check_info, range_check_info);
285 // range_check also does the null check
286 null_check_info = NULL;
287 }
288 }
289
290 if (GenerateArrayStoreCheck && needs_store_check) {
291 LIR_Opr tmp1 = new_register(objectType);
292 LIR_Opr tmp2 = new_register(objectType);
293 LIR_Opr tmp3 = new_register(objectType);
294
295 CodeEmitInfo* store_check_info = new CodeEmitInfo(range_check_info);
296 __ store_check(value.result(), array.result(), tmp1, tmp2, tmp3, store_check_info);
297 }
298
299 if (obj_store) {
300 __ move(value.result(), array_addr, null_check_info);
301 // Seems to be a precise
302 post_barrier(LIR_OprFact::address(array_addr), value.result());
303 } else {
304 __ move(value.result(), array_addr, null_check_info);
305 }
306 }
307
308
309 void LIRGenerator::do_MonitorEnter(MonitorEnter* x) {
310 assert(x->is_root(),"");
311 LIRItem obj(x->obj(), this);
312 obj.load_item();
313
314 set_no_result(x);
315
316 // "lock" stores the address of the monitor stack slot, so this is not an oop
317 LIR_Opr lock = new_register(T_INT);
318 // Need a scratch register for biased locking on x86
319 LIR_Opr scratch = LIR_OprFact::illegalOpr;
467 break;
468 default:
469 ShouldNotReachHere();
470 }
471
472 LIR_Opr result = rlock_result(x);
473 __ call_runtime_leaf(entry, getThreadTemp(), result_reg, cc->args());
474 __ move(result_reg, result);
475 } else if (x->op() == Bytecodes::_lmul) {
476 // missing test if instr is commutative and if we should swap
477 LIRItem left(x->x(), this);
478 LIRItem right(x->y(), this);
479
480 // right register is destroyed by the long mul, so it must be
481 // copied to a new register.
482 right.set_destroys_register();
483
484 left.load_item();
485 right.load_item();
486
487 LIR_Opr reg = FrameMap::rax_rdx_long_opr;
488 arithmetic_op_long(x->op(), reg, left.result(), right.result(), NULL);
489 LIR_Opr result = rlock_result(x);
490 __ move(reg, result);
491 } else {
492 // missing test if instr is commutative and if we should swap
493 LIRItem left(x->x(), this);
494 LIRItem right(x->y(), this);
495
496 left.load_item();
497 // dont load constants to save register
498 right.load_nonconstant();
499 rlock_result(x);
500 arithmetic_op_long(x->op(), x->operand(), left.result(), right.result(), NULL);
501 }
502 }
503
504
505
506 // for: _iadd, _imul, _isub, _idiv, _irem
507 void LIRGenerator::do_ArithmeticOp_Int(ArithmeticOp* x) {
676 LIR_Opr reg = rlock_result(x);
677
678 if (x->x()->type()->is_float_kind()) {
679 Bytecodes::Code code = x->op();
680 __ fcmp2int(left.result(), right.result(), reg, (code == Bytecodes::_fcmpl || code == Bytecodes::_dcmpl));
681 } else if (x->x()->type()->tag() == longTag) {
682 __ lcmp2int(left.result(), right.result(), reg);
683 } else {
684 Unimplemented();
685 }
686 }
687
688
689 void LIRGenerator::do_AttemptUpdate(Intrinsic* x) {
690 assert(x->number_of_arguments() == 3, "wrong type");
691 LIRItem obj (x->argument_at(0), this); // AtomicLong object
692 LIRItem cmp_value (x->argument_at(1), this); // value to compare with field
693 LIRItem new_value (x->argument_at(2), this); // replace field with new_value if it matches cmp_value
694
695 // compare value must be in rdx,eax (hi,lo); may be destroyed by cmpxchg8 instruction
696 cmp_value.load_item_force(FrameMap::rax_rdx_long_opr);
697
698 // new value must be in rcx,ebx (hi,lo)
699 new_value.load_item_force(FrameMap::rbx_rcx_long_opr);
700
701 // object pointer register is overwritten with field address
702 obj.load_item();
703
704 // generate compare-and-swap; produces zero condition if swap occurs
705 int value_offset = sun_misc_AtomicLongCSImpl::value_offset();
706 LIR_Opr addr = obj.result();
707 __ add(addr, LIR_OprFact::intConst(value_offset), addr);
708 LIR_Opr t1 = LIR_OprFact::illegalOpr; // no temp needed
709 LIR_Opr t2 = LIR_OprFact::illegalOpr; // no temp needed
710 __ cas_long(addr, cmp_value.result(), new_value.result(), t1, t2);
711
712 // generate conditional move of boolean result
713 LIR_Opr result = rlock_result(x);
714 __ cmove(lir_cond_equal, LIR_OprFact::intConst(1), LIR_OprFact::intConst(0), result);
715 }
716
717
718 void LIRGenerator::do_CompareAndSwap(Intrinsic* x, ValueType* type) {
719 assert(x->number_of_arguments() == 4, "wrong type");
720 LIRItem obj (x->argument_at(0), this); // object
721 LIRItem offset(x->argument_at(1), this); // offset of field
722 LIRItem cmp (x->argument_at(2), this); // value to compare with field
723 LIRItem val (x->argument_at(3), this); // replace field with val if matches cmp
724
725 assert(obj.type()->tag() == objectTag, "invalid type");
726 assert(offset.type()->tag() == intTag, "invalid type");
727 assert(cmp.type()->tag() == type->tag(), "invalid type");
728 assert(val.type()->tag() == type->tag(), "invalid type");
729
730 // get address of field
731 obj.load_item();
732 offset.load_nonconstant();
733
734 if (type == objectType) {
735 cmp.load_item_force(FrameMap::rax_oop_opr);
736 val.load_item();
737 } else if (type == intType) {
738 cmp.load_item_force(FrameMap::rax_opr);
739 val.load_item();
740 } else if (type == longType) {
741 cmp.load_item_force(FrameMap::rax_rdx_long_opr);
742 val.load_item_force(FrameMap::rbx_rcx_long_opr);
743 } else {
744 ShouldNotReachHere();
745 }
746
747 LIR_Opr addr = new_pointer_register();
748 __ move(obj.result(), addr);
749 __ add(addr, offset.result(), addr);
750
751
752
753 LIR_Opr ill = LIR_OprFact::illegalOpr; // for convenience
754 if (type == objectType)
755 __ cas_obj(addr, cmp.result(), val.result(), ill, ill);
756 else if (type == intType)
757 __ cas_int(addr, cmp.result(), val.result(), ill, ill);
758 else if (type == longType)
759 __ cas_long(addr, cmp.result(), val.result(), ill, ill);
760 else {
761 ShouldNotReachHere();
762 }
763
764 // generate conditional move of boolean result
765 LIR_Opr result = rlock_result(x);
766 __ cmove(lir_cond_equal, LIR_OprFact::intConst(1), LIR_OprFact::intConst(0), result);
767 if (type == objectType) { // Write-barrier needed for Object fields.
768 // Seems to be precise
769 post_barrier(addr, val.result());
770 }
771 }
819 default: ShouldNotReachHere();
820 }
821
822 if (use_fpu) {
823 __ move(calc_result, x->operand());
824 }
825 }
826
827
828 void LIRGenerator::do_ArrayCopy(Intrinsic* x) {
829 assert(x->number_of_arguments() == 5, "wrong type");
830 LIRItem src(x->argument_at(0), this);
831 LIRItem src_pos(x->argument_at(1), this);
832 LIRItem dst(x->argument_at(2), this);
833 LIRItem dst_pos(x->argument_at(3), this);
834 LIRItem length(x->argument_at(4), this);
835
836 // operands for arraycopy must use fixed registers, otherwise
837 // LinearScan will fail allocation (because arraycopy always needs a
838 // call)
839 src.load_item_force (FrameMap::rcx_oop_opr);
840 src_pos.load_item_force (FrameMap::rdx_opr);
841 dst.load_item_force (FrameMap::rax_oop_opr);
842 dst_pos.load_item_force (FrameMap::rbx_opr);
843 length.load_item_force (FrameMap::rdi_opr);
844 LIR_Opr tmp = (FrameMap::rsi_opr);
845 set_no_result(x);
846
847 int flags;
848 ciArrayKlass* expected_type;
849 arraycopy_helper(x, &flags, &expected_type);
850
851 CodeEmitInfo* info = state_for(x, x->state()); // we may want to have stack (deoptimization?)
852 __ arraycopy(src.result(), src_pos.result(), dst.result(), dst_pos.result(), length.result(), tmp, expected_type, flags, info); // does add_safepoint
853 }
854
855
856 // _i2l, _i2f, _i2d, _l2i, _l2f, _l2d, _f2i, _f2l, _f2d, _d2i, _d2l, _d2f
857 // _i2b, _i2c, _i2s
858 LIR_Opr fixed_register_for(BasicType type) {
859 switch (type) {
860 case T_FLOAT: return FrameMap::fpu0_float_opr;
861 case T_DOUBLE: return FrameMap::fpu0_double_opr;
862 case T_INT: return FrameMap::rax_opr;
863 case T_LONG: return FrameMap::rax_rdx_long_opr;
864 default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr;
865 }
866 }
867
868 void LIRGenerator::do_Convert(Convert* x) {
869 // flags that vary for the different operations and different SSE-settings
870 bool fixed_input, fixed_result, round_result, needs_stub;
871
872 switch (x->op()) {
873 case Bytecodes::_i2l: // fall through
874 case Bytecodes::_l2i: // fall through
875 case Bytecodes::_i2b: // fall through
876 case Bytecodes::_i2c: // fall through
877 case Bytecodes::_i2s: fixed_input = false; fixed_result = false; round_result = false; needs_stub = false; break;
878
879 case Bytecodes::_f2d: fixed_input = UseSSE == 1; fixed_result = false; round_result = false; needs_stub = false; break;
880 case Bytecodes::_d2f: fixed_input = false; fixed_result = UseSSE == 1; round_result = UseSSE < 1; needs_stub = false; break;
881 case Bytecodes::_i2f: fixed_input = false; fixed_result = false; round_result = UseSSE < 1; needs_stub = false; break;
882 case Bytecodes::_i2d: fixed_input = false; fixed_result = false; round_result = false; needs_stub = false; break;
883 case Bytecodes::_f2i: fixed_input = false; fixed_result = false; round_result = false; needs_stub = true; break;
1147 __ safepoint(LIR_OprFact::illegalOpr, state_for(x, x->state_before()));
1148 }
1149 set_no_result(x);
1150
1151 LIR_Opr left = xin->result();
1152 LIR_Opr right = yin->result();
1153 __ cmp(lir_cond(cond), left, right);
1154 profile_branch(x, cond);
1155 move_to_phi(x->state());
1156 if (x->x()->type()->is_float_kind()) {
1157 __ branch(lir_cond(cond), right->type(), x->tsux(), x->usux());
1158 } else {
1159 __ branch(lir_cond(cond), right->type(), x->tsux());
1160 }
1161 assert(x->default_sux() == x->fsux(), "wrong destination above");
1162 __ jump(x->default_sux());
1163 }
1164
1165
1166 LIR_Opr LIRGenerator::getThreadPointer() {
1167 LIR_Opr result = new_register(T_INT);
1168 __ get_thread(result);
1169 return result;
1170 }
1171
1172 void LIRGenerator::trace_block_entry(BlockBegin* block) {
1173 store_stack_parameter(LIR_OprFact::intConst(block->block_id()), in_ByteSize(0));
1174 LIR_OprList* args = new LIR_OprList();
1175 address func = CAST_FROM_FN_PTR(address, Runtime1::trace_block_entry);
1176 __ call_runtime_leaf(func, LIR_OprFact::illegalOpr, LIR_OprFact::illegalOpr, args);
1177 }
1178
1179
1180 void LIRGenerator::volatile_field_store(LIR_Opr value, LIR_Address* address,
1181 CodeEmitInfo* info) {
1182 if (address->type() == T_LONG) {
1183 address = new LIR_Address(address->base(),
1184 address->index(), address->scale(),
1185 address->disp(), T_DOUBLE);
1186 // Transfer the value atomically by using FP moves. This means
1187 // the value has to be moved between CPU and FPU registers. It
1188 // always has to be moved through spill slot since there's no
1189 // quick way to pack the value into an SSE register.
1236 LIR_Address* addr = new LIR_Address(src, offset, type);
1237 __ load(addr, dst);
1238 }
1239 }
1240
1241
1242 void LIRGenerator::put_Object_unsafe(LIR_Opr src, LIR_Opr offset, LIR_Opr data,
1243 BasicType type, bool is_volatile) {
1244 if (is_volatile && type == T_LONG) {
1245 LIR_Address* addr = new LIR_Address(src, offset, T_DOUBLE);
1246 LIR_Opr tmp = new_register(T_DOUBLE);
1247 LIR_Opr spill = new_register(T_DOUBLE);
1248 set_vreg_flag(spill, must_start_in_memory);
1249 __ move(data, spill);
1250 __ move(spill, tmp);
1251 __ move(tmp, addr);
1252 } else {
1253 LIR_Address* addr = new LIR_Address(src, offset, type);
1254 bool is_obj = (type == T_ARRAY || type == T_OBJECT);
1255 if (is_obj) {
1256 __ move(data, addr);
1257 assert(src->is_register(), "must be register");
1258 // Seems to be a precise address
1259 post_barrier(LIR_OprFact::address(addr), data);
1260 } else {
1261 __ move(data, addr);
1262 }
1263 }
1264 }
|
1 /*
2 * Copyright 2005-2008 Sun Microsystems, Inc. All Rights Reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
20 * CA 95054 USA or visit www.sun.com if you need additional information or
21 * have any questions.
22 *
60 //--------------------------------------------------------------
61 // LIRGenerator
62 //--------------------------------------------------------------
63
64
65 LIR_Opr LIRGenerator::exceptionOopOpr() { return FrameMap::rax_oop_opr; }
66 LIR_Opr LIRGenerator::exceptionPcOpr() { return FrameMap::rdx_opr; }
67 LIR_Opr LIRGenerator::divInOpr() { return FrameMap::rax_opr; }
68 LIR_Opr LIRGenerator::divOutOpr() { return FrameMap::rax_opr; }
69 LIR_Opr LIRGenerator::remOutOpr() { return FrameMap::rdx_opr; }
70 LIR_Opr LIRGenerator::shiftCountOpr() { return FrameMap::rcx_opr; }
71 LIR_Opr LIRGenerator::syncTempOpr() { return FrameMap::rax_opr; }
72 LIR_Opr LIRGenerator::getThreadTemp() { return LIR_OprFact::illegalOpr; }
73
74
75 LIR_Opr LIRGenerator::result_register_for(ValueType* type, bool callee) {
76 LIR_Opr opr;
77 switch (type->tag()) {
78 case intTag: opr = FrameMap::rax_opr; break;
79 case objectTag: opr = FrameMap::rax_oop_opr; break;
80 case longTag: opr = FrameMap::long0_opr; break;
81 case floatTag: opr = UseSSE >= 1 ? FrameMap::xmm0_float_opr : FrameMap::fpu0_float_opr; break;
82 case doubleTag: opr = UseSSE >= 2 ? FrameMap::xmm0_double_opr : FrameMap::fpu0_double_opr; break;
83
84 case addressTag:
85 default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr;
86 }
87
88 assert(opr->type_field() == as_OprType(as_BasicType(type)), "type mismatch");
89 return opr;
90 }
91
92
93 LIR_Opr LIRGenerator::rlock_byte(BasicType type) {
94 LIR_Opr reg = new_register(T_INT);
95 set_vreg_flag(reg, LIRGenerator::byte_reg);
96 return reg;
97 }
98
99
100 //--------- loading items into registers --------------------------------
101
102
103 // i486 instructions can inline constants
104 bool LIRGenerator::can_store_as_constant(Value v, BasicType type) const {
105 if (type == T_SHORT || type == T_CHAR) {
106 // there is no immediate move of word values in asembler_i486.?pp
107 return false;
108 }
109 Constant* c = v->as_Constant();
110 if (c && c->state() == NULL) {
111 // constants of any type can be stored directly, except for
112 // unloaded object constants.
113 return true;
114 }
115 return false;
116 }
117
118
119 bool LIRGenerator::can_inline_as_constant(Value v) const {
120 if (v->type()->tag() == longTag) return false;
121 return v->type()->tag() != objectTag ||
122 (v->type()->is_constant() && v->type()->as_ObjectType()->constant_value()->is_null_object());
123 }
124
125
126 bool LIRGenerator::can_inline_as_constant(LIR_Const* c) const {
127 if (c->type() == T_LONG) return false;
128 return c->type() != T_OBJECT || c->as_jobject() == NULL;
129 }
130
131
132 LIR_Opr LIRGenerator::safepoint_poll_register() {
133 return LIR_OprFact::illegalOpr;
134 }
135
136
137 LIR_Address* LIRGenerator::generate_address(LIR_Opr base, LIR_Opr index,
138 int shift, int disp, BasicType type) {
139 assert(base->is_register(), "must be");
140 if (index->is_constant()) {
141 return new LIR_Address(base,
142 (index->as_constant_ptr()->as_jint() << shift) + disp,
143 type);
144 } else {
145 return new LIR_Address(base, index, (LIR_Address::Scale)shift, disp, type);
146 }
147 }
148
149
150 LIR_Address* LIRGenerator::emit_array_address(LIR_Opr array_opr, LIR_Opr index_opr,
151 BasicType type, bool needs_card_mark) {
152 int offset_in_bytes = arrayOopDesc::base_offset_in_bytes(type);
153
154 LIR_Address* addr;
155 if (index_opr->is_constant()) {
156 int elem_size = type2aelembytes(type);
157 addr = new LIR_Address(array_opr,
158 offset_in_bytes + index_opr->as_jint() * elem_size, type);
159 } else {
160 #ifdef _LP64
161 if (index_opr->type() == T_INT) {
162 LIR_Opr tmp = new_register(T_LONG);
163 __ convert(Bytecodes::_i2l, index_opr, tmp);
164 index_opr = tmp;
165 }
166 #endif // _LP64
167 addr = new LIR_Address(array_opr,
168 index_opr,
169 LIR_Address::scale(type),
170 offset_in_bytes, type);
171 }
172 if (needs_card_mark) {
173 // This store will need a precise card mark, so go ahead and
174 // compute the full adddres instead of computing once for the
175 // store and again for the card mark.
176 LIR_Opr tmp = new_pointer_register();
177 __ leal(LIR_OprFact::address(addr), tmp);
178 return new LIR_Address(tmp, 0, type);
179 } else {
180 return addr;
181 }
182 }
183
184
185 void LIRGenerator::increment_counter(address counter, int step) {
186 LIR_Opr pointer = new_pointer_register();
187 __ move(LIR_OprFact::intptrConst(counter), pointer);
188 LIR_Address* addr = new LIR_Address(pointer, 0, T_INT);
189 increment_counter(addr, step);
190 }
191
192
193 void LIRGenerator::increment_counter(LIR_Address* addr, int step) {
194 __ add((LIR_Opr)addr, LIR_OprFact::intConst(step), (LIR_Opr)addr);
195 }
196
197
198 void LIRGenerator::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) {
199 __ cmp_mem_int(condition, base, disp, c, info);
200 }
201
202
203 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, int disp, BasicType type, CodeEmitInfo* info) {
204 __ cmp_reg_mem(condition, reg, new LIR_Address(base, disp, type), info);
205 }
206
207
285 if (use_length) {
286 __ cmp(lir_cond_belowEqual, length.result(), index.result());
287 __ branch(lir_cond_belowEqual, T_INT, new RangeCheckStub(range_check_info, index.result()));
288 } else {
289 array_range_check(array.result(), index.result(), null_check_info, range_check_info);
290 // range_check also does the null check
291 null_check_info = NULL;
292 }
293 }
294
295 if (GenerateArrayStoreCheck && needs_store_check) {
296 LIR_Opr tmp1 = new_register(objectType);
297 LIR_Opr tmp2 = new_register(objectType);
298 LIR_Opr tmp3 = new_register(objectType);
299
300 CodeEmitInfo* store_check_info = new CodeEmitInfo(range_check_info);
301 __ store_check(value.result(), array.result(), tmp1, tmp2, tmp3, store_check_info);
302 }
303
304 if (obj_store) {
305 // Needs GC write barriers.
306 pre_barrier(LIR_OprFact::address(array_addr), false, NULL);
307 __ move(value.result(), array_addr, null_check_info);
308 // Seems to be a precise
309 post_barrier(LIR_OprFact::address(array_addr), value.result());
310 } else {
311 __ move(value.result(), array_addr, null_check_info);
312 }
313 }
314
315
316 void LIRGenerator::do_MonitorEnter(MonitorEnter* x) {
317 assert(x->is_root(),"");
318 LIRItem obj(x->obj(), this);
319 obj.load_item();
320
321 set_no_result(x);
322
323 // "lock" stores the address of the monitor stack slot, so this is not an oop
324 LIR_Opr lock = new_register(T_INT);
325 // Need a scratch register for biased locking on x86
326 LIR_Opr scratch = LIR_OprFact::illegalOpr;
474 break;
475 default:
476 ShouldNotReachHere();
477 }
478
479 LIR_Opr result = rlock_result(x);
480 __ call_runtime_leaf(entry, getThreadTemp(), result_reg, cc->args());
481 __ move(result_reg, result);
482 } else if (x->op() == Bytecodes::_lmul) {
483 // missing test if instr is commutative and if we should swap
484 LIRItem left(x->x(), this);
485 LIRItem right(x->y(), this);
486
487 // right register is destroyed by the long mul, so it must be
488 // copied to a new register.
489 right.set_destroys_register();
490
491 left.load_item();
492 right.load_item();
493
494 LIR_Opr reg = FrameMap::long0_opr;
495 arithmetic_op_long(x->op(), reg, left.result(), right.result(), NULL);
496 LIR_Opr result = rlock_result(x);
497 __ move(reg, result);
498 } else {
499 // missing test if instr is commutative and if we should swap
500 LIRItem left(x->x(), this);
501 LIRItem right(x->y(), this);
502
503 left.load_item();
504 // dont load constants to save register
505 right.load_nonconstant();
506 rlock_result(x);
507 arithmetic_op_long(x->op(), x->operand(), left.result(), right.result(), NULL);
508 }
509 }
510
511
512
513 // for: _iadd, _imul, _isub, _idiv, _irem
514 void LIRGenerator::do_ArithmeticOp_Int(ArithmeticOp* x) {
683 LIR_Opr reg = rlock_result(x);
684
685 if (x->x()->type()->is_float_kind()) {
686 Bytecodes::Code code = x->op();
687 __ fcmp2int(left.result(), right.result(), reg, (code == Bytecodes::_fcmpl || code == Bytecodes::_dcmpl));
688 } else if (x->x()->type()->tag() == longTag) {
689 __ lcmp2int(left.result(), right.result(), reg);
690 } else {
691 Unimplemented();
692 }
693 }
694
695
696 void LIRGenerator::do_AttemptUpdate(Intrinsic* x) {
697 assert(x->number_of_arguments() == 3, "wrong type");
698 LIRItem obj (x->argument_at(0), this); // AtomicLong object
699 LIRItem cmp_value (x->argument_at(1), this); // value to compare with field
700 LIRItem new_value (x->argument_at(2), this); // replace field with new_value if it matches cmp_value
701
702 // compare value must be in rdx,eax (hi,lo); may be destroyed by cmpxchg8 instruction
703 cmp_value.load_item_force(FrameMap::long0_opr);
704
705 // new value must be in rcx,ebx (hi,lo)
706 new_value.load_item_force(FrameMap::long1_opr);
707
708 // object pointer register is overwritten with field address
709 obj.load_item();
710
711 // generate compare-and-swap; produces zero condition if swap occurs
712 int value_offset = sun_misc_AtomicLongCSImpl::value_offset();
713 LIR_Opr addr = obj.result();
714 __ add(addr, LIR_OprFact::intConst(value_offset), addr);
715 LIR_Opr t1 = LIR_OprFact::illegalOpr; // no temp needed
716 LIR_Opr t2 = LIR_OprFact::illegalOpr; // no temp needed
717 __ cas_long(addr, cmp_value.result(), new_value.result(), t1, t2);
718
719 // generate conditional move of boolean result
720 LIR_Opr result = rlock_result(x);
721 __ cmove(lir_cond_equal, LIR_OprFact::intConst(1), LIR_OprFact::intConst(0), result);
722 }
723
724
725 void LIRGenerator::do_CompareAndSwap(Intrinsic* x, ValueType* type) {
726 assert(x->number_of_arguments() == 4, "wrong type");
727 LIRItem obj (x->argument_at(0), this); // object
728 LIRItem offset(x->argument_at(1), this); // offset of field
729 LIRItem cmp (x->argument_at(2), this); // value to compare with field
730 LIRItem val (x->argument_at(3), this); // replace field with val if matches cmp
731
732 assert(obj.type()->tag() == objectTag, "invalid type");
733
734 // In 64bit the type can be long, sparc doesn't have this assert
735 // assert(offset.type()->tag() == intTag, "invalid type");
736
737 assert(cmp.type()->tag() == type->tag(), "invalid type");
738 assert(val.type()->tag() == type->tag(), "invalid type");
739
740 // get address of field
741 obj.load_item();
742 offset.load_nonconstant();
743
744 if (type == objectType) {
745 cmp.load_item_force(FrameMap::rax_oop_opr);
746 val.load_item();
747 } else if (type == intType) {
748 cmp.load_item_force(FrameMap::rax_opr);
749 val.load_item();
750 } else if (type == longType) {
751 cmp.load_item_force(FrameMap::long0_opr);
752 val.load_item_force(FrameMap::long1_opr);
753 } else {
754 ShouldNotReachHere();
755 }
756
757 LIR_Opr addr = new_pointer_register();
758 __ move(obj.result(), addr);
759 __ add(addr, offset.result(), addr);
760
761 if (type == objectType) { // Write-barrier needed for Object fields.
762 // Do the pre-write barrier, if any.
763 pre_barrier(addr, false, NULL);
764 }
765
766 LIR_Opr ill = LIR_OprFact::illegalOpr; // for convenience
767 if (type == objectType)
768 __ cas_obj(addr, cmp.result(), val.result(), ill, ill);
769 else if (type == intType)
770 __ cas_int(addr, cmp.result(), val.result(), ill, ill);
771 else if (type == longType)
772 __ cas_long(addr, cmp.result(), val.result(), ill, ill);
773 else {
774 ShouldNotReachHere();
775 }
776
777 // generate conditional move of boolean result
778 LIR_Opr result = rlock_result(x);
779 __ cmove(lir_cond_equal, LIR_OprFact::intConst(1), LIR_OprFact::intConst(0), result);
780 if (type == objectType) { // Write-barrier needed for Object fields.
781 // Seems to be precise
782 post_barrier(addr, val.result());
783 }
784 }
832 default: ShouldNotReachHere();
833 }
834
835 if (use_fpu) {
836 __ move(calc_result, x->operand());
837 }
838 }
839
840
841 void LIRGenerator::do_ArrayCopy(Intrinsic* x) {
842 assert(x->number_of_arguments() == 5, "wrong type");
843 LIRItem src(x->argument_at(0), this);
844 LIRItem src_pos(x->argument_at(1), this);
845 LIRItem dst(x->argument_at(2), this);
846 LIRItem dst_pos(x->argument_at(3), this);
847 LIRItem length(x->argument_at(4), this);
848
849 // operands for arraycopy must use fixed registers, otherwise
850 // LinearScan will fail allocation (because arraycopy always needs a
851 // call)
852
853 #ifndef _LP64
854 src.load_item_force (FrameMap::rcx_oop_opr);
855 src_pos.load_item_force (FrameMap::rdx_opr);
856 dst.load_item_force (FrameMap::rax_oop_opr);
857 dst_pos.load_item_force (FrameMap::rbx_opr);
858 length.load_item_force (FrameMap::rdi_opr);
859 LIR_Opr tmp = (FrameMap::rsi_opr);
860 #else
861
862 // The java calling convention will give us enough registers
863 // so that on the stub side the args will be perfect already.
864 // On the other slow/special case side we call C and the arg
865 // positions are not similar enough to pick one as the best.
866 // Also because the java calling convention is a "shifted" version
867 // of the C convention we can process the java args trivially into C
868 // args without worry of overwriting during the xfer
869
870 src.load_item_force (FrameMap::as_oop_opr(j_rarg0));
871 src_pos.load_item_force (FrameMap::as_opr(j_rarg1));
872 dst.load_item_force (FrameMap::as_oop_opr(j_rarg2));
873 dst_pos.load_item_force (FrameMap::as_opr(j_rarg3));
874 length.load_item_force (FrameMap::as_opr(j_rarg4));
875
876 LIR_Opr tmp = FrameMap::as_opr(j_rarg5);
877 #endif // LP64
878
879 set_no_result(x);
880
881 int flags;
882 ciArrayKlass* expected_type;
883 arraycopy_helper(x, &flags, &expected_type);
884
885 CodeEmitInfo* info = state_for(x, x->state()); // we may want to have stack (deoptimization?)
886 __ arraycopy(src.result(), src_pos.result(), dst.result(), dst_pos.result(), length.result(), tmp, expected_type, flags, info); // does add_safepoint
887 }
888
889
890 // _i2l, _i2f, _i2d, _l2i, _l2f, _l2d, _f2i, _f2l, _f2d, _d2i, _d2l, _d2f
891 // _i2b, _i2c, _i2s
892 LIR_Opr fixed_register_for(BasicType type) {
893 switch (type) {
894 case T_FLOAT: return FrameMap::fpu0_float_opr;
895 case T_DOUBLE: return FrameMap::fpu0_double_opr;
896 case T_INT: return FrameMap::rax_opr;
897 case T_LONG: return FrameMap::long0_opr;
898 default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr;
899 }
900 }
901
902 void LIRGenerator::do_Convert(Convert* x) {
903 // flags that vary for the different operations and different SSE-settings
904 bool fixed_input, fixed_result, round_result, needs_stub;
905
906 switch (x->op()) {
907 case Bytecodes::_i2l: // fall through
908 case Bytecodes::_l2i: // fall through
909 case Bytecodes::_i2b: // fall through
910 case Bytecodes::_i2c: // fall through
911 case Bytecodes::_i2s: fixed_input = false; fixed_result = false; round_result = false; needs_stub = false; break;
912
913 case Bytecodes::_f2d: fixed_input = UseSSE == 1; fixed_result = false; round_result = false; needs_stub = false; break;
914 case Bytecodes::_d2f: fixed_input = false; fixed_result = UseSSE == 1; round_result = UseSSE < 1; needs_stub = false; break;
915 case Bytecodes::_i2f: fixed_input = false; fixed_result = false; round_result = UseSSE < 1; needs_stub = false; break;
916 case Bytecodes::_i2d: fixed_input = false; fixed_result = false; round_result = false; needs_stub = false; break;
917 case Bytecodes::_f2i: fixed_input = false; fixed_result = false; round_result = false; needs_stub = true; break;
1181 __ safepoint(LIR_OprFact::illegalOpr, state_for(x, x->state_before()));
1182 }
1183 set_no_result(x);
1184
1185 LIR_Opr left = xin->result();
1186 LIR_Opr right = yin->result();
1187 __ cmp(lir_cond(cond), left, right);
1188 profile_branch(x, cond);
1189 move_to_phi(x->state());
1190 if (x->x()->type()->is_float_kind()) {
1191 __ branch(lir_cond(cond), right->type(), x->tsux(), x->usux());
1192 } else {
1193 __ branch(lir_cond(cond), right->type(), x->tsux());
1194 }
1195 assert(x->default_sux() == x->fsux(), "wrong destination above");
1196 __ jump(x->default_sux());
1197 }
1198
1199
1200 LIR_Opr LIRGenerator::getThreadPointer() {
1201 #ifdef _LP64
1202 return FrameMap::as_pointer_opr(r15_thread);
1203 #else
1204 LIR_Opr result = new_register(T_INT);
1205 __ get_thread(result);
1206 return result;
1207 #endif //
1208 }
1209
1210 void LIRGenerator::trace_block_entry(BlockBegin* block) {
1211 store_stack_parameter(LIR_OprFact::intConst(block->block_id()), in_ByteSize(0));
1212 LIR_OprList* args = new LIR_OprList();
1213 address func = CAST_FROM_FN_PTR(address, Runtime1::trace_block_entry);
1214 __ call_runtime_leaf(func, LIR_OprFact::illegalOpr, LIR_OprFact::illegalOpr, args);
1215 }
1216
1217
1218 void LIRGenerator::volatile_field_store(LIR_Opr value, LIR_Address* address,
1219 CodeEmitInfo* info) {
1220 if (address->type() == T_LONG) {
1221 address = new LIR_Address(address->base(),
1222 address->index(), address->scale(),
1223 address->disp(), T_DOUBLE);
1224 // Transfer the value atomically by using FP moves. This means
1225 // the value has to be moved between CPU and FPU registers. It
1226 // always has to be moved through spill slot since there's no
1227 // quick way to pack the value into an SSE register.
1274 LIR_Address* addr = new LIR_Address(src, offset, type);
1275 __ load(addr, dst);
1276 }
1277 }
1278
1279
1280 void LIRGenerator::put_Object_unsafe(LIR_Opr src, LIR_Opr offset, LIR_Opr data,
1281 BasicType type, bool is_volatile) {
1282 if (is_volatile && type == T_LONG) {
1283 LIR_Address* addr = new LIR_Address(src, offset, T_DOUBLE);
1284 LIR_Opr tmp = new_register(T_DOUBLE);
1285 LIR_Opr spill = new_register(T_DOUBLE);
1286 set_vreg_flag(spill, must_start_in_memory);
1287 __ move(data, spill);
1288 __ move(spill, tmp);
1289 __ move(tmp, addr);
1290 } else {
1291 LIR_Address* addr = new LIR_Address(src, offset, type);
1292 bool is_obj = (type == T_ARRAY || type == T_OBJECT);
1293 if (is_obj) {
1294 // Do the pre-write barrier, if any.
1295 pre_barrier(LIR_OprFact::address(addr), false, NULL);
1296 __ move(data, addr);
1297 assert(src->is_register(), "must be register");
1298 // Seems to be a precise address
1299 post_barrier(LIR_OprFact::address(addr), data);
1300 } else {
1301 __ move(data, addr);
1302 }
1303 }
1304 }
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