1 #ifdef USE_PRAGMA_IDENT_HDR
2 #pragma ident "@(#)c1_LinearScan_x86.hpp 1.10 07/07/02 16:50:32 JVM"
3 #endif
4 /*
5 * Copyright 2005-2006 Sun Microsystems, Inc. All Rights Reserved.
6 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
7 *
8 * This code is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License version 2 only, as
10 * published by the Free Software Foundation.
11 *
12 * This code is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 * version 2 for more details (a copy is included in the LICENSE file that
16 * accompanied this code).
17 *
18 * You should have received a copy of the GNU General Public License version
19 * 2 along with this work; if not, write to the Free Software Foundation,
20 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
21 *
22 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
23 * CA 95054 USA or visit www.sun.com if you need additional information or
24 * have any questions.
25 *
26 */
27
28 inline bool LinearScan::is_processed_reg_num(int reg_num) {
29 // rsp and rbp (numbers 6 ancd 7) are ignored
30 assert(FrameMap::rsp_opr->cpu_regnr() == 6, "wrong assumption below");
31 assert(FrameMap::rbp_opr->cpu_regnr() == 7, "wrong assumption below");
32 assert(reg_num >= 0, "invalid reg_num");
33
34 return reg_num < 6 || reg_num > 7;
35 }
36
37 inline int LinearScan::num_physical_regs(BasicType type) {
38 // Intel requires two cpu registers for long,
39 // but requires only one fpu register for double
40 if (type == T_LONG) {
41 return 2;
42 }
43 return 1;
44 }
45
46
47 inline bool LinearScan::requires_adjacent_regs(BasicType type) {
48 return false;
49 }
50
51 inline bool LinearScan::is_caller_save(int assigned_reg) {
52 assert(assigned_reg >= 0 && assigned_reg < nof_regs, "should call this only for registers");
53 return true; // no callee-saved registers on Intel
54
55 }
56
57
58 inline void LinearScan::pd_add_temps(LIR_Op* op) {
59 switch (op->code()) {
60 case lir_tan:
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1 /*
2 * Copyright 2005-2008 Sun Microsystems, Inc. All Rights Reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
20 * CA 95054 USA or visit www.sun.com if you need additional information or
21 * have any questions.
22 *
23 */
24
25 inline bool LinearScan::is_processed_reg_num(int reg_num) {
26 #ifndef _LP64
27 // rsp and rbp (numbers 6 ancd 7) are ignored
28 assert(FrameMap::rsp_opr->cpu_regnr() == 6, "wrong assumption below");
29 assert(FrameMap::rbp_opr->cpu_regnr() == 7, "wrong assumption below");
30 assert(reg_num >= 0, "invalid reg_num");
31
32 return reg_num < 6 || reg_num > 7;
33 #else
34 // rsp and rbp, r10, r15 (numbers 6 ancd 7) are ignored
35 assert(FrameMap::r10_opr->cpu_regnr() == 12, "wrong assumption below");
36 assert(FrameMap::r15_opr->cpu_regnr() == 13, "wrong assumption below");
37 assert(FrameMap::rsp_opr->cpu_regnrLo() == 14, "wrong assumption below");
38 assert(FrameMap::rbp_opr->cpu_regnrLo() == 15, "wrong assumption below");
39 assert(reg_num >= 0, "invalid reg_num");
40
41 return reg_num < 12 || reg_num > 15;
42 #endif // _LP64
43 }
44
45 inline int LinearScan::num_physical_regs(BasicType type) {
46 // Intel requires two cpu registers for long,
47 // but requires only one fpu register for double
48 if (LP64_ONLY(false &&) type == T_LONG) {
49 return 2;
50 }
51 return 1;
52 }
53
54
55 inline bool LinearScan::requires_adjacent_regs(BasicType type) {
56 return false;
57 }
58
59 inline bool LinearScan::is_caller_save(int assigned_reg) {
60 assert(assigned_reg >= 0 && assigned_reg < nof_regs, "should call this only for registers");
61 return true; // no callee-saved registers on Intel
62
63 }
64
65
66 inline void LinearScan::pd_add_temps(LIR_Op* op) {
67 switch (op->code()) {
68 case lir_tan:
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