1 #ifdef USE_PRAGMA_IDENT_SRC
2 #pragma ident "@(#)c1_LIR.cpp 1.119 07/06/18 14:25:24 JVM"
3 #endif
4 /*
5 * Copyright 2000-2006 Sun Microsystems, Inc. All Rights Reserved.
6 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
7 *
8 * This code is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License version 2 only, as
10 * published by the Free Software Foundation.
11 *
12 * This code is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 * version 2 for more details (a copy is included in the LICENSE file that
16 * accompanied this code).
17 *
18 * You should have received a copy of the GNU General Public License version
19 * 2 along with this work; if not, write to the Free Software Foundation,
20 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
21 *
22 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
23 * CA 95054 USA or visit www.sun.com if you need additional information or
24 * have any questions.
25 *
26 */
27
28 # include "incls/_precompiled.incl"
29 # include "incls/_c1_LIR.cpp.incl"
30
31 Register LIR_OprDesc::as_register() const {
32 return FrameMap::cpu_rnr2reg(cpu_regnr());
33 }
34
35 Register LIR_OprDesc::as_register_lo() const {
36 return FrameMap::cpu_rnr2reg(cpu_regnrLo());
37 }
38
39 Register LIR_OprDesc::as_register_hi() const {
40 return FrameMap::cpu_rnr2reg(cpu_regnrHi());
41 }
42
43 #ifdef IA32
44
45 XMMRegister LIR_OprDesc::as_xmm_float_reg() const {
46 return FrameMap::nr2xmmreg(xmm_regnr());
47 }
48
49 XMMRegister LIR_OprDesc::as_xmm_double_reg() const {
50 assert(xmm_regnrLo() == xmm_regnrHi(), "assumed in calculation");
51 return FrameMap::nr2xmmreg(xmm_regnrLo());
52 }
53
54 #endif
55
56
57 #ifdef SPARC
58
59 FloatRegister LIR_OprDesc::as_float_reg() const {
60 return FrameMap::nr2floatreg(fpu_regnr());
61 }
62
63 FloatRegister LIR_OprDesc::as_double_reg() const {
64 return FrameMap::nr2floatreg(fpu_regnrHi());
65 }
66
67 #endif
68
69 LIR_Opr LIR_OprFact::illegalOpr = LIR_OprFact::illegal();
70
71 LIR_Opr LIR_OprFact::value_type(ValueType* type) {
72 ValueTag tag = type->tag();
73 switch (tag) {
74 case objectTag : {
75 ClassConstant* c = type->as_ClassConstant();
76 if (c != NULL && !c->value()->is_loaded()) {
77 return LIR_OprFact::oopConst(NULL);
78 } else {
79 return LIR_OprFact::oopConst(type->as_ObjectType()->encoding());
80 }
81 }
82 case addressTag: return LIR_OprFact::intConst(type->as_AddressConstant()->value());
83 case intTag : return LIR_OprFact::intConst(type->as_IntConstant()->value());
84 case floatTag : return LIR_OprFact::floatConst(type->as_FloatConstant()->value());
85 case longTag : return LIR_OprFact::longConst(type->as_LongConstant()->value());
86 case doubleTag : return LIR_OprFact::doubleConst(type->as_DoubleConstant()->value());
87 default: ShouldNotReachHere();
88 }
89 }
90
91
92 LIR_Opr LIR_OprFact::dummy_value_type(ValueType* type) {
93 switch (type->tag()) {
94 case objectTag: return LIR_OprFact::oopConst(NULL);
95 case addressTag:
96 case intTag: return LIR_OprFact::intConst(0);
97 case floatTag: return LIR_OprFact::floatConst(0.0);
98 case longTag: return LIR_OprFact::longConst(0);
99 case doubleTag: return LIR_OprFact::doubleConst(0.0);
100 default: ShouldNotReachHere();
101 }
102 return illegalOpr;
103 }
104
105
106
107 //---------------------------------------------------
108
109
110 LIR_Address::Scale LIR_Address::scale(BasicType type) {
111 int elem_size = type2aelembytes[type];
112 switch (elem_size) {
113 case 1: return LIR_Address::times_1;
114 case 2: return LIR_Address::times_2;
115 case 4: return LIR_Address::times_4;
116 case 8: return LIR_Address::times_8;
117 }
118 ShouldNotReachHere();
119 return LIR_Address::times_1;
120 }
121
122
123 #ifndef PRODUCT
124 void LIR_Address::verify() const {
125 #ifdef SPARC
126 assert(scale() == times_1, "Scaled addressing mode not available on SPARC and should not be used");
127 assert(disp() == 0 || index()->is_illegal(), "can't have both");
128 #endif
129 #ifdef _LP64
130 assert(base()->is_cpu_register(), "wrong base operand");
131 assert(index()->is_illegal() || index()->is_double_cpu(), "wrong index operand");
132 assert(base()->type() == T_OBJECT || base()->type() == T_LONG,
133 "wrong type for addresses");
134 #else
135 assert(base()->is_single_cpu(), "wrong base operand");
136 assert(index()->is_illegal() || index()->is_single_cpu(), "wrong index operand");
137 assert(base()->type() == T_OBJECT || base()->type() == T_INT,
138 "wrong type for addresses");
139 #endif
140 }
141 #endif
142
143
144 //---------------------------------------------------
145
146 char LIR_OprDesc::type_char(BasicType t) {
147 switch (t) {
148 case T_ARRAY:
149 t = T_OBJECT;
150 case T_BOOLEAN:
151 case T_CHAR:
152 case T_FLOAT:
153 case T_DOUBLE:
154 case T_BYTE:
155 case T_SHORT:
156 case T_INT:
157 case T_LONG:
158 case T_OBJECT:
159 case T_ADDRESS:
160 case T_VOID:
161 return ::type2char(t);
162
163 case T_ILLEGAL:
164 return '?';
165
166 default:
167 ShouldNotReachHere();
168 }
169 }
170
171 #ifndef PRODUCT
172 void LIR_OprDesc::validate_type() const {
173
174 #ifdef ASSERT
175 if (!is_pointer() && !is_illegal()) {
176 switch (as_BasicType(type_field())) {
177 case T_LONG:
178 assert((kind_field() == cpu_register || kind_field() == stack_value) && size_field() == double_size, "must match");
179 break;
180 case T_FLOAT:
181 assert((kind_field() == fpu_register || kind_field() == stack_value) && size_field() == single_size, "must match");
182 break;
183 case T_DOUBLE:
184 assert((kind_field() == fpu_register || kind_field() == stack_value) && size_field() == double_size, "must match");
185 break;
186 case T_BOOLEAN:
187 case T_CHAR:
188 case T_BYTE:
189 case T_SHORT:
190 case T_INT:
191 case T_OBJECT:
192 case T_ARRAY:
193 assert((kind_field() == cpu_register || kind_field() == stack_value) && size_field() == single_size, "must match");
194 break;
195
196 case T_ILLEGAL:
197 // XXX TKR also means unknown right now
198 // assert(is_illegal(), "must match");
199 break;
200
201 default:
202 ShouldNotReachHere();
203 }
204 }
205 #endif
206
207 }
208 #endif // PRODUCT
209
210
211 bool LIR_OprDesc::is_oop() const {
212 if (is_pointer()) {
213 return pointer()->is_oop_pointer();
214 } else {
215 OprType t= type_field();
216 assert(t != unknown_type, "not set");
217 return t == object_type;
218 }
219 }
220
221
222
223 void LIR_Op2::verify() const {
224 #ifdef ASSERT
225 switch (code()) {
226 case lir_cmove:
227 break;
228
229 default:
230 assert(!result_opr()->is_register() || !result_opr()->is_oop_register(),
231 "can't produce oops from arith");
232 }
233
234 if (TwoOperandLIRForm) {
235 switch (code()) {
236 case lir_add:
237 case lir_sub:
238 case lir_mul:
239 case lir_mul_strictfp:
240 case lir_div:
241 case lir_div_strictfp:
242 case lir_rem:
243 case lir_logic_and:
244 case lir_logic_or:
245 case lir_logic_xor:
246 case lir_shl:
247 case lir_shr:
248 assert(in_opr1() == result_opr(), "opr1 and result must match");
249 assert(in_opr1()->is_valid() && in_opr2()->is_valid(), "must be valid");
250 break;
251
252 // special handling for lir_ushr because of write barriers
253 case lir_ushr:
254 assert(in_opr1() == result_opr() || in_opr2()->is_constant(), "opr1 and result must match or shift count is constant");
255 assert(in_opr1()->is_valid() && in_opr2()->is_valid(), "must be valid");
256 break;
257
258 }
259 }
260 #endif
261 }
262
263
264 LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block)
265 : LIR_Op(lir_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL)
266 , _cond(cond)
267 , _type(type)
268 , _label(block->label())
269 , _block(block)
270 , _ublock(NULL)
271 , _stub(NULL) {
272 }
273
274 LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BasicType type, CodeStub* stub) :
275 LIR_Op(lir_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL)
276 , _cond(cond)
277 , _type(type)
278 , _label(stub->entry())
279 , _block(NULL)
280 , _ublock(NULL)
281 , _stub(stub) {
282 }
283
284 LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block, BlockBegin* ublock)
285 : LIR_Op(lir_cond_float_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL)
286 , _cond(cond)
287 , _type(type)
288 , _label(block->label())
289 , _block(block)
290 , _ublock(ublock)
291 , _stub(NULL)
292 {
293 }
294
295 void LIR_OpBranch::change_block(BlockBegin* b) {
296 assert(_block != NULL, "must have old block");
297 assert(_block->label() == label(), "must be equal");
298
299 _block = b;
300 _label = b->label();
301 }
302
303 void LIR_OpBranch::change_ublock(BlockBegin* b) {
304 assert(_ublock != NULL, "must have old block");
305 _ublock = b;
306 }
307
308 void LIR_OpBranch::negate_cond() {
309 switch (_cond) {
310 case lir_cond_equal: _cond = lir_cond_notEqual; break;
311 case lir_cond_notEqual: _cond = lir_cond_equal; break;
312 case lir_cond_less: _cond = lir_cond_greaterEqual; break;
313 case lir_cond_lessEqual: _cond = lir_cond_greater; break;
314 case lir_cond_greaterEqual: _cond = lir_cond_less; break;
315 case lir_cond_greater: _cond = lir_cond_lessEqual; break;
316 default: ShouldNotReachHere();
317 }
318 }
319
320
321 LIR_OpTypeCheck::LIR_OpTypeCheck(LIR_Code code, LIR_Opr result, LIR_Opr object, ciKlass* klass,
322 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3,
323 bool fast_check, CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch,
324 CodeStub* stub,
325 ciMethod* profiled_method,
326 int profiled_bci)
327 : LIR_Op(code, result, NULL)
328 , _object(object)
329 , _array(LIR_OprFact::illegalOpr)
330 , _klass(klass)
331 , _tmp1(tmp1)
332 , _tmp2(tmp2)
333 , _tmp3(tmp3)
334 , _fast_check(fast_check)
335 , _stub(stub)
336 , _info_for_patch(info_for_patch)
337 , _info_for_exception(info_for_exception)
338 , _profiled_method(profiled_method)
339 , _profiled_bci(profiled_bci) {
340 if (code == lir_checkcast) {
341 assert(info_for_exception != NULL, "checkcast throws exceptions");
342 } else if (code == lir_instanceof) {
343 assert(info_for_exception == NULL, "instanceof throws no exceptions");
344 } else {
345 ShouldNotReachHere();
346 }
347 }
348
349
350
351 LIR_OpTypeCheck::LIR_OpTypeCheck(LIR_Code code, LIR_Opr object, LIR_Opr array, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, CodeEmitInfo* info_for_exception, ciMethod* profiled_method, int profiled_bci)
352 : LIR_Op(code, LIR_OprFact::illegalOpr, NULL)
353 , _object(object)
354 , _array(array)
355 , _klass(NULL)
356 , _tmp1(tmp1)
357 , _tmp2(tmp2)
358 , _tmp3(tmp3)
359 , _fast_check(false)
360 , _stub(NULL)
361 , _info_for_patch(NULL)
362 , _info_for_exception(info_for_exception)
363 , _profiled_method(profiled_method)
364 , _profiled_bci(profiled_bci) {
365 if (code == lir_store_check) {
366 _stub = new ArrayStoreExceptionStub(info_for_exception);
367 assert(info_for_exception != NULL, "store_check throws exceptions");
368 } else {
369 ShouldNotReachHere();
370 }
371 }
372
373
374 LIR_OpArrayCopy::LIR_OpArrayCopy(LIR_Opr src, LIR_Opr src_pos, LIR_Opr dst, LIR_Opr dst_pos, LIR_Opr length,
375 LIR_Opr tmp, ciArrayKlass* expected_type, int flags, CodeEmitInfo* info)
376 : LIR_Op(lir_arraycopy, LIR_OprFact::illegalOpr, info)
377 , _tmp(tmp)
378 , _src(src)
379 , _src_pos(src_pos)
380 , _dst(dst)
381 , _dst_pos(dst_pos)
382 , _flags(flags)
383 , _expected_type(expected_type)
384 , _length(length) {
385 _stub = new ArrayCopyStub(this);
386 }
387
388
389 //-------------------verify--------------------------
390
391 void LIR_Op1::verify() const {
392 switch(code()) {
393 case lir_move:
394 assert(in_opr()->is_valid() && result_opr()->is_valid(), "must be");
395 break;
396 case lir_null_check:
397 assert(in_opr()->is_register(), "must be");
398 break;
399 case lir_return:
400 assert(in_opr()->is_register() || in_opr()->is_illegal(), "must be");
401 break;
402 }
403 }
404
405 void LIR_OpRTCall::verify() const {
406 assert(strcmp(Runtime1::name_for_address(addr()), "<unknown function>") != 0, "unknown function");
407 }
408
409 //-------------------visits--------------------------
410
411 // complete rework of LIR instruction visitor.
412 // The virtual calls for each instruction type is replaced by a big
413 // switch that adds the operands for each instruction
414
415 void LIR_OpVisitState::visit(LIR_Op* op) {
416 // copy information from the LIR_Op
417 reset();
418 set_op(op);
419
420 switch (op->code()) {
421
422 // LIR_Op0
423 case lir_word_align: // result and info always invalid
424 case lir_backwardbranch_target: // result and info always invalid
425 case lir_build_frame: // result and info always invalid
426 case lir_fpop_raw: // result and info always invalid
427 case lir_24bit_FPU: // result and info always invalid
428 case lir_reset_FPU: // result and info always invalid
429 case lir_breakpoint: // result and info always invalid
430 case lir_membar: // result and info always invalid
431 case lir_membar_acquire: // result and info always invalid
432 case lir_membar_release: // result and info always invalid
433 {
434 assert(op->as_Op0() != NULL, "must be");
435 assert(op->_info == NULL, "info not used by this instruction");
436 assert(op->_result->is_illegal(), "not used");
437 break;
438 }
439
440 case lir_nop: // may have info, result always invalid
441 case lir_std_entry: // may have result, info always invalid
442 case lir_osr_entry: // may have result, info always invalid
443 case lir_get_thread: // may have result, info always invalid
444 {
445 assert(op->as_Op0() != NULL, "must be");
446 if (op->_info != NULL) do_info(op->_info);
447 if (op->_result->is_valid()) do_output(op->_result);
448 break;
449 }
450
451
452 // LIR_OpLabel
453 case lir_label: // result and info always invalid
454 {
455 assert(op->as_OpLabel() != NULL, "must be");
456 assert(op->_info == NULL, "info not used by this instruction");
457 assert(op->_result->is_illegal(), "not used");
458 break;
459 }
460
461
462 // LIR_Op1
463 case lir_fxch: // input always valid, result and info always invalid
464 case lir_fld: // input always valid, result and info always invalid
465 case lir_ffree: // input always valid, result and info always invalid
466 case lir_push: // input always valid, result and info always invalid
467 case lir_pop: // input always valid, result and info always invalid
468 case lir_return: // input always valid, result and info always invalid
469 case lir_leal: // input and result always valid, info always invalid
470 case lir_neg: // input and result always valid, info always invalid
471 case lir_monaddr: // input and result always valid, info always invalid
472 case lir_null_check: // input and info always valid, result always invalid
473 case lir_move: // input and result always valid, may have info
474 case lir_prefetchr: // input always valid, result and info always invalid
475 case lir_prefetchw: // input always valid, result and info always invalid
476 {
477 assert(op->as_Op1() != NULL, "must be");
478 LIR_Op1* op1 = (LIR_Op1*)op;
479
480 if (op1->_info) do_info(op1->_info);
481 if (op1->_opr->is_valid()) do_input(op1->_opr);
482 if (op1->_result->is_valid()) do_output(op1->_result);
483
484 break;
485 }
486
487 case lir_safepoint:
488 {
489 assert(op->as_Op1() != NULL, "must be");
490 LIR_Op1* op1 = (LIR_Op1*)op;
491
492 assert(op1->_info != NULL, ""); do_info(op1->_info);
493 if (op1->_opr->is_valid()) do_temp(op1->_opr); // safepoints on SPARC need temporary register
494 assert(op1->_result->is_illegal(), "safepoint does not produce value");
495
496 break;
497 }
498
499 // LIR_OpConvert;
500 case lir_convert: // input and result always valid, info always invalid
501 {
502 assert(op->as_OpConvert() != NULL, "must be");
503 LIR_OpConvert* opConvert = (LIR_OpConvert*)op;
504
505 assert(opConvert->_info == NULL, "must be");
506 if (opConvert->_opr->is_valid()) do_input(opConvert->_opr);
507 if (opConvert->_result->is_valid()) do_output(opConvert->_result);
508 do_stub(opConvert->_stub);
509
510 break;
511 }
512
513 // LIR_OpBranch;
514 case lir_branch: // may have info, input and result register always invalid
515 case lir_cond_float_branch: // may have info, input and result register always invalid
516 {
517 assert(op->as_OpBranch() != NULL, "must be");
518 LIR_OpBranch* opBranch = (LIR_OpBranch*)op;
519
520 if (opBranch->_info != NULL) do_info(opBranch->_info);
521 assert(opBranch->_result->is_illegal(), "not used");
522 if (opBranch->_stub != NULL) opBranch->stub()->visit(this);
523
524 break;
525 }
526
527
528 // LIR_OpAllocObj
529 case lir_alloc_object:
530 {
531 assert(op->as_OpAllocObj() != NULL, "must be");
532 LIR_OpAllocObj* opAllocObj = (LIR_OpAllocObj*)op;
533
534 if (opAllocObj->_info) do_info(opAllocObj->_info);
535 if (opAllocObj->_opr->is_valid()) do_input(opAllocObj->_opr);
536 if (opAllocObj->_tmp1->is_valid()) do_temp(opAllocObj->_tmp1);
537 if (opAllocObj->_tmp2->is_valid()) do_temp(opAllocObj->_tmp2);
538 if (opAllocObj->_tmp3->is_valid()) do_temp(opAllocObj->_tmp3);
539 if (opAllocObj->_tmp4->is_valid()) do_temp(opAllocObj->_tmp4);
540 if (opAllocObj->_result->is_valid()) do_output(opAllocObj->_result);
541 do_stub(opAllocObj->_stub);
542 break;
543 }
544
545
546 // LIR_OpRoundFP;
547 case lir_roundfp: {
548 assert(op->as_OpRoundFP() != NULL, "must be");
549 LIR_OpRoundFP* opRoundFP = (LIR_OpRoundFP*)op;
550
551 assert(op->_info == NULL, "info not used by this instruction");
552 assert(opRoundFP->_tmp->is_illegal(), "not used");
553 do_input(opRoundFP->_opr);
554 do_output(opRoundFP->_result);
555
556 break;
557 }
558
559
560 // LIR_Op2
561 case lir_cmp:
562 case lir_cmp_l2i:
563 case lir_ucmp_fd2i:
564 case lir_cmp_fd2i:
565 case lir_add:
566 case lir_sub:
567 case lir_mul:
568 case lir_div:
569 case lir_rem:
570 case lir_sqrt:
571 case lir_abs:
572 case lir_log:
573 case lir_log10:
574 case lir_logic_and:
575 case lir_logic_or:
576 case lir_logic_xor:
577 case lir_shl:
578 case lir_shr:
579 case lir_ushr:
580 {
581 assert(op->as_Op2() != NULL, "must be");
582 LIR_Op2* op2 = (LIR_Op2*)op;
583
584 if (op2->_info) do_info(op2->_info);
585 if (op2->_opr1->is_valid()) do_input(op2->_opr1);
586 if (op2->_opr2->is_valid()) do_input(op2->_opr2);
587 if (op2->_tmp->is_valid()) do_temp(op2->_tmp);
588 if (op2->_result->is_valid()) do_output(op2->_result);
589
590 break;
591 }
592
593 // special handling for cmove: right input operand must not be equal
594 // to the result operand, otherwise the backend fails
595 case lir_cmove:
596 {
597 assert(op->as_Op2() != NULL, "must be");
598 LIR_Op2* op2 = (LIR_Op2*)op;
599
600 assert(op2->_info == NULL && op2->_tmp->is_illegal(), "not used");
601 assert(op2->_opr1->is_valid() && op2->_opr2->is_valid() && op2->_result->is_valid(), "used");
602
603 do_input(op2->_opr1);
604 do_input(op2->_opr2);
605 do_temp(op2->_opr2);
606 do_output(op2->_result);
607
608 break;
609 }
610
611 // vspecial handling for strict operations: register input operands
612 // as temp to guarantee that they do not overlap with other
613 // registers
614 case lir_mul_strictfp:
615 case lir_div_strictfp:
616 {
617 assert(op->as_Op2() != NULL, "must be");
618 LIR_Op2* op2 = (LIR_Op2*)op;
619
620 assert(op2->_info == NULL, "not used");
621 assert(op2->_opr1->is_valid(), "used");
622 assert(op2->_opr2->is_valid(), "used");
623 assert(op2->_result->is_valid(), "used");
624
625 do_input(op2->_opr1); do_temp(op2->_opr1);
626 do_input(op2->_opr2); do_temp(op2->_opr2);
627 if (op2->_tmp->is_valid()) do_temp(op2->_tmp);
628 do_output(op2->_result);
629
630 break;
631 }
632
633 case lir_throw:
634 case lir_unwind: {
635 assert(op->as_Op2() != NULL, "must be");
636 LIR_Op2* op2 = (LIR_Op2*)op;
637
638 if (op2->_info) do_info(op2->_info);
639 if (op2->_opr1->is_valid()) do_temp(op2->_opr1);
640 if (op2->_opr2->is_valid()) do_input(op2->_opr2); // exception object is input parameter
641 assert(op2->_result->is_illegal(), "no result");
642
643 break;
644 }
645
646
647 case lir_tan:
648 case lir_sin:
649 case lir_cos: {
650 assert(op->as_Op2() != NULL, "must be");
651 LIR_Op2* op2 = (LIR_Op2*)op;
652
653 // sin and cos need two temporary fpu stack slots, so register
654 // two temp operands. Register input operand as temp to
655 // guarantee that they do not overlap
656 assert(op2->_info == NULL, "not used");
657 assert(op2->_opr1->is_valid(), "used");
658 do_input(op2->_opr1); do_temp(op2->_opr1);
659
660 if (op2->_opr2->is_valid()) do_temp(op2->_opr2);
661 if (op2->_tmp->is_valid()) do_temp(op2->_tmp);
662 if (op2->_result->is_valid()) do_output(op2->_result);
663
664 break;
665 }
666
667
668 // LIR_Op3
669 case lir_idiv:
670 case lir_irem: {
671 assert(op->as_Op3() != NULL, "must be");
672 LIR_Op3* op3= (LIR_Op3*)op;
673
674 if (op3->_info) do_info(op3->_info);
675 if (op3->_opr1->is_valid()) do_input(op3->_opr1);
676
677 // second operand is input and temp, so ensure that second operand
678 // and third operand get not the same register
679 if (op3->_opr2->is_valid()) do_input(op3->_opr2);
680 if (op3->_opr2->is_valid()) do_temp(op3->_opr2);
681 if (op3->_opr3->is_valid()) do_temp(op3->_opr3);
682
683 if (op3->_result->is_valid()) do_output(op3->_result);
684
685 break;
686 }
687
688
689 // LIR_OpJavaCall
690 case lir_static_call:
691 case lir_optvirtual_call:
692 case lir_icvirtual_call:
693 case lir_virtual_call: {
694 assert(op->as_OpJavaCall() != NULL, "must be");
695 LIR_OpJavaCall* opJavaCall = (LIR_OpJavaCall*)op;
696
697 if (opJavaCall->_receiver->is_valid()) do_input(opJavaCall->_receiver);
698
699 // only visit register parameters
700 int n = opJavaCall->_arguments->length();
701 for (int i = 0; i < n; i++) {
702 if (!opJavaCall->_arguments->at(i)->is_pointer()) {
703 do_input(*opJavaCall->_arguments->adr_at(i));
704 }
705 }
706
707 if (opJavaCall->_info) do_info(opJavaCall->_info);
708 do_call();
709 if (opJavaCall->_result->is_valid()) do_output(opJavaCall->_result);
710
711 break;
712 }
713
714
715 // LIR_OpRTCall
716 case lir_rtcall: {
717 assert(op->as_OpRTCall() != NULL, "must be");
718 LIR_OpRTCall* opRTCall = (LIR_OpRTCall*)op;
719
720 // only visit register parameters
721 int n = opRTCall->_arguments->length();
722 for (int i = 0; i < n; i++) {
723 if (!opRTCall->_arguments->at(i)->is_pointer()) {
724 do_input(*opRTCall->_arguments->adr_at(i));
725 }
726 }
727 if (opRTCall->_info) do_info(opRTCall->_info);
728 if (opRTCall->_tmp->is_valid()) do_temp(opRTCall->_tmp);
729 do_call();
730 if (opRTCall->_result->is_valid()) do_output(opRTCall->_result);
731
732 break;
733 }
734
735
736 // LIR_OpArrayCopy
737 case lir_arraycopy: {
738 assert(op->as_OpArrayCopy() != NULL, "must be");
739 LIR_OpArrayCopy* opArrayCopy = (LIR_OpArrayCopy*)op;
740
741 assert(opArrayCopy->_result->is_illegal(), "unused");
742 assert(opArrayCopy->_src->is_valid(), "used"); do_input(opArrayCopy->_src); do_temp(opArrayCopy->_src);
743 assert(opArrayCopy->_src_pos->is_valid(), "used"); do_input(opArrayCopy->_src_pos); do_temp(opArrayCopy->_src_pos);
744 assert(opArrayCopy->_dst->is_valid(), "used"); do_input(opArrayCopy->_dst); do_temp(opArrayCopy->_dst);
745 assert(opArrayCopy->_dst_pos->is_valid(), "used"); do_input(opArrayCopy->_dst_pos); do_temp(opArrayCopy->_dst_pos);
746 assert(opArrayCopy->_length->is_valid(), "used"); do_input(opArrayCopy->_length); do_temp(opArrayCopy->_length);
747 assert(opArrayCopy->_tmp->is_valid(), "used"); do_temp(opArrayCopy->_tmp);
748 if (opArrayCopy->_info) do_info(opArrayCopy->_info);
749
750 // the implementation of arraycopy always has a call into the runtime
751 do_call();
752
753 break;
754 }
755
756
757 // LIR_OpLock
758 case lir_lock:
759 case lir_unlock: {
760 assert(op->as_OpLock() != NULL, "must be");
761 LIR_OpLock* opLock = (LIR_OpLock*)op;
762
763 if (opLock->_info) do_info(opLock->_info);
764
765 // TODO: check if these operands really have to be temp
766 // (or if input is sufficient). This may have influence on the oop map!
767 assert(opLock->_lock->is_valid(), "used"); do_temp(opLock->_lock);
768 assert(opLock->_hdr->is_valid(), "used"); do_temp(opLock->_hdr);
769 assert(opLock->_obj->is_valid(), "used"); do_temp(opLock->_obj);
770
771 if (opLock->_scratch->is_valid()) do_temp(opLock->_scratch);
772 assert(opLock->_result->is_illegal(), "unused");
773
774 do_stub(opLock->_stub);
775
776 break;
777 }
778
779
780 // LIR_OpDelay
781 case lir_delay_slot: {
782 assert(op->as_OpDelay() != NULL, "must be");
783 LIR_OpDelay* opDelay = (LIR_OpDelay*)op;
784
785 visit(opDelay->delay_op());
786 break;
787 }
788
789 // LIR_OpTypeCheck
790 case lir_instanceof:
791 case lir_checkcast:
792 case lir_store_check: {
793 assert(op->as_OpTypeCheck() != NULL, "must be");
794 LIR_OpTypeCheck* opTypeCheck = (LIR_OpTypeCheck*)op;
795
796 if (opTypeCheck->_info_for_exception) do_info(opTypeCheck->_info_for_exception);
797 if (opTypeCheck->_info_for_patch) do_info(opTypeCheck->_info_for_patch);
798 if (opTypeCheck->_object->is_valid()) do_input(opTypeCheck->_object);
799 if (opTypeCheck->_array->is_valid()) do_input(opTypeCheck->_array);
800 if (opTypeCheck->_tmp1->is_valid()) do_temp(opTypeCheck->_tmp1);
801 if (opTypeCheck->_tmp2->is_valid()) do_temp(opTypeCheck->_tmp2);
802 if (opTypeCheck->_tmp3->is_valid()) do_temp(opTypeCheck->_tmp3);
803 if (opTypeCheck->_result->is_valid()) do_output(opTypeCheck->_result);
804 do_stub(opTypeCheck->_stub);
805 break;
806 }
807
808 // LIR_OpCompareAndSwap
809 case lir_cas_long:
810 case lir_cas_obj:
811 case lir_cas_int: {
812 assert(op->as_OpCompareAndSwap() != NULL, "must be");
813 LIR_OpCompareAndSwap* opCompareAndSwap = (LIR_OpCompareAndSwap*)op;
814
815 if (opCompareAndSwap->_info) do_info(opCompareAndSwap->_info);
816 if (opCompareAndSwap->_addr->is_valid()) do_input(opCompareAndSwap->_addr);
817 if (opCompareAndSwap->_cmp_value->is_valid()) do_input(opCompareAndSwap->_cmp_value);
818 if (opCompareAndSwap->_new_value->is_valid()) do_input(opCompareAndSwap->_new_value);
819 if (opCompareAndSwap->_tmp1->is_valid()) do_temp(opCompareAndSwap->_tmp1);
820 if (opCompareAndSwap->_tmp2->is_valid()) do_temp(opCompareAndSwap->_tmp2);
821 if (opCompareAndSwap->_result->is_valid()) do_output(opCompareAndSwap->_result);
822
823 break;
824 }
825
826
827 // LIR_OpAllocArray;
828 case lir_alloc_array: {
829 assert(op->as_OpAllocArray() != NULL, "must be");
830 LIR_OpAllocArray* opAllocArray = (LIR_OpAllocArray*)op;
831
832 if (opAllocArray->_info) do_info(opAllocArray->_info);
833 if (opAllocArray->_klass->is_valid()) do_input(opAllocArray->_klass); do_temp(opAllocArray->_klass);
834 if (opAllocArray->_len->is_valid()) do_input(opAllocArray->_len); do_temp(opAllocArray->_len);
835 if (opAllocArray->_tmp1->is_valid()) do_temp(opAllocArray->_tmp1);
836 if (opAllocArray->_tmp2->is_valid()) do_temp(opAllocArray->_tmp2);
837 if (opAllocArray->_tmp3->is_valid()) do_temp(opAllocArray->_tmp3);
838 if (opAllocArray->_tmp4->is_valid()) do_temp(opAllocArray->_tmp4);
839 if (opAllocArray->_result->is_valid()) do_output(opAllocArray->_result);
840 do_stub(opAllocArray->_stub);
841 break;
842 }
843
844 // LIR_OpProfileCall:
845 case lir_profile_call: {
846 assert(op->as_OpProfileCall() != NULL, "must be");
847 LIR_OpProfileCall* opProfileCall = (LIR_OpProfileCall*)op;
848
849 if (opProfileCall->_recv->is_valid()) do_temp(opProfileCall->_recv);
850 assert(opProfileCall->_mdo->is_valid(), "used"); do_temp(opProfileCall->_mdo);
851 assert(opProfileCall->_tmp1->is_valid(), "used"); do_temp(opProfileCall->_tmp1);
852 break;
853 }
854
855 default:
856 ShouldNotReachHere();
857 }
858 }
859
860
861 void LIR_OpVisitState::do_stub(CodeStub* stub) {
862 if (stub != NULL) {
863 stub->visit(this);
864 }
865 }
866
867 XHandlers* LIR_OpVisitState::all_xhandler() {
868 XHandlers* result = NULL;
869
870 int i;
871 for (i = 0; i < info_count(); i++) {
872 if (info_at(i)->exception_handlers() != NULL) {
873 result = info_at(i)->exception_handlers();
874 break;
875 }
876 }
877
878 #ifdef ASSERT
879 for (i = 0; i < info_count(); i++) {
880 assert(info_at(i)->exception_handlers() == NULL ||
881 info_at(i)->exception_handlers() == result,
882 "only one xhandler list allowed per LIR-operation");
883 }
884 #endif
885
886 if (result != NULL) {
887 return result;
888 } else {
889 return new XHandlers();
890 }
891
892 return result;
893 }
894
895
896 #ifdef ASSERT
897 bool LIR_OpVisitState::no_operands(LIR_Op* op) {
898 visit(op);
899
900 return opr_count(inputMode) == 0 &&
901 opr_count(outputMode) == 0 &&
902 opr_count(tempMode) == 0 &&
903 info_count() == 0 &&
904 !has_call() &&
905 !has_slow_case();
906 }
907 #endif
908
909 //---------------------------------------------------
910
911
912 void LIR_OpJavaCall::emit_code(LIR_Assembler* masm) {
913 masm->emit_call(this);
914 }
915
916 void LIR_OpRTCall::emit_code(LIR_Assembler* masm) {
917 masm->emit_rtcall(this);
918 }
919
920 void LIR_OpLabel::emit_code(LIR_Assembler* masm) {
921 masm->emit_opLabel(this);
922 }
923
924 void LIR_OpArrayCopy::emit_code(LIR_Assembler* masm) {
925 masm->emit_arraycopy(this);
926 masm->emit_code_stub(stub());
927 }
928
929 void LIR_Op0::emit_code(LIR_Assembler* masm) {
930 masm->emit_op0(this);
931 }
932
933 void LIR_Op1::emit_code(LIR_Assembler* masm) {
934 masm->emit_op1(this);
935 }
936
937 void LIR_OpAllocObj::emit_code(LIR_Assembler* masm) {
938 masm->emit_alloc_obj(this);
939 masm->emit_code_stub(stub());
940 }
941
942 void LIR_OpBranch::emit_code(LIR_Assembler* masm) {
943 masm->emit_opBranch(this);
944 if (stub()) {
945 masm->emit_code_stub(stub());
946 }
947 }
948
949 void LIR_OpConvert::emit_code(LIR_Assembler* masm) {
950 masm->emit_opConvert(this);
951 if (stub() != NULL) {
952 masm->emit_code_stub(stub());
953 }
954 }
955
956 void LIR_Op2::emit_code(LIR_Assembler* masm) {
957 masm->emit_op2(this);
958 }
959
960 void LIR_OpAllocArray::emit_code(LIR_Assembler* masm) {
961 masm->emit_alloc_array(this);
962 masm->emit_code_stub(stub());
963 }
964
965 void LIR_OpTypeCheck::emit_code(LIR_Assembler* masm) {
966 masm->emit_opTypeCheck(this);
967 if (stub()) {
968 masm->emit_code_stub(stub());
969 }
970 }
971
972 void LIR_OpCompareAndSwap::emit_code(LIR_Assembler* masm) {
973 masm->emit_compare_and_swap(this);
974 }
975
976 void LIR_Op3::emit_code(LIR_Assembler* masm) {
977 masm->emit_op3(this);
978 }
979
980 void LIR_OpLock::emit_code(LIR_Assembler* masm) {
981 masm->emit_lock(this);
982 if (stub()) {
983 masm->emit_code_stub(stub());
984 }
985 }
986
987
988 void LIR_OpDelay::emit_code(LIR_Assembler* masm) {
989 masm->emit_delay(this);
990 }
991
992
993 void LIR_OpProfileCall::emit_code(LIR_Assembler* masm) {
994 masm->emit_profile_call(this);
995 }
996
997
998 // LIR_List
999 LIR_List::LIR_List(Compilation* compilation, BlockBegin* block)
1000 : _operations(8)
1001 , _compilation(compilation)
1002 #ifndef PRODUCT
1003 , _block(block)
1004 #endif
1005 #ifdef ASSERT
1006 , _file(NULL)
1007 , _line(0)
1008 #endif
1009 { }
1010
1011
1012 #ifdef ASSERT
1013 void LIR_List::set_file_and_line(const char * file, int line) {
1014 const char * f = strrchr(file, '/');
1015 if (f == NULL) f = strrchr(file, '\\');
1016 if (f == NULL) {
1017 f = file;
1018 } else {
1019 f++;
1020 }
1021 _file = f;
1022 _line = line;
1023 }
1024 #endif
1025
1026
1027 void LIR_List::append(LIR_InsertionBuffer* buffer) {
1028 assert(this == buffer->lir_list(), "wrong lir list");
1029 const int n = _operations.length();
1030
1031 if (buffer->number_of_ops() > 0) {
1032 // increase size of instructions list
1033 _operations.at_grow(n + buffer->number_of_ops() - 1, NULL);
1034 // insert ops from buffer into instructions list
1035 int op_index = buffer->number_of_ops() - 1;
1036 int ip_index = buffer->number_of_insertion_points() - 1;
1037 int from_index = n - 1;
1038 int to_index = _operations.length() - 1;
1039 for (; ip_index >= 0; ip_index --) {
1040 int index = buffer->index_at(ip_index);
1041 // make room after insertion point
1042 while (index < from_index) {
1043 _operations.at_put(to_index --, _operations.at(from_index --));
1044 }
1045 // insert ops from buffer
1046 for (int i = buffer->count_at(ip_index); i > 0; i --) {
1047 _operations.at_put(to_index --, buffer->op_at(op_index --));
1048 }
1049 }
1050 }
1051
1052 buffer->finish();
1053 }
1054
1055
1056 void LIR_List::oop2reg_patch(jobject o, LIR_Opr reg, CodeEmitInfo* info) {
1057 append(new LIR_Op1(lir_move, LIR_OprFact::oopConst(o), reg, T_OBJECT, lir_patch_normal, info));
1058 }
1059
1060
1061 void LIR_List::load(LIR_Address* addr, LIR_Opr src, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1062 append(new LIR_Op1(
1063 lir_move,
1064 LIR_OprFact::address(addr),
1065 src,
1066 addr->type(),
1067 patch_code,
1068 info));
1069 }
1070
1071
1072 void LIR_List::volatile_load_mem_reg(LIR_Address* address, LIR_Opr dst, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1073 append(new LIR_Op1(
1074 lir_move,
1075 LIR_OprFact::address(address),
1076 dst,
1077 address->type(),
1078 patch_code,
1079 info, lir_move_volatile));
1080 }
1081
1082 void LIR_List::volatile_load_unsafe_reg(LIR_Opr base, LIR_Opr offset, LIR_Opr dst, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1083 append(new LIR_Op1(
1084 lir_move,
1085 LIR_OprFact::address(new LIR_Address(base, offset, type)),
1086 dst,
1087 type,
1088 patch_code,
1089 info, lir_move_volatile));
1090 }
1091
1092
1093 void LIR_List::prefetch(LIR_Address* addr, bool is_store) {
1094 append(new LIR_Op1(
1095 is_store ? lir_prefetchw : lir_prefetchr,
1096 LIR_OprFact::address(addr)));
1097 }
1098
1099
1100 void LIR_List::store_mem_int(jint v, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1101 append(new LIR_Op1(
1102 lir_move,
1103 LIR_OprFact::intConst(v),
1104 LIR_OprFact::address(new LIR_Address(base, offset_in_bytes, type)),
1105 type,
1106 patch_code,
1107 info));
1108 }
1109
1110
1111 void LIR_List::store_mem_oop(jobject o, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1112 append(new LIR_Op1(
1113 lir_move,
1114 LIR_OprFact::oopConst(o),
1115 LIR_OprFact::address(new LIR_Address(base, offset_in_bytes, type)),
1116 type,
1117 patch_code,
1118 info));
1119 }
1120
1121
1122 void LIR_List::store(LIR_Opr src, LIR_Address* addr, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1123 append(new LIR_Op1(
1124 lir_move,
1125 src,
1126 LIR_OprFact::address(addr),
1127 addr->type(),
1128 patch_code,
1129 info));
1130 }
1131
1132
1133 void LIR_List::volatile_store_mem_reg(LIR_Opr src, LIR_Address* addr, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1134 append(new LIR_Op1(
1135 lir_move,
1136 src,
1137 LIR_OprFact::address(addr),
1138 addr->type(),
1139 patch_code,
1140 info,
1141 lir_move_volatile));
1142 }
1143
1144 void LIR_List::volatile_store_unsafe_reg(LIR_Opr src, LIR_Opr base, LIR_Opr offset, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1145 append(new LIR_Op1(
1146 lir_move,
1147 src,
1148 LIR_OprFact::address(new LIR_Address(base, offset, type)),
1149 type,
1150 patch_code,
1151 info, lir_move_volatile));
1152 }
1153
1154
1155 void LIR_List::idiv(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) {
1156 append(new LIR_Op3(
1157 lir_idiv,
1158 left,
1159 right,
1160 tmp,
1161 res,
1162 info));
1163 }
1164
1165
1166 void LIR_List::idiv(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) {
1167 append(new LIR_Op3(
1168 lir_idiv,
1169 left,
1170 LIR_OprFact::intConst(right),
1171 tmp,
1172 res,
1173 info));
1174 }
1175
1176
1177 void LIR_List::irem(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) {
1178 append(new LIR_Op3(
1179 lir_irem,
1180 left,
1181 right,
1182 tmp,
1183 res,
1184 info));
1185 }
1186
1187
1188 void LIR_List::irem(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) {
1189 append(new LIR_Op3(
1190 lir_irem,
1191 left,
1192 LIR_OprFact::intConst(right),
1193 tmp,
1194 res,
1195 info));
1196 }
1197
1198
1199 void LIR_List::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) {
1200 append(new LIR_Op2(
1201 lir_cmp,
1202 condition,
1203 LIR_OprFact::address(new LIR_Address(base, disp, T_INT)),
1204 LIR_OprFact::intConst(c),
1205 info));
1206 }
1207
1208
1209 void LIR_List::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Address* addr, CodeEmitInfo* info) {
1210 append(new LIR_Op2(
1211 lir_cmp,
1212 condition,
1213 reg,
1214 LIR_OprFact::address(addr),
1215 info));
1216 }
1217
1218 void LIR_List::allocate_object(LIR_Opr dst, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4,
1219 int header_size, int object_size, LIR_Opr klass, bool init_check, CodeStub* stub) {
1220 append(new LIR_OpAllocObj(
1221 klass,
1222 dst,
1223 t1,
1224 t2,
1225 t3,
1226 t4,
1227 header_size,
1228 object_size,
1229 init_check,
1230 stub));
1231 }
1232
1233 void LIR_List::allocate_array(LIR_Opr dst, LIR_Opr len, LIR_Opr t1,LIR_Opr t2, LIR_Opr t3,LIR_Opr t4, BasicType type, LIR_Opr klass, CodeStub* stub) {
1234 append(new LIR_OpAllocArray(
1235 klass,
1236 len,
1237 dst,
1238 t1,
1239 t2,
1240 t3,
1241 t4,
1242 type,
1243 stub));
1244 }
1245
1246 void LIR_List::shift_left(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) {
1247 append(new LIR_Op2(
1248 lir_shl,
1249 value,
1250 count,
1251 dst,
1252 tmp));
1253 }
1254
1255 void LIR_List::shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) {
1256 append(new LIR_Op2(
1257 lir_shr,
1258 value,
1259 count,
1260 dst,
1261 tmp));
1262 }
1263
1264
1265 void LIR_List::unsigned_shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) {
1266 append(new LIR_Op2(
1267 lir_ushr,
1268 value,
1269 count,
1270 dst,
1271 tmp));
1272 }
1273
1274 void LIR_List::fcmp2int(LIR_Opr left, LIR_Opr right, LIR_Opr dst, bool is_unordered_less) {
1275 append(new LIR_Op2(is_unordered_less ? lir_ucmp_fd2i : lir_cmp_fd2i,
1276 left,
1277 right,
1278 dst));
1279 }
1280
1281 void LIR_List::lock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub, CodeEmitInfo* info) {
1282 append(new LIR_OpLock(
1283 lir_lock,
1284 hdr,
1285 obj,
1286 lock,
1287 scratch,
1288 stub,
1289 info));
1290 }
1291
1292 void LIR_List::unlock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, CodeStub* stub) {
1293 append(new LIR_OpLock(
1294 lir_unlock,
1295 hdr,
1296 obj,
1297 lock,
1298 LIR_OprFact::illegalOpr,
1299 stub,
1300 NULL));
1301 }
1302
1303
1304 void check_LIR() {
1305 // cannot do the proper checking as PRODUCT and other modes return different results
1306 // guarantee(sizeof(LIR_OprDesc) == wordSize, "may not have a v-table");
1307 }
1308
1309
1310
1311 void LIR_List::checkcast (LIR_Opr result, LIR_Opr object, ciKlass* klass,
1312 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check,
1313 CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, CodeStub* stub,
1314 ciMethod* profiled_method, int profiled_bci) {
1315 append(new LIR_OpTypeCheck(lir_checkcast, result, object, klass,
1316 tmp1, tmp2, tmp3, fast_check, info_for_exception, info_for_patch, stub,
1317 profiled_method, profiled_bci));
1318 }
1319
1320
1321 void LIR_List::instanceof(LIR_Opr result, LIR_Opr object, ciKlass* klass, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check, CodeEmitInfo* info_for_patch) {
1322 append(new LIR_OpTypeCheck(lir_instanceof, result, object, klass, tmp1, tmp2, tmp3, fast_check, NULL, info_for_patch, NULL, NULL, 0));
1323 }
1324
1325
1326 void LIR_List::store_check(LIR_Opr object, LIR_Opr array, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, CodeEmitInfo* info_for_exception) {
1327 append(new LIR_OpTypeCheck(lir_store_check, object, array, tmp1, tmp2, tmp3, info_for_exception, NULL, 0));
1328 }
1329
1330
1331 void LIR_List::cas_long(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, LIR_Opr t1, LIR_Opr t2) {
1332 // Compare and swap produces condition code "zero" if contents_of(addr) == cmp_value,
1333 // implying successful swap of new_value into addr
1334 append(new LIR_OpCompareAndSwap(lir_cas_long, addr, cmp_value, new_value, t1, t2));
1335 }
1336
1337 void LIR_List::cas_obj(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, LIR_Opr t1, LIR_Opr t2) {
1338 // Compare and swap produces condition code "zero" if contents_of(addr) == cmp_value,
1339 // implying successful swap of new_value into addr
1340 append(new LIR_OpCompareAndSwap(lir_cas_obj, addr, cmp_value, new_value, t1, t2));
1341 }
1342
1343 void LIR_List::cas_int(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, LIR_Opr t1, LIR_Opr t2) {
1344 // Compare and swap produces condition code "zero" if contents_of(addr) == cmp_value,
1345 // implying successful swap of new_value into addr
1346 append(new LIR_OpCompareAndSwap(lir_cas_int, addr, cmp_value, new_value, t1, t2));
1347 }
1348
1349
1350 #ifdef PRODUCT
1351
1352 void print_LIR(BlockList* blocks) {
1353 }
1354
1355 #else
1356 // LIR_OprDesc
1357 void LIR_OprDesc::print() const {
1358 print(tty);
1359 }
1360
1361 void LIR_OprDesc::print(outputStream* out) const {
1362 if (is_illegal()) {
1363 return;
1364 }
1365
1366 out->print("[");
1367 if (is_pointer()) {
1368 pointer()->print_value_on(out);
1369 } else if (is_single_stack()) {
1370 out->print("stack:%d", single_stack_ix());
1371 } else if (is_double_stack()) {
1372 out->print("dbl_stack:%d",double_stack_ix());
1373 } else if (is_virtual()) {
1374 out->print("R%d", vreg_number());
1375 } else if (is_single_cpu()) {
1376 out->print(as_register()->name());
1377 } else if (is_double_cpu()) {
1378 out->print(as_register_hi()->name());
1379 out->print(as_register_lo()->name());
1380 #ifdef IA32
1381 } else if (is_single_xmm()) {
1382 out->print(as_xmm_float_reg()->name());
1383 } else if (is_double_xmm()) {
1384 out->print(as_xmm_double_reg()->name());
1385 } else if (is_single_fpu()) {
1386 out->print("fpu%d", fpu_regnr());
1387 } else if (is_double_fpu()) {
1388 out->print("fpu%d", fpu_regnrLo());
1389 #else
1390 } else if (is_single_fpu()) {
1391 out->print(as_float_reg()->name());
1392 } else if (is_double_fpu()) {
1393 out->print(as_double_reg()->name());
1394 #endif
1395
1396 } else if (is_illegal()) {
1397 out->print("-");
1398 } else {
1399 out->print("Unknown Operand");
1400 }
1401 if (!is_illegal()) {
1402 out->print("|%c", type_char());
1403 }
1404 if (is_register() && is_last_use()) {
1405 out->print("(last_use)");
1406 }
1407 out->print("]");
1408 }
1409
1410
1411 // LIR_Address
1412 void LIR_Const::print_value_on(outputStream* out) const {
1413 switch (type()) {
1414 case T_INT: out->print("int:%d", as_jint()); break;
1415 case T_LONG: out->print("lng:%lld", as_jlong()); break;
1416 case T_FLOAT: out->print("flt:%f", as_jfloat()); break;
1417 case T_DOUBLE: out->print("dbl:%f", as_jdouble()); break;
1418 case T_OBJECT: out->print("obj:0x%x", as_jobject()); break;
1419 default: out->print("%3d:0x%x",type(), as_jdouble()); break;
1420 }
1421 }
1422
1423 // LIR_Address
1424 void LIR_Address::print_value_on(outputStream* out) const {
1425 out->print("Base:"); _base->print(out);
1426 if (!_index->is_illegal()) {
1427 out->print(" Index:"); _index->print(out);
1428 switch (scale()) {
1429 case times_1: break;
1430 case times_2: out->print(" * 2"); break;
1431 case times_4: out->print(" * 4"); break;
1432 case times_8: out->print(" * 8"); break;
1433 }
1434 }
1435 out->print(" Disp: %d", _disp);
1436 }
1437
1438 // debug output of block header without InstructionPrinter
1439 // (because phi functions are not necessary for LIR)
1440 static void print_block(BlockBegin* x) {
1441 // print block id
1442 BlockEnd* end = x->end();
1443 tty->print("B%d ", x->block_id());
1444
1445 // print flags
1446 if (x->is_set(BlockBegin::std_entry_flag)) tty->print("std ");
1447 if (x->is_set(BlockBegin::osr_entry_flag)) tty->print("osr ");
1448 if (x->is_set(BlockBegin::exception_entry_flag)) tty->print("ex ");
1449 if (x->is_set(BlockBegin::subroutine_entry_flag)) tty->print("jsr ");
1450 if (x->is_set(BlockBegin::backward_branch_target_flag)) tty->print("bb ");
1451 if (x->is_set(BlockBegin::linear_scan_loop_header_flag)) tty->print("lh ");
1452 if (x->is_set(BlockBegin::linear_scan_loop_end_flag)) tty->print("le ");
1453
1454 // print block bci range
1455 tty->print("[%d, %d] ", x->bci(), (end == NULL ? -1 : end->bci()));
1456
1457 // print predecessors and successors
1458 if (x->number_of_preds() > 0) {
1459 tty->print("preds: ");
1460 for (int i = 0; i < x->number_of_preds(); i ++) {
1461 tty->print("B%d ", x->pred_at(i)->block_id());
1462 }
1463 }
1464
1465 if (x->number_of_sux() > 0) {
1466 tty->print("sux: ");
1467 for (int i = 0; i < x->number_of_sux(); i ++) {
1468 tty->print("B%d ", x->sux_at(i)->block_id());
1469 }
1470 }
1471
1472 // print exception handlers
1473 if (x->number_of_exception_handlers() > 0) {
1474 tty->print("xhandler: ");
1475 for (int i = 0; i < x->number_of_exception_handlers(); i++) {
1476 tty->print("B%d ", x->exception_handler_at(i)->block_id());
1477 }
1478 }
1479
1480 tty->cr();
1481 }
1482
1483 void print_LIR(BlockList* blocks) {
1484 tty->print_cr("LIR:");
1485 int i;
1486 for (i = 0; i < blocks->length(); i++) {
1487 BlockBegin* bb = blocks->at(i);
1488 print_block(bb);
1489 tty->print("__id_Instruction___________________________________________"); tty->cr();
1490 bb->lir()->print_instructions();
1491 }
1492 }
1493
1494 void LIR_List::print_instructions() {
1495 for (int i = 0; i < _operations.length(); i++) {
1496 _operations.at(i)->print(); tty->cr();
1497 }
1498 tty->cr();
1499 }
1500
1501 // LIR_Ops printing routines
1502 // LIR_Op
1503 void LIR_Op::print_on(outputStream* out) const {
1504 if (id() != -1 || PrintCFGToFile) {
1505 out->print("%4d ", id());
1506 } else {
1507 out->print(" ");
1508 }
1509 out->print(name()); out->print(" ");
1510 print_instr(out);
1511 if (info() != NULL) out->print(" [bci:%d]", info()->bci());
1512 #ifdef ASSERT
1513 if (Verbose && _file != NULL) {
1514 out->print(" (%s:%d)", _file, _line);
1515 }
1516 #endif
1517 }
1518
1519 const char * LIR_Op::name() const {
1520 const char* s = NULL;
1521 switch(code()) {
1522 // LIR_Op0
1523 case lir_membar: s = "membar"; break;
1524 case lir_membar_acquire: s = "membar_acquire"; break;
1525 case lir_membar_release: s = "membar_release"; break;
1526 case lir_word_align: s = "word_align"; break;
1527 case lir_label: s = "label"; break;
1528 case lir_nop: s = "nop"; break;
1529 case lir_backwardbranch_target: s = "backbranch"; break;
1530 case lir_std_entry: s = "std_entry"; break;
1531 case lir_osr_entry: s = "osr_entry"; break;
1532 case lir_build_frame: s = "build_frm"; break;
1533 case lir_fpop_raw: s = "fpop_raw"; break;
1534 case lir_24bit_FPU: s = "24bit_FPU"; break;
1535 case lir_reset_FPU: s = "reset_FPU"; break;
1536 case lir_breakpoint: s = "breakpoint"; break;
1537 case lir_get_thread: s = "get_thread"; break;
1538 // LIR_Op1
1539 case lir_fxch: s = "fxch"; break;
1540 case lir_fld: s = "fld"; break;
1541 case lir_ffree: s = "ffree"; break;
1542 case lir_push: s = "push"; break;
1543 case lir_pop: s = "pop"; break;
1544 case lir_null_check: s = "null_check"; break;
1545 case lir_return: s = "return"; break;
1546 case lir_safepoint: s = "safepoint"; break;
1547 case lir_neg: s = "neg"; break;
1548 case lir_leal: s = "leal"; break;
1549 case lir_branch: s = "branch"; break;
1550 case lir_cond_float_branch: s = "flt_cond_br"; break;
1551 case lir_move: s = "move"; break;
1552 case lir_roundfp: s = "roundfp"; break;
1553 case lir_rtcall: s = "rtcall"; break;
1554 case lir_throw: s = "throw"; break;
1555 case lir_unwind: s = "unwind"; break;
1556 case lir_convert: s = "convert"; break;
1557 case lir_alloc_object: s = "alloc_obj"; break;
1558 case lir_monaddr: s = "mon_addr"; break;
1559 // LIR_Op2
1560 case lir_cmp: s = "cmp"; break;
1561 case lir_cmp_l2i: s = "cmp_l2i"; break;
1562 case lir_ucmp_fd2i: s = "ucomp_fd2i"; break;
1563 case lir_cmp_fd2i: s = "comp_fd2i"; break;
1564 case lir_cmove: s = "cmove"; break;
1565 case lir_add: s = "add"; break;
1566 case lir_sub: s = "sub"; break;
1567 case lir_mul: s = "mul"; break;
1568 case lir_mul_strictfp: s = "mul_strictfp"; break;
1569 case lir_div: s = "div"; break;
1570 case lir_div_strictfp: s = "div_strictfp"; break;
1571 case lir_rem: s = "rem"; break;
1572 case lir_abs: s = "abs"; break;
1573 case lir_sqrt: s = "sqrt"; break;
1574 case lir_sin: s = "sin"; break;
1575 case lir_cos: s = "cos"; break;
1576 case lir_tan: s = "tan"; break;
1577 case lir_log: s = "log"; break;
1578 case lir_log10: s = "log10"; break;
1579 case lir_logic_and: s = "logic_and"; break;
1580 case lir_logic_or: s = "logic_or"; break;
1581 case lir_logic_xor: s = "logic_xor"; break;
1582 case lir_shl: s = "shift_left"; break;
1583 case lir_shr: s = "shift_right"; break;
1584 case lir_ushr: s = "ushift_right"; break;
1585 case lir_alloc_array: s = "alloc_array"; break;
1586 // LIR_Op3
1587 case lir_idiv: s = "idiv"; break;
1588 case lir_irem: s = "irem"; break;
1589 // LIR_OpJavaCall
1590 case lir_static_call: s = "static"; break;
1591 case lir_optvirtual_call: s = "optvirtual"; break;
1592 case lir_icvirtual_call: s = "icvirtual"; break;
1593 case lir_virtual_call: s = "virtual"; break;
1594 // LIR_OpArrayCopy
1595 case lir_arraycopy: s = "arraycopy"; break;
1596 // LIR_OpLock
1597 case lir_lock: s = "lock"; break;
1598 case lir_unlock: s = "unlock"; break;
1599 // LIR_OpDelay
1600 case lir_delay_slot: s = "delay"; break;
1601 // LIR_OpTypeCheck
1602 case lir_instanceof: s = "instanceof"; break;
1603 case lir_checkcast: s = "checkcast"; break;
1604 case lir_store_check: s = "store_check"; break;
1605 // LIR_OpCompareAndSwap
1606 case lir_cas_long: s = "cas_long"; break;
1607 case lir_cas_obj: s = "cas_obj"; break;
1608 case lir_cas_int: s = "cas_int"; break;
1609 // LIR_OpProfileCall
1610 case lir_profile_call: s = "profile_call"; break;
1611
1612 case lir_none: ShouldNotReachHere();break;
1613 default: s = "illegal_op"; break;
1614 }
1615 return s;
1616 }
1617
1618 // LIR_OpJavaCall
1619 void LIR_OpJavaCall::print_instr(outputStream* out) const {
1620 out->print("call: ");
1621 out->print("[addr: 0x%x]", address());
1622 if (receiver()->is_valid()) {
1623 out->print(" [recv: "); receiver()->print(out); out->print("]");
1624 }
1625 if (result_opr()->is_valid()) {
1626 out->print(" [result: "); result_opr()->print(out); out->print("]");
1627 }
1628 }
1629
1630 // LIR_OpLabel
1631 void LIR_OpLabel::print_instr(outputStream* out) const {
1632 out->print("[label:0x%x]", _label);
1633 }
1634
1635 // LIR_OpArrayCopy
1636 void LIR_OpArrayCopy::print_instr(outputStream* out) const {
1637 src()->print(out); out->print(" ");
1638 src_pos()->print(out); out->print(" ");
1639 dst()->print(out); out->print(" ");
1640 dst_pos()->print(out); out->print(" ");
1641 length()->print(out); out->print(" ");
1642 tmp()->print(out); out->print(" ");
1643 }
1644
1645 // LIR_OpCompareAndSwap
1646 void LIR_OpCompareAndSwap::print_instr(outputStream* out) const {
1647 addr()->print(out); out->print(" ");
1648 cmp_value()->print(out); out->print(" ");
1649 new_value()->print(out); out->print(" ");
1650 tmp1()->print(out); out->print(" ");
1651 tmp2()->print(out); out->print(" ");
1652
1653 }
1654
1655 // LIR_Op0
1656 void LIR_Op0::print_instr(outputStream* out) const {
1657 result_opr()->print(out);
1658 }
1659
1660 // LIR_Op1
1661 const char * LIR_Op1::name() const {
1662 if (code() == lir_move) {
1663 switch (move_kind()) {
1664 case lir_move_normal:
1665 return "move";
1666 case lir_move_unaligned:
1667 return "unaligned move";
1668 case lir_move_volatile:
1669 return "volatile_move";
1670 default:
1671 ShouldNotReachHere();
1672 return "illegal_op";
1673 }
1674 } else {
1675 return LIR_Op::name();
1676 }
1677 }
1678
1679
1680 void LIR_Op1::print_instr(outputStream* out) const {
1681 _opr->print(out); out->print(" ");
1682 result_opr()->print(out); out->print(" ");
1683 print_patch_code(out, patch_code());
1684 }
1685
1686
1687 // LIR_Op1
1688 void LIR_OpRTCall::print_instr(outputStream* out) const {
1689 intx a = (intx)addr();
1690 out->print(Runtime1::name_for_address(addr()));
1691 out->print(" ");
1692 tmp()->print(out);
1693 }
1694
1695 void LIR_Op1::print_patch_code(outputStream* out, LIR_PatchCode code) {
1696 switch(code) {
1697 case lir_patch_none: break;
1698 case lir_patch_low: out->print("[patch_low]"); break;
1699 case lir_patch_high: out->print("[patch_high]"); break;
1700 case lir_patch_normal: out->print("[patch_normal]"); break;
1701 default: ShouldNotReachHere();
1702 }
1703 }
1704
1705 // LIR_OpBranch
1706 void LIR_OpBranch::print_instr(outputStream* out) const {
1707 print_condition(out, cond()); out->print(" ");
1708 if (block() != NULL) {
1709 out->print("[B%d] ", block()->block_id());
1710 } else if (stub() != NULL) {
1711 out->print("[");
1712 stub()->print_name(out);
1713 out->print(": 0x%x]", stub());
1714 if (stub()->info() != NULL) out->print(" [bci:%d]", stub()->info()->bci());
1715 } else {
1716 out->print("[label:0x%x] ", label());
1717 }
1718 if (ublock() != NULL) {
1719 out->print("unordered: [B%d] ", ublock()->block_id());
1720 }
1721 }
1722
1723 void LIR_Op::print_condition(outputStream* out, LIR_Condition cond) {
1724 switch(cond) {
1725 case lir_cond_equal: out->print("[EQ]"); break;
1726 case lir_cond_notEqual: out->print("[NE]"); break;
1727 case lir_cond_less: out->print("[LT]"); break;
1728 case lir_cond_lessEqual: out->print("[LE]"); break;
1729 case lir_cond_greaterEqual: out->print("[GE]"); break;
1730 case lir_cond_greater: out->print("[GT]"); break;
1731 case lir_cond_belowEqual: out->print("[BE]"); break;
1732 case lir_cond_aboveEqual: out->print("[AE]"); break;
1733 case lir_cond_always: out->print("[AL]"); break;
1734 default: out->print("[%d]",cond); break;
1735 }
1736 }
1737
1738 // LIR_OpConvert
1739 void LIR_OpConvert::print_instr(outputStream* out) const {
1740 print_bytecode(out, bytecode());
1741 in_opr()->print(out); out->print(" ");
1742 result_opr()->print(out); out->print(" ");
1743 }
1744
1745 void LIR_OpConvert::print_bytecode(outputStream* out, Bytecodes::Code code) {
1746 switch(code) {
1747 case Bytecodes::_d2f: out->print("[d2f] "); break;
1748 case Bytecodes::_d2i: out->print("[d2i] "); break;
1749 case Bytecodes::_d2l: out->print("[d2l] "); break;
1750 case Bytecodes::_f2d: out->print("[f2d] "); break;
1751 case Bytecodes::_f2i: out->print("[f2i] "); break;
1752 case Bytecodes::_f2l: out->print("[f2l] "); break;
1753 case Bytecodes::_i2b: out->print("[i2b] "); break;
1754 case Bytecodes::_i2c: out->print("[i2c] "); break;
1755 case Bytecodes::_i2d: out->print("[i2d] "); break;
1756 case Bytecodes::_i2f: out->print("[i2f] "); break;
1757 case Bytecodes::_i2l: out->print("[i2l] "); break;
1758 case Bytecodes::_i2s: out->print("[i2s] "); break;
1759 case Bytecodes::_l2i: out->print("[l2i] "); break;
1760 case Bytecodes::_l2f: out->print("[l2f] "); break;
1761 case Bytecodes::_l2d: out->print("[l2d] "); break;
1762 default:
1763 out->print("[?%d]",code);
1764 break;
1765 }
1766 }
1767
1768 void LIR_OpAllocObj::print_instr(outputStream* out) const {
1769 klass()->print(out); out->print(" ");
1770 obj()->print(out); out->print(" ");
1771 tmp1()->print(out); out->print(" ");
1772 tmp2()->print(out); out->print(" ");
1773 tmp3()->print(out); out->print(" ");
1774 tmp4()->print(out); out->print(" ");
1775 out->print("[hdr:%d]", header_size()); out->print(" ");
1776 out->print("[obj:%d]", object_size()); out->print(" ");
1777 out->print("[lbl:0x%x]", stub()->entry());
1778 }
1779
1780 void LIR_OpRoundFP::print_instr(outputStream* out) const {
1781 _opr->print(out); out->print(" ");
1782 tmp()->print(out); out->print(" ");
1783 result_opr()->print(out); out->print(" ");
1784 }
1785
1786 // LIR_Op2
1787 void LIR_Op2::print_instr(outputStream* out) const {
1788 if (code() == lir_cmove) {
1789 print_condition(out, condition()); out->print(" ");
1790 }
1791 in_opr1()->print(out); out->print(" ");
1792 in_opr2()->print(out); out->print(" ");
1793 if (tmp_opr()->is_valid()) { tmp_opr()->print(out); out->print(" "); }
1794 result_opr()->print(out);
1795 }
1796
1797 void LIR_OpAllocArray::print_instr(outputStream* out) const {
1798 klass()->print(out); out->print(" ");
1799 len()->print(out); out->print(" ");
1800 obj()->print(out); out->print(" ");
1801 tmp1()->print(out); out->print(" ");
1802 tmp2()->print(out); out->print(" ");
1803 tmp3()->print(out); out->print(" ");
1804 tmp4()->print(out); out->print(" ");
1805 out->print("[type:0x%x]", type()); out->print(" ");
1806 out->print("[label:0x%x]", stub()->entry());
1807 }
1808
1809
1810 void LIR_OpTypeCheck::print_instr(outputStream* out) const {
1811 object()->print(out); out->print(" ");
1812 if (code() == lir_store_check) {
1813 array()->print(out); out->print(" ");
1814 }
1815 if (code() != lir_store_check) {
1816 klass()->print_name_on(out); out->print(" ");
1817 if (fast_check()) out->print("fast_check ");
1818 }
1819 tmp1()->print(out); out->print(" ");
1820 tmp2()->print(out); out->print(" ");
1821 tmp3()->print(out); out->print(" ");
1822 result_opr()->print(out); out->print(" ");
1823 if (info_for_exception() != NULL) out->print(" [bci:%d]", info_for_exception()->bci());
1824 }
1825
1826
1827 // LIR_Op3
1828 void LIR_Op3::print_instr(outputStream* out) const {
1829 in_opr1()->print(out); out->print(" ");
1830 in_opr2()->print(out); out->print(" ");
1831 in_opr3()->print(out); out->print(" ");
1832 result_opr()->print(out);
1833 }
1834
1835
1836 void LIR_OpLock::print_instr(outputStream* out) const {
1837 hdr_opr()->print(out); out->print(" ");
1838 obj_opr()->print(out); out->print(" ");
1839 lock_opr()->print(out); out->print(" ");
1840 if (_scratch->is_valid()) {
1841 _scratch->print(out); out->print(" ");
1842 }
1843 out->print("[lbl:0x%x]", stub()->entry());
1844 }
1845
1846
1847 void LIR_OpDelay::print_instr(outputStream* out) const {
1848 _op->print_on(out);
1849 }
1850
1851
1852 // LIR_OpProfileCall
1853 void LIR_OpProfileCall::print_instr(outputStream* out) const {
1854 profiled_method()->name()->print_symbol_on(out);
1855 out->print(".");
1856 profiled_method()->holder()->name()->print_symbol_on(out);
1857 out->print(" @ %d ", profiled_bci());
1858 mdo()->print(out); out->print(" ");
1859 recv()->print(out); out->print(" ");
1860 tmp1()->print(out); out->print(" ");
1861 }
1862
1863
1864 #endif // PRODUCT
1865
1866 // Implementation of LIR_InsertionBuffer
1867
1868 void LIR_InsertionBuffer::append(int index, LIR_Op* op) {
1869 assert(_index_and_count.length() % 2 == 0, "must have a count for each index");
1870
1871 int i = number_of_insertion_points() - 1;
1872 if (i < 0 || index_at(i) < index) {
1873 append_new(index, 1);
1874 } else {
1875 assert(index_at(i) == index, "can append LIR_Ops in ascending order only");
1876 assert(count_at(i) > 0, "check");
1877 set_count_at(i, count_at(i) + 1);
1878 }
1879 _ops.push(op);
1880
1881 DEBUG_ONLY(verify());
1882 }
1883
1884 #ifdef ASSERT
1885 void LIR_InsertionBuffer::verify() {
1886 int sum = 0;
1887 int prev_idx = -1;
1888
1889 for (int i = 0; i < number_of_insertion_points(); i++) {
1890 assert(prev_idx < index_at(i), "index must be ordered ascending");
1891 sum += count_at(i);
1892 }
1893 assert(sum == number_of_ops(), "wrong total sum");
1894 }
1895 #endif