1 #ifdef USE_PRAGMA_IDENT_SRC
2 #pragma ident "@(#)c1_LIR.cpp 1.119 07/06/18 14:25:24 JVM"
3 #endif
4 /*
5 * Copyright 2000-2008 Sun Microsystems, Inc. All Rights Reserved.
6 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
7 *
8 * This code is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License version 2 only, as
10 * published by the Free Software Foundation.
11 *
12 * This code is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 * version 2 for more details (a copy is included in the LICENSE file that
16 * accompanied this code).
17 *
18 * You should have received a copy of the GNU General Public License version
19 * 2 along with this work; if not, write to the Free Software Foundation,
20 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
21 *
22 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
23 * CA 95054 USA or visit www.sun.com if you need additional information or
24 * have any questions.
25 *
26 */
27
28 # include "incls/_precompiled.incl"
29 # include "incls/_c1_LIR.cpp.incl"
30
31 Register LIR_OprDesc::as_register() const {
32 return FrameMap::cpu_rnr2reg(cpu_regnr());
33 }
34
35 Register LIR_OprDesc::as_register_lo() const {
36 return FrameMap::cpu_rnr2reg(cpu_regnrLo());
37 }
38
39 Register LIR_OprDesc::as_register_hi() const {
40 return FrameMap::cpu_rnr2reg(cpu_regnrHi());
41 }
42
43 #if defined(X86)
44
45 XMMRegister LIR_OprDesc::as_xmm_float_reg() const {
46 return FrameMap::nr2xmmreg(xmm_regnr());
47 }
48
49 XMMRegister LIR_OprDesc::as_xmm_double_reg() const {
50 assert(xmm_regnrLo() == xmm_regnrHi(), "assumed in calculation");
51 return FrameMap::nr2xmmreg(xmm_regnrLo());
52 }
53
54 #endif // X86
55
56
57 #ifdef SPARC
58
59 FloatRegister LIR_OprDesc::as_float_reg() const {
60 return FrameMap::nr2floatreg(fpu_regnr());
61 }
62
63 FloatRegister LIR_OprDesc::as_double_reg() const {
64 return FrameMap::nr2floatreg(fpu_regnrHi());
65 }
66
67 #endif
68
69 LIR_Opr LIR_OprFact::illegalOpr = LIR_OprFact::illegal();
70
71 LIR_Opr LIR_OprFact::value_type(ValueType* type) {
72 ValueTag tag = type->tag();
73 switch (tag) {
74 case objectTag : {
75 ClassConstant* c = type->as_ClassConstant();
76 if (c != NULL && !c->value()->is_loaded()) {
77 return LIR_OprFact::oopConst(NULL);
78 } else {
79 return LIR_OprFact::oopConst(type->as_ObjectType()->encoding());
80 }
81 }
82 case addressTag: return LIR_OprFact::intConst(type->as_AddressConstant()->value());
83 case intTag : return LIR_OprFact::intConst(type->as_IntConstant()->value());
84 case floatTag : return LIR_OprFact::floatConst(type->as_FloatConstant()->value());
85 case longTag : return LIR_OprFact::longConst(type->as_LongConstant()->value());
86 case doubleTag : return LIR_OprFact::doubleConst(type->as_DoubleConstant()->value());
87 default: ShouldNotReachHere(); return LIR_OprFact::intConst(-1);
88 }
89 }
90
91
92 LIR_Opr LIR_OprFact::dummy_value_type(ValueType* type) {
93 switch (type->tag()) {
94 case objectTag: return LIR_OprFact::oopConst(NULL);
95 case addressTag:
96 case intTag: return LIR_OprFact::intConst(0);
97 case floatTag: return LIR_OprFact::floatConst(0.0);
98 case longTag: return LIR_OprFact::longConst(0);
99 case doubleTag: return LIR_OprFact::doubleConst(0.0);
100 default: ShouldNotReachHere(); return LIR_OprFact::intConst(-1);
101 }
102 return illegalOpr;
103 }
104
105
106
107 //---------------------------------------------------
108
109
110 LIR_Address::Scale LIR_Address::scale(BasicType type) {
111 int elem_size = type2aelembytes(type);
112 switch (elem_size) {
113 case 1: return LIR_Address::times_1;
114 case 2: return LIR_Address::times_2;
115 case 4: return LIR_Address::times_4;
116 case 8: return LIR_Address::times_8;
117 }
118 ShouldNotReachHere();
119 return LIR_Address::times_1;
120 }
121
122
123 #ifndef PRODUCT
124 void LIR_Address::verify() const {
125 #ifdef SPARC
126 assert(scale() == times_1, "Scaled addressing mode not available on SPARC and should not be used");
127 assert(disp() == 0 || index()->is_illegal(), "can't have both");
128 #endif
129 #ifdef _LP64
130 assert(base()->is_cpu_register(), "wrong base operand");
131 assert(index()->is_illegal() || index()->is_double_cpu(), "wrong index operand");
132 assert(base()->type() == T_OBJECT || base()->type() == T_LONG,
133 "wrong type for addresses");
134 #else
135 assert(base()->is_single_cpu(), "wrong base operand");
136 assert(index()->is_illegal() || index()->is_single_cpu(), "wrong index operand");
137 assert(base()->type() == T_OBJECT || base()->type() == T_INT,
138 "wrong type for addresses");
139 #endif
140 }
141 #endif
142
143
144 //---------------------------------------------------
145
146 char LIR_OprDesc::type_char(BasicType t) {
147 switch (t) {
148 case T_ARRAY:
149 t = T_OBJECT;
150 case T_BOOLEAN:
151 case T_CHAR:
152 case T_FLOAT:
153 case T_DOUBLE:
154 case T_BYTE:
155 case T_SHORT:
156 case T_INT:
157 case T_LONG:
158 case T_OBJECT:
159 case T_ADDRESS:
160 case T_VOID:
161 return ::type2char(t);
162
163 case T_ILLEGAL:
164 return '?';
165
166 default:
167 ShouldNotReachHere();
168 return '?';
169 }
170 }
171
172 #ifndef PRODUCT
173 void LIR_OprDesc::validate_type() const {
174
175 #ifdef ASSERT
176 if (!is_pointer() && !is_illegal()) {
177 switch (as_BasicType(type_field())) {
178 case T_LONG:
179 assert((kind_field() == cpu_register || kind_field() == stack_value) && size_field() == double_size, "must match");
180 break;
181 case T_FLOAT:
182 assert((kind_field() == fpu_register || kind_field() == stack_value) && size_field() == single_size, "must match");
183 break;
184 case T_DOUBLE:
185 assert((kind_field() == fpu_register || kind_field() == stack_value) && size_field() == double_size, "must match");
186 break;
187 case T_BOOLEAN:
188 case T_CHAR:
189 case T_BYTE:
190 case T_SHORT:
191 case T_INT:
192 case T_OBJECT:
193 case T_ARRAY:
194 assert((kind_field() == cpu_register || kind_field() == stack_value) && size_field() == single_size, "must match");
195 break;
196
197 case T_ILLEGAL:
198 // XXX TKR also means unknown right now
199 // assert(is_illegal(), "must match");
200 break;
201
202 default:
203 ShouldNotReachHere();
204 }
205 }
206 #endif
207
208 }
209 #endif // PRODUCT
210
211
212 bool LIR_OprDesc::is_oop() const {
213 if (is_pointer()) {
214 return pointer()->is_oop_pointer();
215 } else {
216 OprType t= type_field();
217 assert(t != unknown_type, "not set");
218 return t == object_type;
219 }
220 }
221
222
223
224 void LIR_Op2::verify() const {
225 #ifdef ASSERT
226 switch (code()) {
227 case lir_cmove:
228 break;
229
230 default:
231 assert(!result_opr()->is_register() || !result_opr()->is_oop_register(),
232 "can't produce oops from arith");
233 }
234
235 if (TwoOperandLIRForm) {
236 switch (code()) {
237 case lir_add:
238 case lir_sub:
239 case lir_mul:
240 case lir_mul_strictfp:
241 case lir_div:
242 case lir_div_strictfp:
243 case lir_rem:
244 case lir_logic_and:
245 case lir_logic_or:
246 case lir_logic_xor:
247 case lir_shl:
248 case lir_shr:
249 assert(in_opr1() == result_opr(), "opr1 and result must match");
250 assert(in_opr1()->is_valid() && in_opr2()->is_valid(), "must be valid");
251 break;
252
253 // special handling for lir_ushr because of write barriers
254 case lir_ushr:
255 assert(in_opr1() == result_opr() || in_opr2()->is_constant(), "opr1 and result must match or shift count is constant");
256 assert(in_opr1()->is_valid() && in_opr2()->is_valid(), "must be valid");
257 break;
258
259 }
260 }
261 #endif
262 }
263
264
265 LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block)
266 : LIR_Op(lir_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL)
267 , _cond(cond)
268 , _type(type)
269 , _label(block->label())
270 , _block(block)
271 , _ublock(NULL)
272 , _stub(NULL) {
273 }
274
275 LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BasicType type, CodeStub* stub) :
276 LIR_Op(lir_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL)
277 , _cond(cond)
278 , _type(type)
279 , _label(stub->entry())
280 , _block(NULL)
281 , _ublock(NULL)
282 , _stub(stub) {
283 }
284
285 LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block, BlockBegin* ublock)
286 : LIR_Op(lir_cond_float_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL)
287 , _cond(cond)
288 , _type(type)
289 , _label(block->label())
290 , _block(block)
291 , _ublock(ublock)
292 , _stub(NULL)
293 {
294 }
295
296 void LIR_OpBranch::change_block(BlockBegin* b) {
297 assert(_block != NULL, "must have old block");
298 assert(_block->label() == label(), "must be equal");
299
300 _block = b;
301 _label = b->label();
302 }
303
304 void LIR_OpBranch::change_ublock(BlockBegin* b) {
305 assert(_ublock != NULL, "must have old block");
306 _ublock = b;
307 }
308
309 void LIR_OpBranch::negate_cond() {
310 switch (_cond) {
311 case lir_cond_equal: _cond = lir_cond_notEqual; break;
312 case lir_cond_notEqual: _cond = lir_cond_equal; break;
313 case lir_cond_less: _cond = lir_cond_greaterEqual; break;
314 case lir_cond_lessEqual: _cond = lir_cond_greater; break;
315 case lir_cond_greaterEqual: _cond = lir_cond_less; break;
316 case lir_cond_greater: _cond = lir_cond_lessEqual; break;
317 default: ShouldNotReachHere();
318 }
319 }
320
321
322 LIR_OpTypeCheck::LIR_OpTypeCheck(LIR_Code code, LIR_Opr result, LIR_Opr object, ciKlass* klass,
323 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3,
324 bool fast_check, CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch,
325 CodeStub* stub,
326 ciMethod* profiled_method,
327 int profiled_bci)
328 : LIR_Op(code, result, NULL)
329 , _object(object)
330 , _array(LIR_OprFact::illegalOpr)
331 , _klass(klass)
332 , _tmp1(tmp1)
333 , _tmp2(tmp2)
334 , _tmp3(tmp3)
335 , _fast_check(fast_check)
336 , _stub(stub)
337 , _info_for_patch(info_for_patch)
338 , _info_for_exception(info_for_exception)
339 , _profiled_method(profiled_method)
340 , _profiled_bci(profiled_bci) {
341 if (code == lir_checkcast) {
342 assert(info_for_exception != NULL, "checkcast throws exceptions");
343 } else if (code == lir_instanceof) {
344 assert(info_for_exception == NULL, "instanceof throws no exceptions");
345 } else {
346 ShouldNotReachHere();
347 }
348 }
349
350
351
352 LIR_OpTypeCheck::LIR_OpTypeCheck(LIR_Code code, LIR_Opr object, LIR_Opr array, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, CodeEmitInfo* info_for_exception, ciMethod* profiled_method, int profiled_bci)
353 : LIR_Op(code, LIR_OprFact::illegalOpr, NULL)
354 , _object(object)
355 , _array(array)
356 , _klass(NULL)
357 , _tmp1(tmp1)
358 , _tmp2(tmp2)
359 , _tmp3(tmp3)
360 , _fast_check(false)
361 , _stub(NULL)
362 , _info_for_patch(NULL)
363 , _info_for_exception(info_for_exception)
364 , _profiled_method(profiled_method)
365 , _profiled_bci(profiled_bci) {
366 if (code == lir_store_check) {
367 _stub = new ArrayStoreExceptionStub(info_for_exception);
368 assert(info_for_exception != NULL, "store_check throws exceptions");
369 } else {
370 ShouldNotReachHere();
371 }
372 }
373
374
375 LIR_OpArrayCopy::LIR_OpArrayCopy(LIR_Opr src, LIR_Opr src_pos, LIR_Opr dst, LIR_Opr dst_pos, LIR_Opr length,
376 LIR_Opr tmp, ciArrayKlass* expected_type, int flags, CodeEmitInfo* info)
377 : LIR_Op(lir_arraycopy, LIR_OprFact::illegalOpr, info)
378 , _tmp(tmp)
379 , _src(src)
380 , _src_pos(src_pos)
381 , _dst(dst)
382 , _dst_pos(dst_pos)
383 , _flags(flags)
384 , _expected_type(expected_type)
385 , _length(length) {
386 _stub = new ArrayCopyStub(this);
387 }
388
389
390 //-------------------verify--------------------------
391
392 void LIR_Op1::verify() const {
393 switch(code()) {
394 case lir_move:
395 assert(in_opr()->is_valid() && result_opr()->is_valid(), "must be");
396 break;
397 case lir_null_check:
398 assert(in_opr()->is_register(), "must be");
399 break;
400 case lir_return:
401 assert(in_opr()->is_register() || in_opr()->is_illegal(), "must be");
402 break;
403 }
404 }
405
406 void LIR_OpRTCall::verify() const {
407 assert(strcmp(Runtime1::name_for_address(addr()), "<unknown function>") != 0, "unknown function");
408 }
409
410 //-------------------visits--------------------------
411
412 // complete rework of LIR instruction visitor.
413 // The virtual calls for each instruction type is replaced by a big
414 // switch that adds the operands for each instruction
415
416 void LIR_OpVisitState::visit(LIR_Op* op) {
417 // copy information from the LIR_Op
418 reset();
419 set_op(op);
420
421 switch (op->code()) {
422
423 // LIR_Op0
424 case lir_word_align: // result and info always invalid
425 case lir_backwardbranch_target: // result and info always invalid
426 case lir_build_frame: // result and info always invalid
427 case lir_fpop_raw: // result and info always invalid
428 case lir_24bit_FPU: // result and info always invalid
429 case lir_reset_FPU: // result and info always invalid
430 case lir_breakpoint: // result and info always invalid
431 case lir_membar: // result and info always invalid
432 case lir_membar_acquire: // result and info always invalid
433 case lir_membar_release: // result and info always invalid
434 {
435 assert(op->as_Op0() != NULL, "must be");
436 assert(op->_info == NULL, "info not used by this instruction");
437 assert(op->_result->is_illegal(), "not used");
438 break;
439 }
440
441 case lir_nop: // may have info, result always invalid
442 case lir_std_entry: // may have result, info always invalid
443 case lir_osr_entry: // may have result, info always invalid
444 case lir_get_thread: // may have result, info always invalid
445 {
446 assert(op->as_Op0() != NULL, "must be");
447 if (op->_info != NULL) do_info(op->_info);
448 if (op->_result->is_valid()) do_output(op->_result);
449 break;
450 }
451
452
453 // LIR_OpLabel
454 case lir_label: // result and info always invalid
455 {
456 assert(op->as_OpLabel() != NULL, "must be");
457 assert(op->_info == NULL, "info not used by this instruction");
458 assert(op->_result->is_illegal(), "not used");
459 break;
460 }
461
462
463 // LIR_Op1
464 case lir_fxch: // input always valid, result and info always invalid
465 case lir_fld: // input always valid, result and info always invalid
466 case lir_ffree: // input always valid, result and info always invalid
467 case lir_push: // input always valid, result and info always invalid
468 case lir_pop: // input always valid, result and info always invalid
469 case lir_return: // input always valid, result and info always invalid
470 case lir_leal: // input and result always valid, info always invalid
471 case lir_neg: // input and result always valid, info always invalid
472 case lir_monaddr: // input and result always valid, info always invalid
473 case lir_null_check: // input and info always valid, result always invalid
474 case lir_move: // input and result always valid, may have info
475 case lir_prefetchr: // input always valid, result and info always invalid
476 case lir_prefetchw: // input always valid, result and info always invalid
477 {
478 assert(op->as_Op1() != NULL, "must be");
479 LIR_Op1* op1 = (LIR_Op1*)op;
480
481 if (op1->_info) do_info(op1->_info);
482 if (op1->_opr->is_valid()) do_input(op1->_opr);
483 if (op1->_result->is_valid()) do_output(op1->_result);
484
485 break;
486 }
487
488 case lir_safepoint:
489 {
490 assert(op->as_Op1() != NULL, "must be");
491 LIR_Op1* op1 = (LIR_Op1*)op;
492
493 assert(op1->_info != NULL, ""); do_info(op1->_info);
494 if (op1->_opr->is_valid()) do_temp(op1->_opr); // safepoints on SPARC need temporary register
495 assert(op1->_result->is_illegal(), "safepoint does not produce value");
496
497 break;
498 }
499
500 // LIR_OpConvert;
501 case lir_convert: // input and result always valid, info always invalid
502 {
503 assert(op->as_OpConvert() != NULL, "must be");
504 LIR_OpConvert* opConvert = (LIR_OpConvert*)op;
505
506 assert(opConvert->_info == NULL, "must be");
507 if (opConvert->_opr->is_valid()) do_input(opConvert->_opr);
508 if (opConvert->_result->is_valid()) do_output(opConvert->_result);
509 do_stub(opConvert->_stub);
510
511 break;
512 }
513
514 // LIR_OpBranch;
515 case lir_branch: // may have info, input and result register always invalid
516 case lir_cond_float_branch: // may have info, input and result register always invalid
517 {
518 assert(op->as_OpBranch() != NULL, "must be");
519 LIR_OpBranch* opBranch = (LIR_OpBranch*)op;
520
521 if (opBranch->_info != NULL) do_info(opBranch->_info);
522 assert(opBranch->_result->is_illegal(), "not used");
523 if (opBranch->_stub != NULL) opBranch->stub()->visit(this);
524
525 break;
526 }
527
528
529 // LIR_OpAllocObj
530 case lir_alloc_object:
531 {
532 assert(op->as_OpAllocObj() != NULL, "must be");
533 LIR_OpAllocObj* opAllocObj = (LIR_OpAllocObj*)op;
534
535 if (opAllocObj->_info) do_info(opAllocObj->_info);
536 if (opAllocObj->_opr->is_valid()) do_input(opAllocObj->_opr);
537 if (opAllocObj->_tmp1->is_valid()) do_temp(opAllocObj->_tmp1);
538 if (opAllocObj->_tmp2->is_valid()) do_temp(opAllocObj->_tmp2);
539 if (opAllocObj->_tmp3->is_valid()) do_temp(opAllocObj->_tmp3);
540 if (opAllocObj->_tmp4->is_valid()) do_temp(opAllocObj->_tmp4);
541 if (opAllocObj->_result->is_valid()) do_output(opAllocObj->_result);
542 do_stub(opAllocObj->_stub);
543 break;
544 }
545
546
547 // LIR_OpRoundFP;
548 case lir_roundfp: {
549 assert(op->as_OpRoundFP() != NULL, "must be");
550 LIR_OpRoundFP* opRoundFP = (LIR_OpRoundFP*)op;
551
552 assert(op->_info == NULL, "info not used by this instruction");
553 assert(opRoundFP->_tmp->is_illegal(), "not used");
554 do_input(opRoundFP->_opr);
555 do_output(opRoundFP->_result);
556
557 break;
558 }
559
560
561 // LIR_Op2
562 case lir_cmp:
563 case lir_cmp_l2i:
564 case lir_ucmp_fd2i:
565 case lir_cmp_fd2i:
566 case lir_add:
567 case lir_sub:
568 case lir_mul:
569 case lir_div:
570 case lir_rem:
571 case lir_sqrt:
572 case lir_abs:
573 case lir_log:
574 case lir_log10:
575 case lir_logic_and:
576 case lir_logic_or:
577 case lir_logic_xor:
578 case lir_shl:
579 case lir_shr:
580 case lir_ushr:
581 {
582 assert(op->as_Op2() != NULL, "must be");
583 LIR_Op2* op2 = (LIR_Op2*)op;
584
585 if (op2->_info) do_info(op2->_info);
586 if (op2->_opr1->is_valid()) do_input(op2->_opr1);
587 if (op2->_opr2->is_valid()) do_input(op2->_opr2);
588 if (op2->_tmp->is_valid()) do_temp(op2->_tmp);
589 if (op2->_result->is_valid()) do_output(op2->_result);
590
591 break;
592 }
593
594 // special handling for cmove: right input operand must not be equal
595 // to the result operand, otherwise the backend fails
596 case lir_cmove:
597 {
598 assert(op->as_Op2() != NULL, "must be");
599 LIR_Op2* op2 = (LIR_Op2*)op;
600
601 assert(op2->_info == NULL && op2->_tmp->is_illegal(), "not used");
602 assert(op2->_opr1->is_valid() && op2->_opr2->is_valid() && op2->_result->is_valid(), "used");
603
604 do_input(op2->_opr1);
605 do_input(op2->_opr2);
606 do_temp(op2->_opr2);
607 do_output(op2->_result);
608
609 break;
610 }
611
612 // vspecial handling for strict operations: register input operands
613 // as temp to guarantee that they do not overlap with other
614 // registers
615 case lir_mul_strictfp:
616 case lir_div_strictfp:
617 {
618 assert(op->as_Op2() != NULL, "must be");
619 LIR_Op2* op2 = (LIR_Op2*)op;
620
621 assert(op2->_info == NULL, "not used");
622 assert(op2->_opr1->is_valid(), "used");
623 assert(op2->_opr2->is_valid(), "used");
624 assert(op2->_result->is_valid(), "used");
625
626 do_input(op2->_opr1); do_temp(op2->_opr1);
627 do_input(op2->_opr2); do_temp(op2->_opr2);
628 if (op2->_tmp->is_valid()) do_temp(op2->_tmp);
629 do_output(op2->_result);
630
631 break;
632 }
633
634 case lir_throw:
635 case lir_unwind: {
636 assert(op->as_Op2() != NULL, "must be");
637 LIR_Op2* op2 = (LIR_Op2*)op;
638
639 if (op2->_info) do_info(op2->_info);
640 if (op2->_opr1->is_valid()) do_temp(op2->_opr1);
641 if (op2->_opr2->is_valid()) do_input(op2->_opr2); // exception object is input parameter
642 assert(op2->_result->is_illegal(), "no result");
643
644 break;
645 }
646
647
648 case lir_tan:
649 case lir_sin:
650 case lir_cos: {
651 assert(op->as_Op2() != NULL, "must be");
652 LIR_Op2* op2 = (LIR_Op2*)op;
653
654 // sin and cos need two temporary fpu stack slots, so register
655 // two temp operands. Register input operand as temp to
656 // guarantee that they do not overlap
657 assert(op2->_info == NULL, "not used");
658 assert(op2->_opr1->is_valid(), "used");
659 do_input(op2->_opr1); do_temp(op2->_opr1);
660
661 if (op2->_opr2->is_valid()) do_temp(op2->_opr2);
662 if (op2->_tmp->is_valid()) do_temp(op2->_tmp);
663 if (op2->_result->is_valid()) do_output(op2->_result);
664
665 break;
666 }
667
668
669 // LIR_Op3
670 case lir_idiv:
671 case lir_irem: {
672 assert(op->as_Op3() != NULL, "must be");
673 LIR_Op3* op3= (LIR_Op3*)op;
674
675 if (op3->_info) do_info(op3->_info);
676 if (op3->_opr1->is_valid()) do_input(op3->_opr1);
677
678 // second operand is input and temp, so ensure that second operand
679 // and third operand get not the same register
680 if (op3->_opr2->is_valid()) do_input(op3->_opr2);
681 if (op3->_opr2->is_valid()) do_temp(op3->_opr2);
682 if (op3->_opr3->is_valid()) do_temp(op3->_opr3);
683
684 if (op3->_result->is_valid()) do_output(op3->_result);
685
686 break;
687 }
688
689
690 // LIR_OpJavaCall
691 case lir_static_call:
692 case lir_optvirtual_call:
693 case lir_icvirtual_call:
694 case lir_virtual_call: {
695 assert(op->as_OpJavaCall() != NULL, "must be");
696 LIR_OpJavaCall* opJavaCall = (LIR_OpJavaCall*)op;
697
698 if (opJavaCall->_receiver->is_valid()) do_input(opJavaCall->_receiver);
699
700 // only visit register parameters
701 int n = opJavaCall->_arguments->length();
702 for (int i = 0; i < n; i++) {
703 if (!opJavaCall->_arguments->at(i)->is_pointer()) {
704 do_input(*opJavaCall->_arguments->adr_at(i));
705 }
706 }
707
708 if (opJavaCall->_info) do_info(opJavaCall->_info);
709 do_call();
710 if (opJavaCall->_result->is_valid()) do_output(opJavaCall->_result);
711
712 break;
713 }
714
715
716 // LIR_OpRTCall
717 case lir_rtcall: {
718 assert(op->as_OpRTCall() != NULL, "must be");
719 LIR_OpRTCall* opRTCall = (LIR_OpRTCall*)op;
720
721 // only visit register parameters
722 int n = opRTCall->_arguments->length();
723 for (int i = 0; i < n; i++) {
724 if (!opRTCall->_arguments->at(i)->is_pointer()) {
725 do_input(*opRTCall->_arguments->adr_at(i));
726 }
727 }
728 if (opRTCall->_info) do_info(opRTCall->_info);
729 if (opRTCall->_tmp->is_valid()) do_temp(opRTCall->_tmp);
730 do_call();
731 if (opRTCall->_result->is_valid()) do_output(opRTCall->_result);
732
733 break;
734 }
735
736
737 // LIR_OpArrayCopy
738 case lir_arraycopy: {
739 assert(op->as_OpArrayCopy() != NULL, "must be");
740 LIR_OpArrayCopy* opArrayCopy = (LIR_OpArrayCopy*)op;
741
742 assert(opArrayCopy->_result->is_illegal(), "unused");
743 assert(opArrayCopy->_src->is_valid(), "used"); do_input(opArrayCopy->_src); do_temp(opArrayCopy->_src);
744 assert(opArrayCopy->_src_pos->is_valid(), "used"); do_input(opArrayCopy->_src_pos); do_temp(opArrayCopy->_src_pos);
745 assert(opArrayCopy->_dst->is_valid(), "used"); do_input(opArrayCopy->_dst); do_temp(opArrayCopy->_dst);
746 assert(opArrayCopy->_dst_pos->is_valid(), "used"); do_input(opArrayCopy->_dst_pos); do_temp(opArrayCopy->_dst_pos);
747 assert(opArrayCopy->_length->is_valid(), "used"); do_input(opArrayCopy->_length); do_temp(opArrayCopy->_length);
748 assert(opArrayCopy->_tmp->is_valid(), "used"); do_temp(opArrayCopy->_tmp);
749 if (opArrayCopy->_info) do_info(opArrayCopy->_info);
750
751 // the implementation of arraycopy always has a call into the runtime
752 do_call();
753
754 break;
755 }
756
757
758 // LIR_OpLock
759 case lir_lock:
760 case lir_unlock: {
761 assert(op->as_OpLock() != NULL, "must be");
762 LIR_OpLock* opLock = (LIR_OpLock*)op;
763
764 if (opLock->_info) do_info(opLock->_info);
765
766 // TODO: check if these operands really have to be temp
767 // (or if input is sufficient). This may have influence on the oop map!
768 assert(opLock->_lock->is_valid(), "used"); do_temp(opLock->_lock);
769 assert(opLock->_hdr->is_valid(), "used"); do_temp(opLock->_hdr);
770 assert(opLock->_obj->is_valid(), "used"); do_temp(opLock->_obj);
771
772 if (opLock->_scratch->is_valid()) do_temp(opLock->_scratch);
773 assert(opLock->_result->is_illegal(), "unused");
774
775 do_stub(opLock->_stub);
776
777 break;
778 }
779
780
781 // LIR_OpDelay
782 case lir_delay_slot: {
783 assert(op->as_OpDelay() != NULL, "must be");
784 LIR_OpDelay* opDelay = (LIR_OpDelay*)op;
785
786 visit(opDelay->delay_op());
787 break;
788 }
789
790 // LIR_OpTypeCheck
791 case lir_instanceof:
792 case lir_checkcast:
793 case lir_store_check: {
794 assert(op->as_OpTypeCheck() != NULL, "must be");
795 LIR_OpTypeCheck* opTypeCheck = (LIR_OpTypeCheck*)op;
796
797 if (opTypeCheck->_info_for_exception) do_info(opTypeCheck->_info_for_exception);
798 if (opTypeCheck->_info_for_patch) do_info(opTypeCheck->_info_for_patch);
799 if (opTypeCheck->_object->is_valid()) do_input(opTypeCheck->_object);
800 if (opTypeCheck->_array->is_valid()) do_input(opTypeCheck->_array);
801 if (opTypeCheck->_tmp1->is_valid()) do_temp(opTypeCheck->_tmp1);
802 if (opTypeCheck->_tmp2->is_valid()) do_temp(opTypeCheck->_tmp2);
803 if (opTypeCheck->_tmp3->is_valid()) do_temp(opTypeCheck->_tmp3);
804 if (opTypeCheck->_result->is_valid()) do_output(opTypeCheck->_result);
805 do_stub(opTypeCheck->_stub);
806 break;
807 }
808
809 // LIR_OpCompareAndSwap
810 case lir_cas_long:
811 case lir_cas_obj:
812 case lir_cas_int: {
813 assert(op->as_OpCompareAndSwap() != NULL, "must be");
814 LIR_OpCompareAndSwap* opCompareAndSwap = (LIR_OpCompareAndSwap*)op;
815
816 if (opCompareAndSwap->_info) do_info(opCompareAndSwap->_info);
817 if (opCompareAndSwap->_addr->is_valid()) do_input(opCompareAndSwap->_addr);
818 if (opCompareAndSwap->_cmp_value->is_valid()) do_input(opCompareAndSwap->_cmp_value);
819 if (opCompareAndSwap->_new_value->is_valid()) do_input(opCompareAndSwap->_new_value);
820 if (opCompareAndSwap->_tmp1->is_valid()) do_temp(opCompareAndSwap->_tmp1);
821 if (opCompareAndSwap->_tmp2->is_valid()) do_temp(opCompareAndSwap->_tmp2);
822 if (opCompareAndSwap->_result->is_valid()) do_output(opCompareAndSwap->_result);
823
824 break;
825 }
826
827
828 // LIR_OpAllocArray;
829 case lir_alloc_array: {
830 assert(op->as_OpAllocArray() != NULL, "must be");
831 LIR_OpAllocArray* opAllocArray = (LIR_OpAllocArray*)op;
832
833 if (opAllocArray->_info) do_info(opAllocArray->_info);
834 if (opAllocArray->_klass->is_valid()) do_input(opAllocArray->_klass); do_temp(opAllocArray->_klass);
835 if (opAllocArray->_len->is_valid()) do_input(opAllocArray->_len); do_temp(opAllocArray->_len);
836 if (opAllocArray->_tmp1->is_valid()) do_temp(opAllocArray->_tmp1);
837 if (opAllocArray->_tmp2->is_valid()) do_temp(opAllocArray->_tmp2);
838 if (opAllocArray->_tmp3->is_valid()) do_temp(opAllocArray->_tmp3);
839 if (opAllocArray->_tmp4->is_valid()) do_temp(opAllocArray->_tmp4);
840 if (opAllocArray->_result->is_valid()) do_output(opAllocArray->_result);
841 do_stub(opAllocArray->_stub);
842 break;
843 }
844
845 // LIR_OpProfileCall:
846 case lir_profile_call: {
847 assert(op->as_OpProfileCall() != NULL, "must be");
848 LIR_OpProfileCall* opProfileCall = (LIR_OpProfileCall*)op;
849
850 if (opProfileCall->_recv->is_valid()) do_temp(opProfileCall->_recv);
851 assert(opProfileCall->_mdo->is_valid(), "used"); do_temp(opProfileCall->_mdo);
852 assert(opProfileCall->_tmp1->is_valid(), "used"); do_temp(opProfileCall->_tmp1);
853 break;
854 }
855
856 default:
857 ShouldNotReachHere();
858 }
859 }
860
861
862 void LIR_OpVisitState::do_stub(CodeStub* stub) {
863 if (stub != NULL) {
864 stub->visit(this);
865 }
866 }
867
868 XHandlers* LIR_OpVisitState::all_xhandler() {
869 XHandlers* result = NULL;
870
871 int i;
872 for (i = 0; i < info_count(); i++) {
873 if (info_at(i)->exception_handlers() != NULL) {
874 result = info_at(i)->exception_handlers();
875 break;
876 }
877 }
878
879 #ifdef ASSERT
880 for (i = 0; i < info_count(); i++) {
881 assert(info_at(i)->exception_handlers() == NULL ||
882 info_at(i)->exception_handlers() == result,
883 "only one xhandler list allowed per LIR-operation");
884 }
885 #endif
886
887 if (result != NULL) {
888 return result;
889 } else {
890 return new XHandlers();
891 }
892
893 return result;
894 }
895
896
897 #ifdef ASSERT
898 bool LIR_OpVisitState::no_operands(LIR_Op* op) {
899 visit(op);
900
901 return opr_count(inputMode) == 0 &&
902 opr_count(outputMode) == 0 &&
903 opr_count(tempMode) == 0 &&
904 info_count() == 0 &&
905 !has_call() &&
906 !has_slow_case();
907 }
908 #endif
909
910 //---------------------------------------------------
911
912
913 void LIR_OpJavaCall::emit_code(LIR_Assembler* masm) {
914 masm->emit_call(this);
915 }
916
917 void LIR_OpRTCall::emit_code(LIR_Assembler* masm) {
918 masm->emit_rtcall(this);
919 }
920
921 void LIR_OpLabel::emit_code(LIR_Assembler* masm) {
922 masm->emit_opLabel(this);
923 }
924
925 void LIR_OpArrayCopy::emit_code(LIR_Assembler* masm) {
926 masm->emit_arraycopy(this);
927 masm->emit_code_stub(stub());
928 }
929
930 void LIR_Op0::emit_code(LIR_Assembler* masm) {
931 masm->emit_op0(this);
932 }
933
934 void LIR_Op1::emit_code(LIR_Assembler* masm) {
935 masm->emit_op1(this);
936 }
937
938 void LIR_OpAllocObj::emit_code(LIR_Assembler* masm) {
939 masm->emit_alloc_obj(this);
940 masm->emit_code_stub(stub());
941 }
942
943 void LIR_OpBranch::emit_code(LIR_Assembler* masm) {
944 masm->emit_opBranch(this);
945 if (stub()) {
946 masm->emit_code_stub(stub());
947 }
948 }
949
950 void LIR_OpConvert::emit_code(LIR_Assembler* masm) {
951 masm->emit_opConvert(this);
952 if (stub() != NULL) {
953 masm->emit_code_stub(stub());
954 }
955 }
956
957 void LIR_Op2::emit_code(LIR_Assembler* masm) {
958 masm->emit_op2(this);
959 }
960
961 void LIR_OpAllocArray::emit_code(LIR_Assembler* masm) {
962 masm->emit_alloc_array(this);
963 masm->emit_code_stub(stub());
964 }
965
966 void LIR_OpTypeCheck::emit_code(LIR_Assembler* masm) {
967 masm->emit_opTypeCheck(this);
968 if (stub()) {
969 masm->emit_code_stub(stub());
970 }
971 }
972
973 void LIR_OpCompareAndSwap::emit_code(LIR_Assembler* masm) {
974 masm->emit_compare_and_swap(this);
975 }
976
977 void LIR_Op3::emit_code(LIR_Assembler* masm) {
978 masm->emit_op3(this);
979 }
980
981 void LIR_OpLock::emit_code(LIR_Assembler* masm) {
982 masm->emit_lock(this);
983 if (stub()) {
984 masm->emit_code_stub(stub());
985 }
986 }
987
988
989 void LIR_OpDelay::emit_code(LIR_Assembler* masm) {
990 masm->emit_delay(this);
991 }
992
993
994 void LIR_OpProfileCall::emit_code(LIR_Assembler* masm) {
995 masm->emit_profile_call(this);
996 }
997
998
999 // LIR_List
1000 LIR_List::LIR_List(Compilation* compilation, BlockBegin* block)
1001 : _operations(8)
1002 , _compilation(compilation)
1003 #ifndef PRODUCT
1004 , _block(block)
1005 #endif
1006 #ifdef ASSERT
1007 , _file(NULL)
1008 , _line(0)
1009 #endif
1010 { }
1011
1012
1013 #ifdef ASSERT
1014 void LIR_List::set_file_and_line(const char * file, int line) {
1015 const char * f = strrchr(file, '/');
1016 if (f == NULL) f = strrchr(file, '\\');
1017 if (f == NULL) {
1018 f = file;
1019 } else {
1020 f++;
1021 }
1022 _file = f;
1023 _line = line;
1024 }
1025 #endif
1026
1027
1028 void LIR_List::append(LIR_InsertionBuffer* buffer) {
1029 assert(this == buffer->lir_list(), "wrong lir list");
1030 const int n = _operations.length();
1031
1032 if (buffer->number_of_ops() > 0) {
1033 // increase size of instructions list
1034 _operations.at_grow(n + buffer->number_of_ops() - 1, NULL);
1035 // insert ops from buffer into instructions list
1036 int op_index = buffer->number_of_ops() - 1;
1037 int ip_index = buffer->number_of_insertion_points() - 1;
1038 int from_index = n - 1;
1039 int to_index = _operations.length() - 1;
1040 for (; ip_index >= 0; ip_index --) {
1041 int index = buffer->index_at(ip_index);
1042 // make room after insertion point
1043 while (index < from_index) {
1044 _operations.at_put(to_index --, _operations.at(from_index --));
1045 }
1046 // insert ops from buffer
1047 for (int i = buffer->count_at(ip_index); i > 0; i --) {
1048 _operations.at_put(to_index --, buffer->op_at(op_index --));
1049 }
1050 }
1051 }
1052
1053 buffer->finish();
1054 }
1055
1056
1057 void LIR_List::oop2reg_patch(jobject o, LIR_Opr reg, CodeEmitInfo* info) {
1058 append(new LIR_Op1(lir_move, LIR_OprFact::oopConst(o), reg, T_OBJECT, lir_patch_normal, info));
1059 }
1060
1061
1062 void LIR_List::load(LIR_Address* addr, LIR_Opr src, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1063 append(new LIR_Op1(
1064 lir_move,
1065 LIR_OprFact::address(addr),
1066 src,
1067 addr->type(),
1068 patch_code,
1069 info));
1070 }
1071
1072
1073 void LIR_List::volatile_load_mem_reg(LIR_Address* address, LIR_Opr dst, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1074 append(new LIR_Op1(
1075 lir_move,
1076 LIR_OprFact::address(address),
1077 dst,
1078 address->type(),
1079 patch_code,
1080 info, lir_move_volatile));
1081 }
1082
1083 void LIR_List::volatile_load_unsafe_reg(LIR_Opr base, LIR_Opr offset, LIR_Opr dst, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1084 append(new LIR_Op1(
1085 lir_move,
1086 LIR_OprFact::address(new LIR_Address(base, offset, type)),
1087 dst,
1088 type,
1089 patch_code,
1090 info, lir_move_volatile));
1091 }
1092
1093
1094 void LIR_List::prefetch(LIR_Address* addr, bool is_store) {
1095 append(new LIR_Op1(
1096 is_store ? lir_prefetchw : lir_prefetchr,
1097 LIR_OprFact::address(addr)));
1098 }
1099
1100
1101 void LIR_List::store_mem_int(jint v, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1102 append(new LIR_Op1(
1103 lir_move,
1104 LIR_OprFact::intConst(v),
1105 LIR_OprFact::address(new LIR_Address(base, offset_in_bytes, type)),
1106 type,
1107 patch_code,
1108 info));
1109 }
1110
1111
1112 void LIR_List::store_mem_oop(jobject o, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1113 append(new LIR_Op1(
1114 lir_move,
1115 LIR_OprFact::oopConst(o),
1116 LIR_OprFact::address(new LIR_Address(base, offset_in_bytes, type)),
1117 type,
1118 patch_code,
1119 info));
1120 }
1121
1122
1123 void LIR_List::store(LIR_Opr src, LIR_Address* addr, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1124 append(new LIR_Op1(
1125 lir_move,
1126 src,
1127 LIR_OprFact::address(addr),
1128 addr->type(),
1129 patch_code,
1130 info));
1131 }
1132
1133
1134 void LIR_List::volatile_store_mem_reg(LIR_Opr src, LIR_Address* addr, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1135 append(new LIR_Op1(
1136 lir_move,
1137 src,
1138 LIR_OprFact::address(addr),
1139 addr->type(),
1140 patch_code,
1141 info,
1142 lir_move_volatile));
1143 }
1144
1145 void LIR_List::volatile_store_unsafe_reg(LIR_Opr src, LIR_Opr base, LIR_Opr offset, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1146 append(new LIR_Op1(
1147 lir_move,
1148 src,
1149 LIR_OprFact::address(new LIR_Address(base, offset, type)),
1150 type,
1151 patch_code,
1152 info, lir_move_volatile));
1153 }
1154
1155
1156 void LIR_List::idiv(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) {
1157 append(new LIR_Op3(
1158 lir_idiv,
1159 left,
1160 right,
1161 tmp,
1162 res,
1163 info));
1164 }
1165
1166
1167 void LIR_List::idiv(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) {
1168 append(new LIR_Op3(
1169 lir_idiv,
1170 left,
1171 LIR_OprFact::intConst(right),
1172 tmp,
1173 res,
1174 info));
1175 }
1176
1177
1178 void LIR_List::irem(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) {
1179 append(new LIR_Op3(
1180 lir_irem,
1181 left,
1182 right,
1183 tmp,
1184 res,
1185 info));
1186 }
1187
1188
1189 void LIR_List::irem(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) {
1190 append(new LIR_Op3(
1191 lir_irem,
1192 left,
1193 LIR_OprFact::intConst(right),
1194 tmp,
1195 res,
1196 info));
1197 }
1198
1199
1200 void LIR_List::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) {
1201 append(new LIR_Op2(
1202 lir_cmp,
1203 condition,
1204 LIR_OprFact::address(new LIR_Address(base, disp, T_INT)),
1205 LIR_OprFact::intConst(c),
1206 info));
1207 }
1208
1209
1210 void LIR_List::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Address* addr, CodeEmitInfo* info) {
1211 append(new LIR_Op2(
1212 lir_cmp,
1213 condition,
1214 reg,
1215 LIR_OprFact::address(addr),
1216 info));
1217 }
1218
1219 void LIR_List::allocate_object(LIR_Opr dst, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4,
1220 int header_size, int object_size, LIR_Opr klass, bool init_check, CodeStub* stub) {
1221 append(new LIR_OpAllocObj(
1222 klass,
1223 dst,
1224 t1,
1225 t2,
1226 t3,
1227 t4,
1228 header_size,
1229 object_size,
1230 init_check,
1231 stub));
1232 }
1233
1234 void LIR_List::allocate_array(LIR_Opr dst, LIR_Opr len, LIR_Opr t1,LIR_Opr t2, LIR_Opr t3,LIR_Opr t4, BasicType type, LIR_Opr klass, CodeStub* stub) {
1235 append(new LIR_OpAllocArray(
1236 klass,
1237 len,
1238 dst,
1239 t1,
1240 t2,
1241 t3,
1242 t4,
1243 type,
1244 stub));
1245 }
1246
1247 void LIR_List::shift_left(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) {
1248 append(new LIR_Op2(
1249 lir_shl,
1250 value,
1251 count,
1252 dst,
1253 tmp));
1254 }
1255
1256 void LIR_List::shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) {
1257 append(new LIR_Op2(
1258 lir_shr,
1259 value,
1260 count,
1261 dst,
1262 tmp));
1263 }
1264
1265
1266 void LIR_List::unsigned_shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) {
1267 append(new LIR_Op2(
1268 lir_ushr,
1269 value,
1270 count,
1271 dst,
1272 tmp));
1273 }
1274
1275 void LIR_List::fcmp2int(LIR_Opr left, LIR_Opr right, LIR_Opr dst, bool is_unordered_less) {
1276 append(new LIR_Op2(is_unordered_less ? lir_ucmp_fd2i : lir_cmp_fd2i,
1277 left,
1278 right,
1279 dst));
1280 }
1281
1282 void LIR_List::lock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub, CodeEmitInfo* info) {
1283 append(new LIR_OpLock(
1284 lir_lock,
1285 hdr,
1286 obj,
1287 lock,
1288 scratch,
1289 stub,
1290 info));
1291 }
1292
1293 void LIR_List::unlock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, CodeStub* stub) {
1294 append(new LIR_OpLock(
1295 lir_unlock,
1296 hdr,
1297 obj,
1298 lock,
1299 LIR_OprFact::illegalOpr,
1300 stub,
1301 NULL));
1302 }
1303
1304
1305 void check_LIR() {
1306 // cannot do the proper checking as PRODUCT and other modes return different results
1307 // guarantee(sizeof(LIR_OprDesc) == wordSize, "may not have a v-table");
1308 }
1309
1310
1311
1312 void LIR_List::checkcast (LIR_Opr result, LIR_Opr object, ciKlass* klass,
1313 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check,
1314 CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, CodeStub* stub,
1315 ciMethod* profiled_method, int profiled_bci) {
1316 append(new LIR_OpTypeCheck(lir_checkcast, result, object, klass,
1317 tmp1, tmp2, tmp3, fast_check, info_for_exception, info_for_patch, stub,
1318 profiled_method, profiled_bci));
1319 }
1320
1321
1322 void LIR_List::instanceof(LIR_Opr result, LIR_Opr object, ciKlass* klass, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check, CodeEmitInfo* info_for_patch) {
1323 append(new LIR_OpTypeCheck(lir_instanceof, result, object, klass, tmp1, tmp2, tmp3, fast_check, NULL, info_for_patch, NULL, NULL, 0));
1324 }
1325
1326
1327 void LIR_List::store_check(LIR_Opr object, LIR_Opr array, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, CodeEmitInfo* info_for_exception) {
1328 append(new LIR_OpTypeCheck(lir_store_check, object, array, tmp1, tmp2, tmp3, info_for_exception, NULL, 0));
1329 }
1330
1331
1332 void LIR_List::cas_long(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, LIR_Opr t1, LIR_Opr t2) {
1333 // Compare and swap produces condition code "zero" if contents_of(addr) == cmp_value,
1334 // implying successful swap of new_value into addr
1335 append(new LIR_OpCompareAndSwap(lir_cas_long, addr, cmp_value, new_value, t1, t2));
1336 }
1337
1338 void LIR_List::cas_obj(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, LIR_Opr t1, LIR_Opr t2) {
1339 // Compare and swap produces condition code "zero" if contents_of(addr) == cmp_value,
1340 // implying successful swap of new_value into addr
1341 append(new LIR_OpCompareAndSwap(lir_cas_obj, addr, cmp_value, new_value, t1, t2));
1342 }
1343
1344 void LIR_List::cas_int(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, LIR_Opr t1, LIR_Opr t2) {
1345 // Compare and swap produces condition code "zero" if contents_of(addr) == cmp_value,
1346 // implying successful swap of new_value into addr
1347 append(new LIR_OpCompareAndSwap(lir_cas_int, addr, cmp_value, new_value, t1, t2));
1348 }
1349
1350
1351 #ifdef PRODUCT
1352
1353 void print_LIR(BlockList* blocks) {
1354 }
1355
1356 #else
1357 // LIR_OprDesc
1358 void LIR_OprDesc::print() const {
1359 print(tty);
1360 }
1361
1362 void LIR_OprDesc::print(outputStream* out) const {
1363 if (is_illegal()) {
1364 return;
1365 }
1366
1367 out->print("[");
1368 if (is_pointer()) {
1369 pointer()->print_value_on(out);
1370 } else if (is_single_stack()) {
1371 out->print("stack:%d", single_stack_ix());
1372 } else if (is_double_stack()) {
1373 out->print("dbl_stack:%d",double_stack_ix());
1374 } else if (is_virtual()) {
1375 out->print("R%d", vreg_number());
1376 } else if (is_single_cpu()) {
1377 out->print(as_register()->name());
1378 } else if (is_double_cpu()) {
1379 out->print(as_register_hi()->name());
1380 out->print(as_register_lo()->name());
1381 #if defined(X86)
1382 } else if (is_single_xmm()) {
1383 out->print(as_xmm_float_reg()->name());
1384 } else if (is_double_xmm()) {
1385 out->print(as_xmm_double_reg()->name());
1386 } else if (is_single_fpu()) {
1387 out->print("fpu%d", fpu_regnr());
1388 } else if (is_double_fpu()) {
1389 out->print("fpu%d", fpu_regnrLo());
1390 #else
1391 } else if (is_single_fpu()) {
1392 out->print(as_float_reg()->name());
1393 } else if (is_double_fpu()) {
1394 out->print(as_double_reg()->name());
1395 #endif
1396
1397 } else if (is_illegal()) {
1398 out->print("-");
1399 } else {
1400 out->print("Unknown Operand");
1401 }
1402 if (!is_illegal()) {
1403 out->print("|%c", type_char());
1404 }
1405 if (is_register() && is_last_use()) {
1406 out->print("(last_use)");
1407 }
1408 out->print("]");
1409 }
1410
1411
1412 // LIR_Address
1413 void LIR_Const::print_value_on(outputStream* out) const {
1414 switch (type()) {
1415 case T_INT: out->print("int:%d", as_jint()); break;
1416 case T_LONG: out->print("lng:%lld", as_jlong()); break;
1417 case T_FLOAT: out->print("flt:%f", as_jfloat()); break;
1418 case T_DOUBLE: out->print("dbl:%f", as_jdouble()); break;
1419 case T_OBJECT: out->print("obj:0x%x", as_jobject()); break;
1420 default: out->print("%3d:0x%x",type(), as_jdouble()); break;
1421 }
1422 }
1423
1424 // LIR_Address
1425 void LIR_Address::print_value_on(outputStream* out) const {
1426 out->print("Base:"); _base->print(out);
1427 if (!_index->is_illegal()) {
1428 out->print(" Index:"); _index->print(out);
1429 switch (scale()) {
1430 case times_1: break;
1431 case times_2: out->print(" * 2"); break;
1432 case times_4: out->print(" * 4"); break;
1433 case times_8: out->print(" * 8"); break;
1434 }
1435 }
1436 out->print(" Disp: %d", _disp);
1437 }
1438
1439 // debug output of block header without InstructionPrinter
1440 // (because phi functions are not necessary for LIR)
1441 static void print_block(BlockBegin* x) {
1442 // print block id
1443 BlockEnd* end = x->end();
1444 tty->print("B%d ", x->block_id());
1445
1446 // print flags
1447 if (x->is_set(BlockBegin::std_entry_flag)) tty->print("std ");
1448 if (x->is_set(BlockBegin::osr_entry_flag)) tty->print("osr ");
1449 if (x->is_set(BlockBegin::exception_entry_flag)) tty->print("ex ");
1450 if (x->is_set(BlockBegin::subroutine_entry_flag)) tty->print("jsr ");
1451 if (x->is_set(BlockBegin::backward_branch_target_flag)) tty->print("bb ");
1452 if (x->is_set(BlockBegin::linear_scan_loop_header_flag)) tty->print("lh ");
1453 if (x->is_set(BlockBegin::linear_scan_loop_end_flag)) tty->print("le ");
1454
1455 // print block bci range
1456 tty->print("[%d, %d] ", x->bci(), (end == NULL ? -1 : end->bci()));
1457
1458 // print predecessors and successors
1459 if (x->number_of_preds() > 0) {
1460 tty->print("preds: ");
1461 for (int i = 0; i < x->number_of_preds(); i ++) {
1462 tty->print("B%d ", x->pred_at(i)->block_id());
1463 }
1464 }
1465
1466 if (x->number_of_sux() > 0) {
1467 tty->print("sux: ");
1468 for (int i = 0; i < x->number_of_sux(); i ++) {
1469 tty->print("B%d ", x->sux_at(i)->block_id());
1470 }
1471 }
1472
1473 // print exception handlers
1474 if (x->number_of_exception_handlers() > 0) {
1475 tty->print("xhandler: ");
1476 for (int i = 0; i < x->number_of_exception_handlers(); i++) {
1477 tty->print("B%d ", x->exception_handler_at(i)->block_id());
1478 }
1479 }
1480
1481 tty->cr();
1482 }
1483
1484 void print_LIR(BlockList* blocks) {
1485 tty->print_cr("LIR:");
1486 int i;
1487 for (i = 0; i < blocks->length(); i++) {
1488 BlockBegin* bb = blocks->at(i);
1489 print_block(bb);
1490 tty->print("__id_Instruction___________________________________________"); tty->cr();
1491 bb->lir()->print_instructions();
1492 }
1493 }
1494
1495 void LIR_List::print_instructions() {
1496 for (int i = 0; i < _operations.length(); i++) {
1497 _operations.at(i)->print(); tty->cr();
1498 }
1499 tty->cr();
1500 }
1501
1502 // LIR_Ops printing routines
1503 // LIR_Op
1504 void LIR_Op::print_on(outputStream* out) const {
1505 if (id() != -1 || PrintCFGToFile) {
1506 out->print("%4d ", id());
1507 } else {
1508 out->print(" ");
1509 }
1510 out->print(name()); out->print(" ");
1511 print_instr(out);
1512 if (info() != NULL) out->print(" [bci:%d]", info()->bci());
1513 #ifdef ASSERT
1514 if (Verbose && _file != NULL) {
1515 out->print(" (%s:%d)", _file, _line);
1516 }
1517 #endif
1518 }
1519
1520 const char * LIR_Op::name() const {
1521 const char* s = NULL;
1522 switch(code()) {
1523 // LIR_Op0
1524 case lir_membar: s = "membar"; break;
1525 case lir_membar_acquire: s = "membar_acquire"; break;
1526 case lir_membar_release: s = "membar_release"; break;
1527 case lir_word_align: s = "word_align"; break;
1528 case lir_label: s = "label"; break;
1529 case lir_nop: s = "nop"; break;
1530 case lir_backwardbranch_target: s = "backbranch"; break;
1531 case lir_std_entry: s = "std_entry"; break;
1532 case lir_osr_entry: s = "osr_entry"; break;
1533 case lir_build_frame: s = "build_frm"; break;
1534 case lir_fpop_raw: s = "fpop_raw"; break;
1535 case lir_24bit_FPU: s = "24bit_FPU"; break;
1536 case lir_reset_FPU: s = "reset_FPU"; break;
1537 case lir_breakpoint: s = "breakpoint"; break;
1538 case lir_get_thread: s = "get_thread"; break;
1539 // LIR_Op1
1540 case lir_fxch: s = "fxch"; break;
1541 case lir_fld: s = "fld"; break;
1542 case lir_ffree: s = "ffree"; break;
1543 case lir_push: s = "push"; break;
1544 case lir_pop: s = "pop"; break;
1545 case lir_null_check: s = "null_check"; break;
1546 case lir_return: s = "return"; break;
1547 case lir_safepoint: s = "safepoint"; break;
1548 case lir_neg: s = "neg"; break;
1549 case lir_leal: s = "leal"; break;
1550 case lir_branch: s = "branch"; break;
1551 case lir_cond_float_branch: s = "flt_cond_br"; break;
1552 case lir_move: s = "move"; break;
1553 case lir_roundfp: s = "roundfp"; break;
1554 case lir_rtcall: s = "rtcall"; break;
1555 case lir_throw: s = "throw"; break;
1556 case lir_unwind: s = "unwind"; break;
1557 case lir_convert: s = "convert"; break;
1558 case lir_alloc_object: s = "alloc_obj"; break;
1559 case lir_monaddr: s = "mon_addr"; break;
1560 // LIR_Op2
1561 case lir_cmp: s = "cmp"; break;
1562 case lir_cmp_l2i: s = "cmp_l2i"; break;
1563 case lir_ucmp_fd2i: s = "ucomp_fd2i"; break;
1564 case lir_cmp_fd2i: s = "comp_fd2i"; break;
1565 case lir_cmove: s = "cmove"; break;
1566 case lir_add: s = "add"; break;
1567 case lir_sub: s = "sub"; break;
1568 case lir_mul: s = "mul"; break;
1569 case lir_mul_strictfp: s = "mul_strictfp"; break;
1570 case lir_div: s = "div"; break;
1571 case lir_div_strictfp: s = "div_strictfp"; break;
1572 case lir_rem: s = "rem"; break;
1573 case lir_abs: s = "abs"; break;
1574 case lir_sqrt: s = "sqrt"; break;
1575 case lir_sin: s = "sin"; break;
1576 case lir_cos: s = "cos"; break;
1577 case lir_tan: s = "tan"; break;
1578 case lir_log: s = "log"; break;
1579 case lir_log10: s = "log10"; break;
1580 case lir_logic_and: s = "logic_and"; break;
1581 case lir_logic_or: s = "logic_or"; break;
1582 case lir_logic_xor: s = "logic_xor"; break;
1583 case lir_shl: s = "shift_left"; break;
1584 case lir_shr: s = "shift_right"; break;
1585 case lir_ushr: s = "ushift_right"; break;
1586 case lir_alloc_array: s = "alloc_array"; break;
1587 // LIR_Op3
1588 case lir_idiv: s = "idiv"; break;
1589 case lir_irem: s = "irem"; break;
1590 // LIR_OpJavaCall
1591 case lir_static_call: s = "static"; break;
1592 case lir_optvirtual_call: s = "optvirtual"; break;
1593 case lir_icvirtual_call: s = "icvirtual"; break;
1594 case lir_virtual_call: s = "virtual"; break;
1595 // LIR_OpArrayCopy
1596 case lir_arraycopy: s = "arraycopy"; break;
1597 // LIR_OpLock
1598 case lir_lock: s = "lock"; break;
1599 case lir_unlock: s = "unlock"; break;
1600 // LIR_OpDelay
1601 case lir_delay_slot: s = "delay"; break;
1602 // LIR_OpTypeCheck
1603 case lir_instanceof: s = "instanceof"; break;
1604 case lir_checkcast: s = "checkcast"; break;
1605 case lir_store_check: s = "store_check"; break;
1606 // LIR_OpCompareAndSwap
1607 case lir_cas_long: s = "cas_long"; break;
1608 case lir_cas_obj: s = "cas_obj"; break;
1609 case lir_cas_int: s = "cas_int"; break;
1610 // LIR_OpProfileCall
1611 case lir_profile_call: s = "profile_call"; break;
1612
1613 case lir_none: ShouldNotReachHere();break;
1614 default: s = "illegal_op"; break;
1615 }
1616 return s;
1617 }
1618
1619 // LIR_OpJavaCall
1620 void LIR_OpJavaCall::print_instr(outputStream* out) const {
1621 out->print("call: ");
1622 out->print("[addr: 0x%x]", address());
1623 if (receiver()->is_valid()) {
1624 out->print(" [recv: "); receiver()->print(out); out->print("]");
1625 }
1626 if (result_opr()->is_valid()) {
1627 out->print(" [result: "); result_opr()->print(out); out->print("]");
1628 }
1629 }
1630
1631 // LIR_OpLabel
1632 void LIR_OpLabel::print_instr(outputStream* out) const {
1633 out->print("[label:0x%x]", _label);
1634 }
1635
1636 // LIR_OpArrayCopy
1637 void LIR_OpArrayCopy::print_instr(outputStream* out) const {
1638 src()->print(out); out->print(" ");
1639 src_pos()->print(out); out->print(" ");
1640 dst()->print(out); out->print(" ");
1641 dst_pos()->print(out); out->print(" ");
1642 length()->print(out); out->print(" ");
1643 tmp()->print(out); out->print(" ");
1644 }
1645
1646 // LIR_OpCompareAndSwap
1647 void LIR_OpCompareAndSwap::print_instr(outputStream* out) const {
1648 addr()->print(out); out->print(" ");
1649 cmp_value()->print(out); out->print(" ");
1650 new_value()->print(out); out->print(" ");
1651 tmp1()->print(out); out->print(" ");
1652 tmp2()->print(out); out->print(" ");
1653
1654 }
1655
1656 // LIR_Op0
1657 void LIR_Op0::print_instr(outputStream* out) const {
1658 result_opr()->print(out);
1659 }
1660
1661 // LIR_Op1
1662 const char * LIR_Op1::name() const {
1663 if (code() == lir_move) {
1664 switch (move_kind()) {
1665 case lir_move_normal:
1666 return "move";
1667 case lir_move_unaligned:
1668 return "unaligned move";
1669 case lir_move_volatile:
1670 return "volatile_move";
1671 default:
1672 ShouldNotReachHere();
1673 return "illegal_op";
1674 }
1675 } else {
1676 return LIR_Op::name();
1677 }
1678 }
1679
1680
1681 void LIR_Op1::print_instr(outputStream* out) const {
1682 _opr->print(out); out->print(" ");
1683 result_opr()->print(out); out->print(" ");
1684 print_patch_code(out, patch_code());
1685 }
1686
1687
1688 // LIR_Op1
1689 void LIR_OpRTCall::print_instr(outputStream* out) const {
1690 intx a = (intx)addr();
1691 out->print(Runtime1::name_for_address(addr()));
1692 out->print(" ");
1693 tmp()->print(out);
1694 }
1695
1696 void LIR_Op1::print_patch_code(outputStream* out, LIR_PatchCode code) {
1697 switch(code) {
1698 case lir_patch_none: break;
1699 case lir_patch_low: out->print("[patch_low]"); break;
1700 case lir_patch_high: out->print("[patch_high]"); break;
1701 case lir_patch_normal: out->print("[patch_normal]"); break;
1702 default: ShouldNotReachHere();
1703 }
1704 }
1705
1706 // LIR_OpBranch
1707 void LIR_OpBranch::print_instr(outputStream* out) const {
1708 print_condition(out, cond()); out->print(" ");
1709 if (block() != NULL) {
1710 out->print("[B%d] ", block()->block_id());
1711 } else if (stub() != NULL) {
1712 out->print("[");
1713 stub()->print_name(out);
1714 out->print(": 0x%x]", stub());
1715 if (stub()->info() != NULL) out->print(" [bci:%d]", stub()->info()->bci());
1716 } else {
1717 out->print("[label:0x%x] ", label());
1718 }
1719 if (ublock() != NULL) {
1720 out->print("unordered: [B%d] ", ublock()->block_id());
1721 }
1722 }
1723
1724 void LIR_Op::print_condition(outputStream* out, LIR_Condition cond) {
1725 switch(cond) {
1726 case lir_cond_equal: out->print("[EQ]"); break;
1727 case lir_cond_notEqual: out->print("[NE]"); break;
1728 case lir_cond_less: out->print("[LT]"); break;
1729 case lir_cond_lessEqual: out->print("[LE]"); break;
1730 case lir_cond_greaterEqual: out->print("[GE]"); break;
1731 case lir_cond_greater: out->print("[GT]"); break;
1732 case lir_cond_belowEqual: out->print("[BE]"); break;
1733 case lir_cond_aboveEqual: out->print("[AE]"); break;
1734 case lir_cond_always: out->print("[AL]"); break;
1735 default: out->print("[%d]",cond); break;
1736 }
1737 }
1738
1739 // LIR_OpConvert
1740 void LIR_OpConvert::print_instr(outputStream* out) const {
1741 print_bytecode(out, bytecode());
1742 in_opr()->print(out); out->print(" ");
1743 result_opr()->print(out); out->print(" ");
1744 }
1745
1746 void LIR_OpConvert::print_bytecode(outputStream* out, Bytecodes::Code code) {
1747 switch(code) {
1748 case Bytecodes::_d2f: out->print("[d2f] "); break;
1749 case Bytecodes::_d2i: out->print("[d2i] "); break;
1750 case Bytecodes::_d2l: out->print("[d2l] "); break;
1751 case Bytecodes::_f2d: out->print("[f2d] "); break;
1752 case Bytecodes::_f2i: out->print("[f2i] "); break;
1753 case Bytecodes::_f2l: out->print("[f2l] "); break;
1754 case Bytecodes::_i2b: out->print("[i2b] "); break;
1755 case Bytecodes::_i2c: out->print("[i2c] "); break;
1756 case Bytecodes::_i2d: out->print("[i2d] "); break;
1757 case Bytecodes::_i2f: out->print("[i2f] "); break;
1758 case Bytecodes::_i2l: out->print("[i2l] "); break;
1759 case Bytecodes::_i2s: out->print("[i2s] "); break;
1760 case Bytecodes::_l2i: out->print("[l2i] "); break;
1761 case Bytecodes::_l2f: out->print("[l2f] "); break;
1762 case Bytecodes::_l2d: out->print("[l2d] "); break;
1763 default:
1764 out->print("[?%d]",code);
1765 break;
1766 }
1767 }
1768
1769 void LIR_OpAllocObj::print_instr(outputStream* out) const {
1770 klass()->print(out); out->print(" ");
1771 obj()->print(out); out->print(" ");
1772 tmp1()->print(out); out->print(" ");
1773 tmp2()->print(out); out->print(" ");
1774 tmp3()->print(out); out->print(" ");
1775 tmp4()->print(out); out->print(" ");
1776 out->print("[hdr:%d]", header_size()); out->print(" ");
1777 out->print("[obj:%d]", object_size()); out->print(" ");
1778 out->print("[lbl:0x%x]", stub()->entry());
1779 }
1780
1781 void LIR_OpRoundFP::print_instr(outputStream* out) const {
1782 _opr->print(out); out->print(" ");
1783 tmp()->print(out); out->print(" ");
1784 result_opr()->print(out); out->print(" ");
1785 }
1786
1787 // LIR_Op2
1788 void LIR_Op2::print_instr(outputStream* out) const {
1789 if (code() == lir_cmove) {
1790 print_condition(out, condition()); out->print(" ");
1791 }
1792 in_opr1()->print(out); out->print(" ");
1793 in_opr2()->print(out); out->print(" ");
1794 if (tmp_opr()->is_valid()) { tmp_opr()->print(out); out->print(" "); }
1795 result_opr()->print(out);
1796 }
1797
1798 void LIR_OpAllocArray::print_instr(outputStream* out) const {
1799 klass()->print(out); out->print(" ");
1800 len()->print(out); out->print(" ");
1801 obj()->print(out); out->print(" ");
1802 tmp1()->print(out); out->print(" ");
1803 tmp2()->print(out); out->print(" ");
1804 tmp3()->print(out); out->print(" ");
1805 tmp4()->print(out); out->print(" ");
1806 out->print("[type:0x%x]", type()); out->print(" ");
1807 out->print("[label:0x%x]", stub()->entry());
1808 }
1809
1810
1811 void LIR_OpTypeCheck::print_instr(outputStream* out) const {
1812 object()->print(out); out->print(" ");
1813 if (code() == lir_store_check) {
1814 array()->print(out); out->print(" ");
1815 }
1816 if (code() != lir_store_check) {
1817 klass()->print_name_on(out); out->print(" ");
1818 if (fast_check()) out->print("fast_check ");
1819 }
1820 tmp1()->print(out); out->print(" ");
1821 tmp2()->print(out); out->print(" ");
1822 tmp3()->print(out); out->print(" ");
1823 result_opr()->print(out); out->print(" ");
1824 if (info_for_exception() != NULL) out->print(" [bci:%d]", info_for_exception()->bci());
1825 }
1826
1827
1828 // LIR_Op3
1829 void LIR_Op3::print_instr(outputStream* out) const {
1830 in_opr1()->print(out); out->print(" ");
1831 in_opr2()->print(out); out->print(" ");
1832 in_opr3()->print(out); out->print(" ");
1833 result_opr()->print(out);
1834 }
1835
1836
1837 void LIR_OpLock::print_instr(outputStream* out) const {
1838 hdr_opr()->print(out); out->print(" ");
1839 obj_opr()->print(out); out->print(" ");
1840 lock_opr()->print(out); out->print(" ");
1841 if (_scratch->is_valid()) {
1842 _scratch->print(out); out->print(" ");
1843 }
1844 out->print("[lbl:0x%x]", stub()->entry());
1845 }
1846
1847
1848 void LIR_OpDelay::print_instr(outputStream* out) const {
1849 _op->print_on(out);
1850 }
1851
1852
1853 // LIR_OpProfileCall
1854 void LIR_OpProfileCall::print_instr(outputStream* out) const {
1855 profiled_method()->name()->print_symbol_on(out);
1856 out->print(".");
1857 profiled_method()->holder()->name()->print_symbol_on(out);
1858 out->print(" @ %d ", profiled_bci());
1859 mdo()->print(out); out->print(" ");
1860 recv()->print(out); out->print(" ");
1861 tmp1()->print(out); out->print(" ");
1862 }
1863
1864
1865 #endif // PRODUCT
1866
1867 // Implementation of LIR_InsertionBuffer
1868
1869 void LIR_InsertionBuffer::append(int index, LIR_Op* op) {
1870 assert(_index_and_count.length() % 2 == 0, "must have a count for each index");
1871
1872 int i = number_of_insertion_points() - 1;
1873 if (i < 0 || index_at(i) < index) {
1874 append_new(index, 1);
1875 } else {
1876 assert(index_at(i) == index, "can append LIR_Ops in ascending order only");
1877 assert(count_at(i) > 0, "check");
1878 set_count_at(i, count_at(i) + 1);
1879 }
1880 _ops.push(op);
1881
1882 DEBUG_ONLY(verify());
1883 }
1884
1885 #ifdef ASSERT
1886 void LIR_InsertionBuffer::verify() {
1887 int sum = 0;
1888 int prev_idx = -1;
1889
1890 for (int i = 0; i < number_of_insertion_points(); i++) {
1891 assert(prev_idx < index_at(i), "index must be ordered ascending");
1892 sum += count_at(i);
1893 }
1894 assert(sum == number_of_ops(), "wrong total sum");
1895 }
1896 #endif