1 #ifdef USE_PRAGMA_IDENT_HDR
2 #pragma ident "@(#)c1_LIR.hpp 1.134 07/06/18 14:25:24 JVM"
3 #endif
4 /*
5 * Copyright 2000-2008 Sun Microsystems, Inc. All Rights Reserved.
6 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
7 *
8 * This code is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License version 2 only, as
10 * published by the Free Software Foundation.
11 *
12 * This code is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 * version 2 for more details (a copy is included in the LICENSE file that
16 * accompanied this code).
17 *
18 * You should have received a copy of the GNU General Public License version
19 * 2 along with this work; if not, write to the Free Software Foundation,
20 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
21 *
22 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
23 * CA 95054 USA or visit www.sun.com if you need additional information or
24 * have any questions.
25 *
26 */
27
28 class BlockBegin;
29 class BlockList;
30 class LIR_Assembler;
31 class CodeEmitInfo;
32 class CodeStub;
33 class CodeStubList;
34 class ArrayCopyStub;
35 class LIR_Op;
36 class ciType;
37 class ValueType;
38 class LIR_OpVisitState;
39 class FpuStackSim;
40
41 //---------------------------------------------------------------------
42 // LIR Operands
43 // LIR_OprDesc
44 // LIR_OprPtr
45 // LIR_Const
46 // LIR_Address
47 //---------------------------------------------------------------------
48 class LIR_OprDesc;
49 class LIR_OprPtr;
50 class LIR_Const;
51 class LIR_Address;
52 class LIR_OprVisitor;
53
54
55 typedef LIR_OprDesc* LIR_Opr;
56 typedef int RegNr;
57
58 define_array(LIR_OprArray, LIR_Opr)
59 define_stack(LIR_OprList, LIR_OprArray)
60
61 define_array(LIR_OprRefArray, LIR_Opr*)
62 define_stack(LIR_OprRefList, LIR_OprRefArray)
63
64 define_array(CodeEmitInfoArray, CodeEmitInfo*)
65 define_stack(CodeEmitInfoList, CodeEmitInfoArray)
66
67 define_array(LIR_OpArray, LIR_Op*)
68 define_stack(LIR_OpList, LIR_OpArray)
69
70 // define LIR_OprPtr early so LIR_OprDesc can refer to it
71 class LIR_OprPtr: public CompilationResourceObj {
72 public:
73 bool is_oop_pointer() const { return (type() == T_OBJECT); }
74 bool is_float_kind() const { BasicType t = type(); return (t == T_FLOAT) || (t == T_DOUBLE); }
75
76 virtual LIR_Const* as_constant() { return NULL; }
77 virtual LIR_Address* as_address() { return NULL; }
78 virtual BasicType type() const = 0;
79 virtual void print_value_on(outputStream* out) const = 0;
80 };
81
82
83
84 // LIR constants
85 class LIR_Const: public LIR_OprPtr {
86 private:
87 JavaValue _value;
88
89 void type_check(BasicType t) const { assert(type() == t, "type check"); }
90 void type_check(BasicType t1, BasicType t2) const { assert(type() == t1 || type() == t2, "type check"); }
91
92 public:
93 LIR_Const(jint i) { _value.set_type(T_INT); _value.set_jint(i); }
94 LIR_Const(jlong l) { _value.set_type(T_LONG); _value.set_jlong(l); }
95 LIR_Const(jfloat f) { _value.set_type(T_FLOAT); _value.set_jfloat(f); }
96 LIR_Const(jdouble d) { _value.set_type(T_DOUBLE); _value.set_jdouble(d); }
97 LIR_Const(jobject o) { _value.set_type(T_OBJECT); _value.set_jobject(o); }
98 LIR_Const(void* p) {
99 #ifdef _LP64
100 assert(sizeof(jlong) >= sizeof(p), "too small");;
101 _value.set_type(T_LONG); _value.set_jlong((jlong)p);
102 #else
103 assert(sizeof(jint) >= sizeof(p), "too small");;
104 _value.set_type(T_INT); _value.set_jint((jint)p);
105 #endif
106 }
107
108 virtual BasicType type() const { return _value.get_type(); }
109 virtual LIR_Const* as_constant() { return this; }
110
111 jint as_jint() const { type_check(T_INT ); return _value.get_jint(); }
112 jlong as_jlong() const { type_check(T_LONG ); return _value.get_jlong(); }
113 jfloat as_jfloat() const { type_check(T_FLOAT ); return _value.get_jfloat(); }
114 jdouble as_jdouble() const { type_check(T_DOUBLE); return _value.get_jdouble(); }
115 jobject as_jobject() const { type_check(T_OBJECT); return _value.get_jobject(); }
116 jint as_jint_lo() const { type_check(T_LONG ); return low(_value.get_jlong()); }
117 jint as_jint_hi() const { type_check(T_LONG ); return high(_value.get_jlong()); }
118
119 #ifdef _LP64
120 address as_pointer() const { type_check(T_LONG ); return (address)_value.get_jlong(); }
121 #else
122 address as_pointer() const { type_check(T_INT ); return (address)_value.get_jint(); }
123 #endif
124
125
126 jint as_jint_bits() const { type_check(T_FLOAT, T_INT); return _value.get_jint(); }
127 jint as_jint_lo_bits() const {
128 if (type() == T_DOUBLE) {
129 return low(jlong_cast(_value.get_jdouble()));
130 } else {
131 return as_jint_lo();
132 }
133 }
134 jint as_jint_hi_bits() const {
135 if (type() == T_DOUBLE) {
136 return high(jlong_cast(_value.get_jdouble()));
137 } else {
138 return as_jint_hi();
139 }
140 }
141 jlong as_jlong_bits() const {
142 if (type() == T_DOUBLE) {
143 return jlong_cast(_value.get_jdouble());
144 } else {
145 return as_jlong();
146 }
147 }
148
149 virtual void print_value_on(outputStream* out) const PRODUCT_RETURN;
150
151
152 bool is_zero_float() {
153 jfloat f = as_jfloat();
154 jfloat ok = 0.0f;
155 return jint_cast(f) == jint_cast(ok);
156 }
157
158 bool is_one_float() {
159 jfloat f = as_jfloat();
160 return !g_isnan(f) && g_isfinite(f) && f == 1.0;
161 }
162
163 bool is_zero_double() {
164 jdouble d = as_jdouble();
165 jdouble ok = 0.0;
166 return jlong_cast(d) == jlong_cast(ok);
167 }
168
169 bool is_one_double() {
170 jdouble d = as_jdouble();
171 return !g_isnan(d) && g_isfinite(d) && d == 1.0;
172 }
173 };
174
175
176 //---------------------LIR Operand descriptor------------------------------------
177 //
178 // The class LIR_OprDesc represents a LIR instruction operand;
179 // it can be a register (ALU/FPU), stack location or a constant;
180 // Constants and addresses are represented as resource area allocated
181 // structures (see above).
182 // Registers and stack locations are inlined into the this pointer
183 // (see value function).
184
185 class LIR_OprDesc: public CompilationResourceObj {
186 public:
187 // value structure:
188 // data opr-type opr-kind
189 // +--------------+-------+-------+
190 // [max...........|7 6 5 4|3 2 1 0]
191 // ^
192 // is_pointer bit
193 //
194 // lowest bit cleared, means it is a structure pointer
195 // we need 4 bits to represent types
196
197 private:
198 friend class LIR_OprFact;
199
200 // Conversion
201 intptr_t value() const { return (intptr_t) this; }
202
203 bool check_value_mask(intptr_t mask, intptr_t masked_value) const {
204 return (value() & mask) == masked_value;
205 }
206
207 enum OprKind {
208 pointer_value = 0
209 , stack_value = 1
210 , cpu_register = 3
211 , fpu_register = 5
212 , illegal_value = 7
213 };
214
215 enum OprBits {
216 pointer_bits = 1
217 , kind_bits = 3
218 , type_bits = 4
219 , size_bits = 2
220 , destroys_bits = 1
221 , virtual_bits = 1
222 , is_xmm_bits = 1
223 , last_use_bits = 1
224 , is_fpu_stack_offset_bits = 1 // used in assertion checking on x86 for FPU stack slot allocation
225 , non_data_bits = kind_bits + type_bits + size_bits + destroys_bits + last_use_bits +
226 is_fpu_stack_offset_bits + virtual_bits + is_xmm_bits
227 , data_bits = BitsPerInt - non_data_bits
228 , reg_bits = data_bits / 2 // for two registers in one value encoding
229 };
230
231 enum OprShift {
232 kind_shift = 0
233 , type_shift = kind_shift + kind_bits
234 , size_shift = type_shift + type_bits
235 , destroys_shift = size_shift + size_bits
236 , last_use_shift = destroys_shift + destroys_bits
237 , is_fpu_stack_offset_shift = last_use_shift + last_use_bits
238 , virtual_shift = is_fpu_stack_offset_shift + is_fpu_stack_offset_bits
239 , is_xmm_shift = virtual_shift + virtual_bits
240 , data_shift = is_xmm_shift + is_xmm_bits
241 , reg1_shift = data_shift
242 , reg2_shift = data_shift + reg_bits
243
244 };
245
246 enum OprSize {
247 single_size = 0 << size_shift
248 , double_size = 1 << size_shift
249 };
250
251 enum OprMask {
252 kind_mask = right_n_bits(kind_bits)
253 , type_mask = right_n_bits(type_bits) << type_shift
254 , size_mask = right_n_bits(size_bits) << size_shift
255 , last_use_mask = right_n_bits(last_use_bits) << last_use_shift
256 , is_fpu_stack_offset_mask = right_n_bits(is_fpu_stack_offset_bits) << is_fpu_stack_offset_shift
257 , virtual_mask = right_n_bits(virtual_bits) << virtual_shift
258 , is_xmm_mask = right_n_bits(is_xmm_bits) << is_xmm_shift
259 , pointer_mask = right_n_bits(pointer_bits)
260 , lower_reg_mask = right_n_bits(reg_bits)
261 , no_type_mask = (int)(~(type_mask | last_use_mask | is_fpu_stack_offset_mask))
262 };
263
264 uintptr_t data() const { return value() >> data_shift; }
265 int lo_reg_half() const { return data() & lower_reg_mask; }
266 int hi_reg_half() const { return (data() >> reg_bits) & lower_reg_mask; }
267 OprKind kind_field() const { return (OprKind)(value() & kind_mask); }
268 OprSize size_field() const { return (OprSize)(value() & size_mask); }
269
270 static char type_char(BasicType t);
271
272 public:
273 enum {
274 vreg_base = ConcreteRegisterImpl::number_of_registers,
275 vreg_max = (1 << data_bits) - 1
276 };
277
278 static inline LIR_Opr illegalOpr();
279
280 enum OprType {
281 unknown_type = 0 << type_shift // means: not set (catch uninitialized types)
282 , int_type = 1 << type_shift
283 , long_type = 2 << type_shift
284 , object_type = 3 << type_shift
285 , pointer_type = 4 << type_shift
286 , float_type = 5 << type_shift
287 , double_type = 6 << type_shift
288 };
289 friend OprType as_OprType(BasicType t);
290 friend BasicType as_BasicType(OprType t);
291
292 OprType type_field_valid() const { assert(is_register() || is_stack(), "should not be called otherwise"); return (OprType)(value() & type_mask); }
293 OprType type_field() const { return is_illegal() ? unknown_type : (OprType)(value() & type_mask); }
294
295 static OprSize size_for(BasicType t) {
296 switch (t) {
297 case T_LONG:
298 case T_DOUBLE:
299 return double_size;
300 break;
301
302 case T_FLOAT:
303 case T_BOOLEAN:
304 case T_CHAR:
305 case T_BYTE:
306 case T_SHORT:
307 case T_INT:
308 case T_OBJECT:
309 case T_ARRAY:
310 return single_size;
311 break;
312
313 default:
314 ShouldNotReachHere();
315 return single_size;
316 }
317 }
318
319
320 void validate_type() const PRODUCT_RETURN;
321
322 BasicType type() const {
323 if (is_pointer()) {
324 return pointer()->type();
325 }
326 return as_BasicType(type_field());
327 }
328
329
330 ValueType* value_type() const { return as_ValueType(type()); }
331
332 char type_char() const { return type_char((is_pointer()) ? pointer()->type() : type()); }
333
334 bool is_equal(LIR_Opr opr) const { return this == opr; }
335 // checks whether types are same
336 bool is_same_type(LIR_Opr opr) const {
337 assert(type_field() != unknown_type &&
338 opr->type_field() != unknown_type, "shouldn't see unknown_type");
339 return type_field() == opr->type_field();
340 }
341 bool is_same_register(LIR_Opr opr) {
342 return (is_register() && opr->is_register() &&
343 kind_field() == opr->kind_field() &&
344 (value() & no_type_mask) == (opr->value() & no_type_mask));
345 }
346
347 bool is_pointer() const { return check_value_mask(pointer_mask, pointer_value); }
348 bool is_illegal() const { return kind_field() == illegal_value; }
349 bool is_valid() const { return kind_field() != illegal_value; }
350
351 bool is_register() const { return is_cpu_register() || is_fpu_register(); }
352 bool is_virtual() const { return is_virtual_cpu() || is_virtual_fpu(); }
353
354 bool is_constant() const { return is_pointer() && pointer()->as_constant() != NULL; }
355 bool is_address() const { return is_pointer() && pointer()->as_address() != NULL; }
356
357 bool is_float_kind() const { return is_pointer() ? pointer()->is_float_kind() : (kind_field() == fpu_register); }
358 bool is_oop() const;
359
360 // semantic for fpu- and xmm-registers:
361 // * is_float and is_double return true for xmm_registers
362 // (so is_single_fpu and is_single_xmm are true)
363 // * So you must always check for is_???_xmm prior to is_???_fpu to
364 // distinguish between fpu- and xmm-registers
365
366 bool is_stack() const { validate_type(); return check_value_mask(kind_mask, stack_value); }
367 bool is_single_stack() const { validate_type(); return check_value_mask(kind_mask | size_mask, stack_value | single_size); }
368 bool is_double_stack() const { validate_type(); return check_value_mask(kind_mask | size_mask, stack_value | double_size); }
369
370 bool is_cpu_register() const { validate_type(); return check_value_mask(kind_mask, cpu_register); }
371 bool is_virtual_cpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, cpu_register | virtual_mask); }
372 bool is_fixed_cpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, cpu_register); }
373 bool is_single_cpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, cpu_register | single_size); }
374 bool is_double_cpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, cpu_register | double_size); }
375
376 bool is_fpu_register() const { validate_type(); return check_value_mask(kind_mask, fpu_register); }
377 bool is_virtual_fpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, fpu_register | virtual_mask); }
378 bool is_fixed_fpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, fpu_register); }
379 bool is_single_fpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, fpu_register | single_size); }
380 bool is_double_fpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, fpu_register | double_size); }
381
382 bool is_xmm_register() const { validate_type(); return check_value_mask(kind_mask | is_xmm_mask, fpu_register | is_xmm_mask); }
383 bool is_single_xmm() const { validate_type(); return check_value_mask(kind_mask | size_mask | is_xmm_mask, fpu_register | single_size | is_xmm_mask); }
384 bool is_double_xmm() const { validate_type(); return check_value_mask(kind_mask | size_mask | is_xmm_mask, fpu_register | double_size | is_xmm_mask); }
385
386 // fast accessor functions for special bits that do not work for pointers
387 // (in this functions, the check for is_pointer() is omitted)
388 bool is_single_word() const { assert(is_register() || is_stack(), "type check"); return check_value_mask(size_mask, single_size); }
389 bool is_double_word() const { assert(is_register() || is_stack(), "type check"); return check_value_mask(size_mask, double_size); }
390 bool is_virtual_register() const { assert(is_register(), "type check"); return check_value_mask(virtual_mask, virtual_mask); }
391 bool is_oop_register() const { assert(is_register() || is_stack(), "type check"); return type_field_valid() == object_type; }
392 BasicType type_register() const { assert(is_register() || is_stack(), "type check"); return as_BasicType(type_field_valid()); }
393
394 bool is_last_use() const { assert(is_register(), "only works for registers"); return (value() & last_use_mask) != 0; }
395 bool is_fpu_stack_offset() const { assert(is_register(), "only works for registers"); return (value() & is_fpu_stack_offset_mask) != 0; }
396 LIR_Opr make_last_use() { assert(is_register(), "only works for registers"); return (LIR_Opr)(value() | last_use_mask); }
397 LIR_Opr make_fpu_stack_offset() { assert(is_register(), "only works for registers"); return (LIR_Opr)(value() | is_fpu_stack_offset_mask); }
398
399
400 int single_stack_ix() const { assert(is_single_stack() && !is_virtual(), "type check"); return (int)data(); }
401 int double_stack_ix() const { assert(is_double_stack() && !is_virtual(), "type check"); return (int)data(); }
402 RegNr cpu_regnr() const { assert(is_single_cpu() && !is_virtual(), "type check"); return (RegNr)data(); }
403 RegNr cpu_regnrLo() const { assert(is_double_cpu() && !is_virtual(), "type check"); return (RegNr)lo_reg_half(); }
404 RegNr cpu_regnrHi() const { assert(is_double_cpu() && !is_virtual(), "type check"); return (RegNr)hi_reg_half(); }
405 RegNr fpu_regnr() const { assert(is_single_fpu() && !is_virtual(), "type check"); return (RegNr)data(); }
406 RegNr fpu_regnrLo() const { assert(is_double_fpu() && !is_virtual(), "type check"); return (RegNr)lo_reg_half(); }
407 RegNr fpu_regnrHi() const { assert(is_double_fpu() && !is_virtual(), "type check"); return (RegNr)hi_reg_half(); }
408 RegNr xmm_regnr() const { assert(is_single_xmm() && !is_virtual(), "type check"); return (RegNr)data(); }
409 RegNr xmm_regnrLo() const { assert(is_double_xmm() && !is_virtual(), "type check"); return (RegNr)lo_reg_half(); }
410 RegNr xmm_regnrHi() const { assert(is_double_xmm() && !is_virtual(), "type check"); return (RegNr)hi_reg_half(); }
411 int vreg_number() const { assert(is_virtual(), "type check"); return (RegNr)data(); }
412
413 LIR_OprPtr* pointer() const { assert(is_pointer(), "type check"); return (LIR_OprPtr*)this; }
414 LIR_Const* as_constant_ptr() const { return pointer()->as_constant(); }
415 LIR_Address* as_address_ptr() const { return pointer()->as_address(); }
416
417 Register as_register() const;
418 Register as_register_lo() const;
419 Register as_register_hi() const;
420
421 Register as_pointer_register() {
422 #ifdef _LP64
423 if (is_double_cpu()) {
424 assert(as_register_lo() == as_register_hi(), "should be a single register");
425 return as_register_lo();
426 }
427 #endif
428 return as_register();
429 }
430
431 #ifdef X86
432 XMMRegister as_xmm_float_reg() const;
433 XMMRegister as_xmm_double_reg() const;
434 // for compatibility with RInfo
435 int fpu () const { return lo_reg_half(); }
436 #endif // X86
437
438 #ifdef SPARC
439 FloatRegister as_float_reg () const;
440 FloatRegister as_double_reg () const;
441 #endif
442
443 jint as_jint() const { return as_constant_ptr()->as_jint(); }
444 jlong as_jlong() const { return as_constant_ptr()->as_jlong(); }
445 jfloat as_jfloat() const { return as_constant_ptr()->as_jfloat(); }
446 jdouble as_jdouble() const { return as_constant_ptr()->as_jdouble(); }
447 jobject as_jobject() const { return as_constant_ptr()->as_jobject(); }
448
449 void print() const PRODUCT_RETURN;
450 void print(outputStream* out) const PRODUCT_RETURN;
451 };
452
453
454 inline LIR_OprDesc::OprType as_OprType(BasicType type) {
455 switch (type) {
456 case T_INT: return LIR_OprDesc::int_type;
457 case T_LONG: return LIR_OprDesc::long_type;
458 case T_FLOAT: return LIR_OprDesc::float_type;
459 case T_DOUBLE: return LIR_OprDesc::double_type;
460 case T_OBJECT:
461 case T_ARRAY: return LIR_OprDesc::object_type;
462 case T_ILLEGAL: // fall through
463 default: ShouldNotReachHere(); return LIR_OprDesc::unknown_type;
464 }
465 }
466
467 inline BasicType as_BasicType(LIR_OprDesc::OprType t) {
468 switch (t) {
469 case LIR_OprDesc::int_type: return T_INT;
470 case LIR_OprDesc::long_type: return T_LONG;
471 case LIR_OprDesc::float_type: return T_FLOAT;
472 case LIR_OprDesc::double_type: return T_DOUBLE;
473 case LIR_OprDesc::object_type: return T_OBJECT;
474 case LIR_OprDesc::unknown_type: // fall through
475 default: ShouldNotReachHere(); return T_ILLEGAL;
476 }
477 }
478
479
480 // LIR_Address
481 class LIR_Address: public LIR_OprPtr {
482 friend class LIR_OpVisitState;
483
484 public:
485 // NOTE: currently these must be the log2 of the scale factor (and
486 // must also be equivalent to the ScaleFactor enum in
487 // assembler_i486.hpp)
488 enum Scale {
489 times_1 = 0,
490 times_2 = 1,
491 times_4 = 2,
492 times_8 = 3
493 };
494
495 private:
496 LIR_Opr _base;
497 LIR_Opr _index;
498 Scale _scale;
499 intx _disp;
500 BasicType _type;
501
502 public:
503 LIR_Address(LIR_Opr base, LIR_Opr index, BasicType type):
504 _base(base)
505 , _index(index)
506 , _scale(times_1)
507 , _type(type)
508 , _disp(0) { verify(); }
509
510 LIR_Address(LIR_Opr base, int disp, BasicType type):
511 _base(base)
512 , _index(LIR_OprDesc::illegalOpr())
513 , _scale(times_1)
514 , _type(type)
515 , _disp(disp) { verify(); }
516
517 #ifdef X86
518 LIR_Address(LIR_Opr base, LIR_Opr index, Scale scale, int disp, BasicType type):
519 _base(base)
520 , _index(index)
521 , _scale(scale)
522 , _type(type)
523 , _disp(disp) { verify(); }
524 #endif // X86
525
526 LIR_Opr base() const { return _base; }
527 LIR_Opr index() const { return _index; }
528 Scale scale() const { return _scale; }
529 intx disp() const { return _disp; }
530
531 bool equals(LIR_Address* other) const { return base() == other->base() && index() == other->index() && disp() == other->disp() && scale() == other->scale(); }
532
533 virtual LIR_Address* as_address() { return this; }
534 virtual BasicType type() const { return _type; }
535 virtual void print_value_on(outputStream* out) const PRODUCT_RETURN;
536
537 void verify() const PRODUCT_RETURN;
538
539 static Scale scale(BasicType type);
540 };
541
542
543 // operand factory
544 class LIR_OprFact: public AllStatic {
545 public:
546
547 static LIR_Opr illegalOpr;
548
549 static LIR_Opr single_cpu(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) | LIR_OprDesc::int_type | LIR_OprDesc::cpu_register | LIR_OprDesc::single_size); }
550 static LIR_Opr single_cpu_oop(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) | LIR_OprDesc::object_type | LIR_OprDesc::cpu_register | LIR_OprDesc::single_size); }
551 static LIR_Opr double_cpu(int reg1, int reg2) {
552 LP64_ONLY(assert(reg1 == reg2, "must be identical"));
553 return (LIR_Opr)(intptr_t)((reg1 << LIR_OprDesc::reg1_shift) |
554 (reg2 << LIR_OprDesc::reg2_shift) |
555 LIR_OprDesc::long_type |
556 LIR_OprDesc::cpu_register |
557 LIR_OprDesc::double_size);
558 }
559
560 static LIR_Opr single_fpu(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
561 LIR_OprDesc::float_type |
562 LIR_OprDesc::fpu_register |
563 LIR_OprDesc::single_size); }
564
565 #ifdef SPARC
566 static LIR_Opr double_fpu(int reg1, int reg2) { return (LIR_Opr)(intptr_t)((reg1 << LIR_OprDesc::reg1_shift) |
567 (reg2 << LIR_OprDesc::reg2_shift) |
568 LIR_OprDesc::double_type |
569 LIR_OprDesc::fpu_register |
570 LIR_OprDesc::double_size); }
571 #endif
572 #ifdef X86
573 static LIR_Opr double_fpu(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
574 (reg << LIR_OprDesc::reg2_shift) |
575 LIR_OprDesc::double_type |
576 LIR_OprDesc::fpu_register |
577 LIR_OprDesc::double_size); }
578
579 static LIR_Opr single_xmm(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
580 LIR_OprDesc::float_type |
581 LIR_OprDesc::fpu_register |
582 LIR_OprDesc::single_size |
583 LIR_OprDesc::is_xmm_mask); }
584 static LIR_Opr double_xmm(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
585 (reg << LIR_OprDesc::reg2_shift) |
586 LIR_OprDesc::double_type |
587 LIR_OprDesc::fpu_register |
588 LIR_OprDesc::double_size |
589 LIR_OprDesc::is_xmm_mask); }
590 #endif // X86
591
592
593 static LIR_Opr virtual_register(int index, BasicType type) {
594 LIR_Opr res;
595 switch (type) {
596 case T_OBJECT: // fall through
597 case T_ARRAY:
598 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
599 LIR_OprDesc::object_type |
600 LIR_OprDesc::cpu_register |
601 LIR_OprDesc::single_size |
602 LIR_OprDesc::virtual_mask);
603 break;
604
605 case T_INT:
606 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
607 LIR_OprDesc::int_type |
608 LIR_OprDesc::cpu_register |
609 LIR_OprDesc::single_size |
610 LIR_OprDesc::virtual_mask);
611 break;
612
613 case T_LONG:
614 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
615 LIR_OprDesc::long_type |
616 LIR_OprDesc::cpu_register |
617 LIR_OprDesc::double_size |
618 LIR_OprDesc::virtual_mask);
619 break;
620
621 case T_FLOAT:
622 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
623 LIR_OprDesc::float_type |
624 LIR_OprDesc::fpu_register |
625 LIR_OprDesc::single_size |
626 LIR_OprDesc::virtual_mask);
627 break;
628
629 case
630 T_DOUBLE: res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
631 LIR_OprDesc::double_type |
632 LIR_OprDesc::fpu_register |
633 LIR_OprDesc::double_size |
634 LIR_OprDesc::virtual_mask);
635 break;
636
637 default: ShouldNotReachHere(); res = illegalOpr;
638 }
639
640 #ifdef ASSERT
641 res->validate_type();
642 assert(res->vreg_number() == index, "conversion check");
643 assert(index >= LIR_OprDesc::vreg_base, "must start at vreg_base");
644 assert(index <= (max_jint >> LIR_OprDesc::data_shift), "index is too big");
645
646 // old-style calculation; check if old and new method are equal
647 LIR_OprDesc::OprType t = as_OprType(type);
648 LIR_Opr old_res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | t |
649 ((type == T_FLOAT || type == T_DOUBLE) ? LIR_OprDesc::fpu_register : LIR_OprDesc::cpu_register) |
650 LIR_OprDesc::size_for(type) | LIR_OprDesc::virtual_mask);
651 assert(res == old_res, "old and new method not equal");
652 #endif
653
654 return res;
655 }
656
657 // 'index' is computed by FrameMap::local_stack_pos(index); do not use other parameters as
658 // the index is platform independent; a double stack useing indeces 2 and 3 has always
659 // index 2.
660 static LIR_Opr stack(int index, BasicType type) {
661 LIR_Opr res;
662 switch (type) {
663 case T_OBJECT: // fall through
664 case T_ARRAY:
665 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
666 LIR_OprDesc::object_type |
667 LIR_OprDesc::stack_value |
668 LIR_OprDesc::single_size);
669 break;
670
671 case T_INT:
672 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
673 LIR_OprDesc::int_type |
674 LIR_OprDesc::stack_value |
675 LIR_OprDesc::single_size);
676 break;
677
678 case T_LONG:
679 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
680 LIR_OprDesc::long_type |
681 LIR_OprDesc::stack_value |
682 LIR_OprDesc::double_size);
683 break;
684
685 case T_FLOAT:
686 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
687 LIR_OprDesc::float_type |
688 LIR_OprDesc::stack_value |
689 LIR_OprDesc::single_size);
690 break;
691 case T_DOUBLE:
692 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
693 LIR_OprDesc::double_type |
694 LIR_OprDesc::stack_value |
695 LIR_OprDesc::double_size);
696 break;
697
698 default: ShouldNotReachHere(); res = illegalOpr;
699 }
700
701 #ifdef ASSERT
702 assert(index >= 0, "index must be positive");
703 assert(index <= (max_jint >> LIR_OprDesc::data_shift), "index is too big");
704
705 LIR_Opr old_res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
706 LIR_OprDesc::stack_value |
707 as_OprType(type) |
708 LIR_OprDesc::size_for(type));
709 assert(res == old_res, "old and new method not equal");
710 #endif
711
712 return res;
713 }
714
715 static LIR_Opr intConst(jint i) { return (LIR_Opr)(new LIR_Const(i)); }
716 static LIR_Opr longConst(jlong l) { return (LIR_Opr)(new LIR_Const(l)); }
717 static LIR_Opr floatConst(jfloat f) { return (LIR_Opr)(new LIR_Const(f)); }
718 static LIR_Opr doubleConst(jdouble d) { return (LIR_Opr)(new LIR_Const(d)); }
719 static LIR_Opr oopConst(jobject o) { return (LIR_Opr)(new LIR_Const(o)); }
720 static LIR_Opr address(LIR_Address* a) { return (LIR_Opr)a; }
721 static LIR_Opr intptrConst(void* p) { return (LIR_Opr)(new LIR_Const(p)); }
722 static LIR_Opr intptrConst(intptr_t v) { return (LIR_Opr)(new LIR_Const((void*)v)); }
723 static LIR_Opr illegal() { return (LIR_Opr)-1; }
724
725 static LIR_Opr value_type(ValueType* type);
726 static LIR_Opr dummy_value_type(ValueType* type);
727 };
728
729
730 //-------------------------------------------------------------------------------
731 // LIR Instructions
732 //-------------------------------------------------------------------------------
733 //
734 // Note:
735 // - every instruction has a result operand
736 // - every instruction has an CodeEmitInfo operand (can be revisited later)
737 // - every instruction has a LIR_OpCode operand
738 // - LIR_OpN, means an instruction that has N input operands
739 //
740 // class hierarchy:
741 //
742 class LIR_Op;
743 class LIR_Op0;
744 class LIR_OpLabel;
745 class LIR_Op1;
746 class LIR_OpBranch;
747 class LIR_OpConvert;
748 class LIR_OpAllocObj;
749 class LIR_OpRoundFP;
750 class LIR_Op2;
751 class LIR_OpDelay;
752 class LIR_Op3;
753 class LIR_OpAllocArray;
754 class LIR_OpCall;
755 class LIR_OpJavaCall;
756 class LIR_OpRTCall;
757 class LIR_OpArrayCopy;
758 class LIR_OpLock;
759 class LIR_OpTypeCheck;
760 class LIR_OpCompareAndSwap;
761 class LIR_OpProfileCall;
762
763
764 // LIR operation codes
765 enum LIR_Code {
766 lir_none
767 , begin_op0
768 , lir_word_align
769 , lir_label
770 , lir_nop
771 , lir_backwardbranch_target
772 , lir_std_entry
773 , lir_osr_entry
774 , lir_build_frame
775 , lir_fpop_raw
776 , lir_24bit_FPU
777 , lir_reset_FPU
778 , lir_breakpoint
779 , lir_rtcall
780 , lir_membar
781 , lir_membar_acquire
782 , lir_membar_release
783 , lir_get_thread
784 , end_op0
785 , begin_op1
786 , lir_fxch
787 , lir_fld
788 , lir_ffree
789 , lir_push
790 , lir_pop
791 , lir_null_check
792 , lir_return
793 , lir_leal
794 , lir_neg
795 , lir_branch
796 , lir_cond_float_branch
797 , lir_move
798 , lir_prefetchr
799 , lir_prefetchw
800 , lir_convert
801 , lir_alloc_object
802 , lir_monaddr
803 , lir_roundfp
804 , lir_safepoint
805 , end_op1
806 , begin_op2
807 , lir_cmp
808 , lir_cmp_l2i
809 , lir_ucmp_fd2i
810 , lir_cmp_fd2i
811 , lir_cmove
812 , lir_add
813 , lir_sub
814 , lir_mul
815 , lir_mul_strictfp
816 , lir_div
817 , lir_div_strictfp
818 , lir_rem
819 , lir_sqrt
820 , lir_abs
821 , lir_sin
822 , lir_cos
823 , lir_tan
824 , lir_log
825 , lir_log10
826 , lir_logic_and
827 , lir_logic_or
828 , lir_logic_xor
829 , lir_shl
830 , lir_shr
831 , lir_ushr
832 , lir_alloc_array
833 , lir_throw
834 , lir_unwind
835 , lir_compare_to
836 , end_op2
837 , begin_op3
838 , lir_idiv
839 , lir_irem
840 , end_op3
841 , begin_opJavaCall
842 , lir_static_call
843 , lir_optvirtual_call
844 , lir_icvirtual_call
845 , lir_virtual_call
846 , end_opJavaCall
847 , begin_opArrayCopy
848 , lir_arraycopy
849 , end_opArrayCopy
850 , begin_opLock
851 , lir_lock
852 , lir_unlock
853 , end_opLock
854 , begin_delay_slot
855 , lir_delay_slot
856 , end_delay_slot
857 , begin_opTypeCheck
858 , lir_instanceof
859 , lir_checkcast
860 , lir_store_check
861 , end_opTypeCheck
862 , begin_opCompareAndSwap
863 , lir_cas_long
864 , lir_cas_obj
865 , lir_cas_int
866 , end_opCompareAndSwap
867 , begin_opMDOProfile
868 , lir_profile_call
869 , end_opMDOProfile
870 };
871
872
873 enum LIR_Condition {
874 lir_cond_equal
875 , lir_cond_notEqual
876 , lir_cond_less
877 , lir_cond_lessEqual
878 , lir_cond_greaterEqual
879 , lir_cond_greater
880 , lir_cond_belowEqual
881 , lir_cond_aboveEqual
882 , lir_cond_always
883 , lir_cond_unknown = -1
884 };
885
886
887 enum LIR_PatchCode {
888 lir_patch_none,
889 lir_patch_low,
890 lir_patch_high,
891 lir_patch_normal
892 };
893
894
895 enum LIR_MoveKind {
896 lir_move_normal,
897 lir_move_volatile,
898 lir_move_unaligned,
899 lir_move_max_flag
900 };
901
902
903 // --------------------------------------------------
904 // LIR_Op
905 // --------------------------------------------------
906 class LIR_Op: public CompilationResourceObj {
907 friend class LIR_OpVisitState;
908
909 #ifdef ASSERT
910 private:
911 const char * _file;
912 int _line;
913 #endif
914
915 protected:
916 LIR_Opr _result;
917 unsigned short _code;
918 unsigned short _flags;
919 CodeEmitInfo* _info;
920 int _id; // value id for register allocation
921 int _fpu_pop_count;
922 Instruction* _source; // for debugging
923
924 static void print_condition(outputStream* out, LIR_Condition cond) PRODUCT_RETURN;
925
926 protected:
927 static bool is_in_range(LIR_Code test, LIR_Code start, LIR_Code end) { return start < test && test < end; }
928
929 public:
930 LIR_Op()
931 : _result(LIR_OprFact::illegalOpr)
932 , _code(lir_none)
933 , _flags(0)
934 , _info(NULL)
935 #ifdef ASSERT
936 , _file(NULL)
937 , _line(0)
938 #endif
939 , _fpu_pop_count(0)
940 , _source(NULL)
941 , _id(-1) {}
942
943 LIR_Op(LIR_Code code, LIR_Opr result, CodeEmitInfo* info)
944 : _result(result)
945 , _code(code)
946 , _flags(0)
947 , _info(info)
948 #ifdef ASSERT
949 , _file(NULL)
950 , _line(0)
951 #endif
952 , _fpu_pop_count(0)
953 , _source(NULL)
954 , _id(-1) {}
955
956 CodeEmitInfo* info() const { return _info; }
957 LIR_Code code() const { return (LIR_Code)_code; }
958 LIR_Opr result_opr() const { return _result; }
959 void set_result_opr(LIR_Opr opr) { _result = opr; }
960
961 #ifdef ASSERT
962 void set_file_and_line(const char * file, int line) {
963 _file = file;
964 _line = line;
965 }
966 #endif
967
968 virtual const char * name() const PRODUCT_RETURN0;
969
970 int id() const { return _id; }
971 void set_id(int id) { _id = id; }
972
973 // FPU stack simulation helpers -- only used on Intel
974 void set_fpu_pop_count(int count) { assert(count >= 0 && count <= 1, "currently only 0 and 1 are valid"); _fpu_pop_count = count; }
975 int fpu_pop_count() const { return _fpu_pop_count; }
976 bool pop_fpu_stack() { return _fpu_pop_count > 0; }
977
978 Instruction* source() const { return _source; }
979 void set_source(Instruction* ins) { _source = ins; }
980
981 virtual void emit_code(LIR_Assembler* masm) = 0;
982 virtual void print_instr(outputStream* out) const = 0;
983 virtual void print_on(outputStream* st) const PRODUCT_RETURN;
984
985 virtual LIR_OpCall* as_OpCall() { return NULL; }
986 virtual LIR_OpJavaCall* as_OpJavaCall() { return NULL; }
987 virtual LIR_OpLabel* as_OpLabel() { return NULL; }
988 virtual LIR_OpDelay* as_OpDelay() { return NULL; }
989 virtual LIR_OpLock* as_OpLock() { return NULL; }
990 virtual LIR_OpAllocArray* as_OpAllocArray() { return NULL; }
991 virtual LIR_OpAllocObj* as_OpAllocObj() { return NULL; }
992 virtual LIR_OpRoundFP* as_OpRoundFP() { return NULL; }
993 virtual LIR_OpBranch* as_OpBranch() { return NULL; }
994 virtual LIR_OpRTCall* as_OpRTCall() { return NULL; }
995 virtual LIR_OpConvert* as_OpConvert() { return NULL; }
996 virtual LIR_Op0* as_Op0() { return NULL; }
997 virtual LIR_Op1* as_Op1() { return NULL; }
998 virtual LIR_Op2* as_Op2() { return NULL; }
999 virtual LIR_Op3* as_Op3() { return NULL; }
1000 virtual LIR_OpArrayCopy* as_OpArrayCopy() { return NULL; }
1001 virtual LIR_OpTypeCheck* as_OpTypeCheck() { return NULL; }
1002 virtual LIR_OpCompareAndSwap* as_OpCompareAndSwap() { return NULL; }
1003 virtual LIR_OpProfileCall* as_OpProfileCall() { return NULL; }
1004
1005 virtual void verify() const {}
1006 };
1007
1008 // for calls
1009 class LIR_OpCall: public LIR_Op {
1010 friend class LIR_OpVisitState;
1011
1012 protected:
1013 address _addr;
1014 LIR_OprList* _arguments;
1015 protected:
1016 LIR_OpCall(LIR_Code code, address addr, LIR_Opr result,
1017 LIR_OprList* arguments, CodeEmitInfo* info = NULL)
1018 : LIR_Op(code, result, info)
1019 , _arguments(arguments)
1020 , _addr(addr) {}
1021
1022 public:
1023 address addr() const { return _addr; }
1024 const LIR_OprList* arguments() const { return _arguments; }
1025 virtual LIR_OpCall* as_OpCall() { return this; }
1026 };
1027
1028
1029 // --------------------------------------------------
1030 // LIR_OpJavaCall
1031 // --------------------------------------------------
1032 class LIR_OpJavaCall: public LIR_OpCall {
1033 friend class LIR_OpVisitState;
1034
1035 private:
1036 ciMethod* _method;
1037 LIR_Opr _receiver;
1038
1039 public:
1040 LIR_OpJavaCall(LIR_Code code, ciMethod* method,
1041 LIR_Opr receiver, LIR_Opr result,
1042 address addr, LIR_OprList* arguments,
1043 CodeEmitInfo* info)
1044 : LIR_OpCall(code, addr, result, arguments, info)
1045 , _receiver(receiver)
1046 , _method(method) { assert(is_in_range(code, begin_opJavaCall, end_opJavaCall), "code check"); }
1047
1048 LIR_OpJavaCall(LIR_Code code, ciMethod* method,
1049 LIR_Opr receiver, LIR_Opr result, intptr_t vtable_offset,
1050 LIR_OprList* arguments, CodeEmitInfo* info)
1051 : LIR_OpCall(code, (address)vtable_offset, result, arguments, info)
1052 , _receiver(receiver)
1053 , _method(method) { assert(is_in_range(code, begin_opJavaCall, end_opJavaCall), "code check"); }
1054
1055 LIR_Opr receiver() const { return _receiver; }
1056 ciMethod* method() const { return _method; }
1057
1058 intptr_t vtable_offset() const {
1059 assert(_code == lir_virtual_call, "only have vtable for real vcall");
1060 return (intptr_t) addr();
1061 }
1062
1063 virtual void emit_code(LIR_Assembler* masm);
1064 virtual LIR_OpJavaCall* as_OpJavaCall() { return this; }
1065 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1066 };
1067
1068 // --------------------------------------------------
1069 // LIR_OpLabel
1070 // --------------------------------------------------
1071 // Location where a branch can continue
1072 class LIR_OpLabel: public LIR_Op {
1073 friend class LIR_OpVisitState;
1074
1075 private:
1076 Label* _label;
1077 public:
1078 LIR_OpLabel(Label* lbl)
1079 : LIR_Op(lir_label, LIR_OprFact::illegalOpr, NULL)
1080 , _label(lbl) {}
1081 Label* label() const { return _label; }
1082
1083 virtual void emit_code(LIR_Assembler* masm);
1084 virtual LIR_OpLabel* as_OpLabel() { return this; }
1085 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1086 };
1087
1088 // LIR_OpArrayCopy
1089 class LIR_OpArrayCopy: public LIR_Op {
1090 friend class LIR_OpVisitState;
1091
1092 private:
1093 ArrayCopyStub* _stub;
1094 LIR_Opr _src;
1095 LIR_Opr _src_pos;
1096 LIR_Opr _dst;
1097 LIR_Opr _dst_pos;
1098 LIR_Opr _length;
1099 LIR_Opr _tmp;
1100 ciArrayKlass* _expected_type;
1101 int _flags;
1102
1103 public:
1104 enum Flags {
1105 src_null_check = 1 << 0,
1106 dst_null_check = 1 << 1,
1107 src_pos_positive_check = 1 << 2,
1108 dst_pos_positive_check = 1 << 3,
1109 length_positive_check = 1 << 4,
1110 src_range_check = 1 << 5,
1111 dst_range_check = 1 << 6,
1112 type_check = 1 << 7,
1113 all_flags = (1 << 8) - 1
1114 };
1115
1116 LIR_OpArrayCopy(LIR_Opr src, LIR_Opr src_pos, LIR_Opr dst, LIR_Opr dst_pos, LIR_Opr length, LIR_Opr tmp,
1117 ciArrayKlass* expected_type, int flags, CodeEmitInfo* info);
1118
1119 LIR_Opr src() const { return _src; }
1120 LIR_Opr src_pos() const { return _src_pos; }
1121 LIR_Opr dst() const { return _dst; }
1122 LIR_Opr dst_pos() const { return _dst_pos; }
1123 LIR_Opr length() const { return _length; }
1124 LIR_Opr tmp() const { return _tmp; }
1125 int flags() const { return _flags; }
1126 ciArrayKlass* expected_type() const { return _expected_type; }
1127 ArrayCopyStub* stub() const { return _stub; }
1128
1129 virtual void emit_code(LIR_Assembler* masm);
1130 virtual LIR_OpArrayCopy* as_OpArrayCopy() { return this; }
1131 void print_instr(outputStream* out) const PRODUCT_RETURN;
1132 };
1133
1134
1135 // --------------------------------------------------
1136 // LIR_Op0
1137 // --------------------------------------------------
1138 class LIR_Op0: public LIR_Op {
1139 friend class LIR_OpVisitState;
1140
1141 public:
1142 LIR_Op0(LIR_Code code)
1143 : LIR_Op(code, LIR_OprFact::illegalOpr, NULL) { assert(is_in_range(code, begin_op0, end_op0), "code check"); }
1144 LIR_Op0(LIR_Code code, LIR_Opr result, CodeEmitInfo* info = NULL)
1145 : LIR_Op(code, result, info) { assert(is_in_range(code, begin_op0, end_op0), "code check"); }
1146
1147 virtual void emit_code(LIR_Assembler* masm);
1148 virtual LIR_Op0* as_Op0() { return this; }
1149 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1150 };
1151
1152
1153 // --------------------------------------------------
1154 // LIR_Op1
1155 // --------------------------------------------------
1156
1157 class LIR_Op1: public LIR_Op {
1158 friend class LIR_OpVisitState;
1159
1160 protected:
1161 LIR_Opr _opr; // input operand
1162 BasicType _type; // Operand types
1163 LIR_PatchCode _patch; // only required with patchin (NEEDS_CLEANUP: do we want a special instruction for patching?)
1164
1165 static void print_patch_code(outputStream* out, LIR_PatchCode code);
1166
1167 void set_kind(LIR_MoveKind kind) {
1168 assert(code() == lir_move, "must be");
1169 _flags = kind;
1170 }
1171
1172 public:
1173 LIR_Op1(LIR_Code code, LIR_Opr opr, LIR_Opr result = LIR_OprFact::illegalOpr, BasicType type = T_ILLEGAL, LIR_PatchCode patch = lir_patch_none, CodeEmitInfo* info = NULL)
1174 : LIR_Op(code, result, info)
1175 , _opr(opr)
1176 , _patch(patch)
1177 , _type(type) { assert(is_in_range(code, begin_op1, end_op1), "code check"); }
1178
1179 LIR_Op1(LIR_Code code, LIR_Opr opr, LIR_Opr result, BasicType type, LIR_PatchCode patch, CodeEmitInfo* info, LIR_MoveKind kind)
1180 : LIR_Op(code, result, info)
1181 , _opr(opr)
1182 , _patch(patch)
1183 , _type(type) {
1184 assert(code == lir_move, "must be");
1185 set_kind(kind);
1186 }
1187
1188 LIR_Op1(LIR_Code code, LIR_Opr opr, CodeEmitInfo* info)
1189 : LIR_Op(code, LIR_OprFact::illegalOpr, info)
1190 , _opr(opr)
1191 , _patch(lir_patch_none)
1192 , _type(T_ILLEGAL) { assert(is_in_range(code, begin_op1, end_op1), "code check"); }
1193
1194 LIR_Opr in_opr() const { return _opr; }
1195 LIR_PatchCode patch_code() const { return _patch; }
1196 BasicType type() const { return _type; }
1197
1198 LIR_MoveKind move_kind() const {
1199 assert(code() == lir_move, "must be");
1200 return (LIR_MoveKind)_flags;
1201 }
1202
1203 virtual void emit_code(LIR_Assembler* masm);
1204 virtual LIR_Op1* as_Op1() { return this; }
1205 virtual const char * name() const PRODUCT_RETURN0;
1206
1207 void set_in_opr(LIR_Opr opr) { _opr = opr; }
1208
1209 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1210 virtual void verify() const;
1211 };
1212
1213
1214 // for runtime calls
1215 class LIR_OpRTCall: public LIR_OpCall {
1216 friend class LIR_OpVisitState;
1217
1218 private:
1219 LIR_Opr _tmp;
1220 public:
1221 LIR_OpRTCall(address addr, LIR_Opr tmp,
1222 LIR_Opr result, LIR_OprList* arguments, CodeEmitInfo* info = NULL)
1223 : LIR_OpCall(lir_rtcall, addr, result, arguments, info)
1224 , _tmp(tmp) {}
1225
1226 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1227 virtual void emit_code(LIR_Assembler* masm);
1228 virtual LIR_OpRTCall* as_OpRTCall() { return this; }
1229
1230 LIR_Opr tmp() const { return _tmp; }
1231
1232 virtual void verify() const;
1233 };
1234
1235
1236 class LIR_OpBranch: public LIR_Op {
1237 friend class LIR_OpVisitState;
1238
1239 private:
1240 LIR_Condition _cond;
1241 BasicType _type;
1242 Label* _label;
1243 BlockBegin* _block; // if this is a branch to a block, this is the block
1244 BlockBegin* _ublock; // if this is a float-branch, this is the unorderd block
1245 CodeStub* _stub; // if this is a branch to a stub, this is the stub
1246
1247 public:
1248 LIR_OpBranch(LIR_Condition cond, Label* lbl)
1249 : LIR_Op(lir_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*) NULL)
1250 , _cond(cond)
1251 , _label(lbl)
1252 , _block(NULL)
1253 , _ublock(NULL)
1254 , _stub(NULL) { }
1255
1256 LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block);
1257 LIR_OpBranch(LIR_Condition cond, BasicType type, CodeStub* stub);
1258
1259 // for unordered comparisons
1260 LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block, BlockBegin* ublock);
1261
1262 LIR_Condition cond() const { return _cond; }
1263 BasicType type() const { return _type; }
1264 Label* label() const { return _label; }
1265 BlockBegin* block() const { return _block; }
1266 BlockBegin* ublock() const { return _ublock; }
1267 CodeStub* stub() const { return _stub; }
1268
1269 void change_block(BlockBegin* b);
1270 void change_ublock(BlockBegin* b);
1271 void negate_cond();
1272
1273 virtual void emit_code(LIR_Assembler* masm);
1274 virtual LIR_OpBranch* as_OpBranch() { return this; }
1275 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1276 };
1277
1278
1279 class ConversionStub;
1280
1281 class LIR_OpConvert: public LIR_Op1 {
1282 friend class LIR_OpVisitState;
1283
1284 private:
1285 Bytecodes::Code _bytecode;
1286 ConversionStub* _stub;
1287
1288 public:
1289 LIR_OpConvert(Bytecodes::Code code, LIR_Opr opr, LIR_Opr result, ConversionStub* stub)
1290 : LIR_Op1(lir_convert, opr, result)
1291 , _stub(stub)
1292 , _bytecode(code) {}
1293
1294 Bytecodes::Code bytecode() const { return _bytecode; }
1295 ConversionStub* stub() const { return _stub; }
1296
1297 virtual void emit_code(LIR_Assembler* masm);
1298 virtual LIR_OpConvert* as_OpConvert() { return this; }
1299 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1300
1301 static void print_bytecode(outputStream* out, Bytecodes::Code code) PRODUCT_RETURN;
1302 };
1303
1304
1305 // LIR_OpAllocObj
1306 class LIR_OpAllocObj : public LIR_Op1 {
1307 friend class LIR_OpVisitState;
1308
1309 private:
1310 LIR_Opr _tmp1;
1311 LIR_Opr _tmp2;
1312 LIR_Opr _tmp3;
1313 LIR_Opr _tmp4;
1314 int _hdr_size;
1315 int _obj_size;
1316 CodeStub* _stub;
1317 bool _init_check;
1318
1319 public:
1320 LIR_OpAllocObj(LIR_Opr klass, LIR_Opr result,
1321 LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4,
1322 int hdr_size, int obj_size, bool init_check, CodeStub* stub)
1323 : LIR_Op1(lir_alloc_object, klass, result)
1324 , _tmp1(t1)
1325 , _tmp2(t2)
1326 , _tmp3(t3)
1327 , _tmp4(t4)
1328 , _hdr_size(hdr_size)
1329 , _obj_size(obj_size)
1330 , _init_check(init_check)
1331 , _stub(stub) { }
1332
1333 LIR_Opr klass() const { return in_opr(); }
1334 LIR_Opr obj() const { return result_opr(); }
1335 LIR_Opr tmp1() const { return _tmp1; }
1336 LIR_Opr tmp2() const { return _tmp2; }
1337 LIR_Opr tmp3() const { return _tmp3; }
1338 LIR_Opr tmp4() const { return _tmp4; }
1339 int header_size() const { return _hdr_size; }
1340 int object_size() const { return _obj_size; }
1341 bool init_check() const { return _init_check; }
1342 CodeStub* stub() const { return _stub; }
1343
1344 virtual void emit_code(LIR_Assembler* masm);
1345 virtual LIR_OpAllocObj * as_OpAllocObj () { return this; }
1346 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1347 };
1348
1349
1350 // LIR_OpRoundFP
1351 class LIR_OpRoundFP : public LIR_Op1 {
1352 friend class LIR_OpVisitState;
1353
1354 private:
1355 LIR_Opr _tmp;
1356
1357 public:
1358 LIR_OpRoundFP(LIR_Opr reg, LIR_Opr stack_loc_temp, LIR_Opr result)
1359 : LIR_Op1(lir_roundfp, reg, result)
1360 , _tmp(stack_loc_temp) {}
1361
1362 LIR_Opr tmp() const { return _tmp; }
1363 virtual LIR_OpRoundFP* as_OpRoundFP() { return this; }
1364 void print_instr(outputStream* out) const PRODUCT_RETURN;
1365 };
1366
1367 // LIR_OpTypeCheck
1368 class LIR_OpTypeCheck: public LIR_Op {
1369 friend class LIR_OpVisitState;
1370
1371 private:
1372 LIR_Opr _object;
1373 LIR_Opr _array;
1374 ciKlass* _klass;
1375 LIR_Opr _tmp1;
1376 LIR_Opr _tmp2;
1377 LIR_Opr _tmp3;
1378 bool _fast_check;
1379 CodeEmitInfo* _info_for_patch;
1380 CodeEmitInfo* _info_for_exception;
1381 CodeStub* _stub;
1382 // Helpers for Tier1UpdateMethodData
1383 ciMethod* _profiled_method;
1384 int _profiled_bci;
1385
1386 public:
1387 LIR_OpTypeCheck(LIR_Code code, LIR_Opr result, LIR_Opr object, ciKlass* klass,
1388 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check,
1389 CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, CodeStub* stub,
1390 ciMethod* profiled_method, int profiled_bci);
1391 LIR_OpTypeCheck(LIR_Code code, LIR_Opr object, LIR_Opr array,
1392 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, CodeEmitInfo* info_for_exception,
1393 ciMethod* profiled_method, int profiled_bci);
1394
1395 LIR_Opr object() const { return _object; }
1396 LIR_Opr array() const { assert(code() == lir_store_check, "not valid"); return _array; }
1397 LIR_Opr tmp1() const { return _tmp1; }
1398 LIR_Opr tmp2() const { return _tmp2; }
1399 LIR_Opr tmp3() const { return _tmp3; }
1400 ciKlass* klass() const { assert(code() == lir_instanceof || code() == lir_checkcast, "not valid"); return _klass; }
1401 bool fast_check() const { assert(code() == lir_instanceof || code() == lir_checkcast, "not valid"); return _fast_check; }
1402 CodeEmitInfo* info_for_patch() const { return _info_for_patch; }
1403 CodeEmitInfo* info_for_exception() const { return _info_for_exception; }
1404 CodeStub* stub() const { return _stub; }
1405
1406 // methodDataOop profiling
1407 ciMethod* profiled_method() { return _profiled_method; }
1408 int profiled_bci() { return _profiled_bci; }
1409
1410 virtual void emit_code(LIR_Assembler* masm);
1411 virtual LIR_OpTypeCheck* as_OpTypeCheck() { return this; }
1412 void print_instr(outputStream* out) const PRODUCT_RETURN;
1413 };
1414
1415 // LIR_Op2
1416 class LIR_Op2: public LIR_Op {
1417 friend class LIR_OpVisitState;
1418
1419 int _fpu_stack_size; // for sin/cos implementation on Intel
1420
1421 protected:
1422 LIR_Opr _opr1;
1423 LIR_Opr _opr2;
1424 BasicType _type;
1425 LIR_Opr _tmp;
1426 LIR_Condition _condition;
1427
1428 void verify() const;
1429
1430 public:
1431 LIR_Op2(LIR_Code code, LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, CodeEmitInfo* info = NULL)
1432 : LIR_Op(code, LIR_OprFact::illegalOpr, info)
1433 , _opr1(opr1)
1434 , _opr2(opr2)
1435 , _type(T_ILLEGAL)
1436 , _condition(condition)
1437 , _fpu_stack_size(0)
1438 , _tmp(LIR_OprFact::illegalOpr) {
1439 assert(code == lir_cmp, "code check");
1440 }
1441
1442 LIR_Op2(LIR_Code code, LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result)
1443 : LIR_Op(code, result, NULL)
1444 , _opr1(opr1)
1445 , _opr2(opr2)
1446 , _type(T_ILLEGAL)
1447 , _condition(condition)
1448 , _fpu_stack_size(0)
1449 , _tmp(LIR_OprFact::illegalOpr) {
1450 assert(code == lir_cmove, "code check");
1451 }
1452
1453 LIR_Op2(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result = LIR_OprFact::illegalOpr,
1454 CodeEmitInfo* info = NULL, BasicType type = T_ILLEGAL)
1455 : LIR_Op(code, result, info)
1456 , _opr1(opr1)
1457 , _opr2(opr2)
1458 , _type(type)
1459 , _condition(lir_cond_unknown)
1460 , _fpu_stack_size(0)
1461 , _tmp(LIR_OprFact::illegalOpr) {
1462 assert(code != lir_cmp && is_in_range(code, begin_op2, end_op2), "code check");
1463 }
1464
1465 LIR_Op2(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result, LIR_Opr tmp)
1466 : LIR_Op(code, result, NULL)
1467 , _opr1(opr1)
1468 , _opr2(opr2)
1469 , _type(T_ILLEGAL)
1470 , _condition(lir_cond_unknown)
1471 , _fpu_stack_size(0)
1472 , _tmp(tmp) {
1473 assert(code != lir_cmp && is_in_range(code, begin_op2, end_op2), "code check");
1474 }
1475
1476 LIR_Opr in_opr1() const { return _opr1; }
1477 LIR_Opr in_opr2() const { return _opr2; }
1478 BasicType type() const { return _type; }
1479 LIR_Opr tmp_opr() const { return _tmp; }
1480 LIR_Condition condition() const {
1481 assert(code() == lir_cmp || code() == lir_cmove, "only valid for cmp and cmove"); return _condition;
1482 }
1483
1484 void set_fpu_stack_size(int size) { _fpu_stack_size = size; }
1485 int fpu_stack_size() const { return _fpu_stack_size; }
1486
1487 void set_in_opr1(LIR_Opr opr) { _opr1 = opr; }
1488 void set_in_opr2(LIR_Opr opr) { _opr2 = opr; }
1489
1490 virtual void emit_code(LIR_Assembler* masm);
1491 virtual LIR_Op2* as_Op2() { return this; }
1492 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1493 };
1494
1495 class LIR_OpAllocArray : public LIR_Op {
1496 friend class LIR_OpVisitState;
1497
1498 private:
1499 LIR_Opr _klass;
1500 LIR_Opr _len;
1501 LIR_Opr _tmp1;
1502 LIR_Opr _tmp2;
1503 LIR_Opr _tmp3;
1504 LIR_Opr _tmp4;
1505 BasicType _type;
1506 CodeStub* _stub;
1507
1508 public:
1509 LIR_OpAllocArray(LIR_Opr klass, LIR_Opr len, LIR_Opr result, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, BasicType type, CodeStub* stub)
1510 : LIR_Op(lir_alloc_array, result, NULL)
1511 , _klass(klass)
1512 , _len(len)
1513 , _tmp1(t1)
1514 , _tmp2(t2)
1515 , _tmp3(t3)
1516 , _tmp4(t4)
1517 , _type(type)
1518 , _stub(stub) {}
1519
1520 LIR_Opr klass() const { return _klass; }
1521 LIR_Opr len() const { return _len; }
1522 LIR_Opr obj() const { return result_opr(); }
1523 LIR_Opr tmp1() const { return _tmp1; }
1524 LIR_Opr tmp2() const { return _tmp2; }
1525 LIR_Opr tmp3() const { return _tmp3; }
1526 LIR_Opr tmp4() const { return _tmp4; }
1527 BasicType type() const { return _type; }
1528 CodeStub* stub() const { return _stub; }
1529
1530 virtual void emit_code(LIR_Assembler* masm);
1531 virtual LIR_OpAllocArray * as_OpAllocArray () { return this; }
1532 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1533 };
1534
1535
1536 class LIR_Op3: public LIR_Op {
1537 friend class LIR_OpVisitState;
1538
1539 private:
1540 LIR_Opr _opr1;
1541 LIR_Opr _opr2;
1542 LIR_Opr _opr3;
1543 public:
1544 LIR_Op3(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr opr3, LIR_Opr result, CodeEmitInfo* info = NULL)
1545 : LIR_Op(code, result, info)
1546 , _opr1(opr1)
1547 , _opr2(opr2)
1548 , _opr3(opr3) { assert(is_in_range(code, begin_op3, end_op3), "code check"); }
1549 LIR_Opr in_opr1() const { return _opr1; }
1550 LIR_Opr in_opr2() const { return _opr2; }
1551 LIR_Opr in_opr3() const { return _opr3; }
1552
1553 virtual void emit_code(LIR_Assembler* masm);
1554 virtual LIR_Op3* as_Op3() { return this; }
1555 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1556 };
1557
1558
1559 //--------------------------------
1560 class LabelObj: public CompilationResourceObj {
1561 private:
1562 Label _label;
1563 public:
1564 LabelObj() {}
1565 Label* label() { return &_label; }
1566 };
1567
1568
1569 class LIR_OpLock: public LIR_Op {
1570 friend class LIR_OpVisitState;
1571
1572 private:
1573 LIR_Opr _hdr;
1574 LIR_Opr _obj;
1575 LIR_Opr _lock;
1576 LIR_Opr _scratch;
1577 CodeStub* _stub;
1578 public:
1579 LIR_OpLock(LIR_Code code, LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub, CodeEmitInfo* info)
1580 : LIR_Op(code, LIR_OprFact::illegalOpr, info)
1581 , _hdr(hdr)
1582 , _obj(obj)
1583 , _lock(lock)
1584 , _scratch(scratch)
1585 , _stub(stub) {}
1586
1587 LIR_Opr hdr_opr() const { return _hdr; }
1588 LIR_Opr obj_opr() const { return _obj; }
1589 LIR_Opr lock_opr() const { return _lock; }
1590 LIR_Opr scratch_opr() const { return _scratch; }
1591 CodeStub* stub() const { return _stub; }
1592
1593 virtual void emit_code(LIR_Assembler* masm);
1594 virtual LIR_OpLock* as_OpLock() { return this; }
1595 void print_instr(outputStream* out) const PRODUCT_RETURN;
1596 };
1597
1598
1599 class LIR_OpDelay: public LIR_Op {
1600 friend class LIR_OpVisitState;
1601
1602 private:
1603 LIR_Op* _op;
1604
1605 public:
1606 LIR_OpDelay(LIR_Op* op, CodeEmitInfo* info):
1607 LIR_Op(lir_delay_slot, LIR_OprFact::illegalOpr, info),
1608 _op(op) {
1609 assert(op->code() == lir_nop || LIRFillDelaySlots, "should be filling with nops");
1610 }
1611 virtual void emit_code(LIR_Assembler* masm);
1612 virtual LIR_OpDelay* as_OpDelay() { return this; }
1613 void print_instr(outputStream* out) const PRODUCT_RETURN;
1614 LIR_Op* delay_op() const { return _op; }
1615 CodeEmitInfo* call_info() const { return info(); }
1616 };
1617
1618
1619 // LIR_OpCompareAndSwap
1620 class LIR_OpCompareAndSwap : public LIR_Op {
1621 friend class LIR_OpVisitState;
1622
1623 private:
1624 LIR_Opr _addr;
1625 LIR_Opr _cmp_value;
1626 LIR_Opr _new_value;
1627 LIR_Opr _tmp1;
1628 LIR_Opr _tmp2;
1629
1630 public:
1631 LIR_OpCompareAndSwap(LIR_Code code, LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, LIR_Opr t1, LIR_Opr t2)
1632 : LIR_Op(code, LIR_OprFact::illegalOpr, NULL) // no result, no info
1633 , _addr(addr)
1634 , _cmp_value(cmp_value)
1635 , _new_value(new_value)
1636 , _tmp1(t1)
1637 , _tmp2(t2) { }
1638
1639 LIR_Opr addr() const { return _addr; }
1640 LIR_Opr cmp_value() const { return _cmp_value; }
1641 LIR_Opr new_value() const { return _new_value; }
1642 LIR_Opr tmp1() const { return _tmp1; }
1643 LIR_Opr tmp2() const { return _tmp2; }
1644
1645 virtual void emit_code(LIR_Assembler* masm);
1646 virtual LIR_OpCompareAndSwap * as_OpCompareAndSwap () { return this; }
1647 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1648 };
1649
1650 // LIR_OpProfileCall
1651 class LIR_OpProfileCall : public LIR_Op {
1652 friend class LIR_OpVisitState;
1653
1654 private:
1655 ciMethod* _profiled_method;
1656 int _profiled_bci;
1657 LIR_Opr _mdo;
1658 LIR_Opr _recv;
1659 LIR_Opr _tmp1;
1660 ciKlass* _known_holder;
1661
1662 public:
1663 // Destroys recv
1664 LIR_OpProfileCall(LIR_Code code, ciMethod* profiled_method, int profiled_bci, LIR_Opr mdo, LIR_Opr recv, LIR_Opr t1, ciKlass* known_holder)
1665 : LIR_Op(code, LIR_OprFact::illegalOpr, NULL) // no result, no info
1666 , _profiled_method(profiled_method)
1667 , _profiled_bci(profiled_bci)
1668 , _mdo(mdo)
1669 , _recv(recv)
1670 , _tmp1(t1)
1671 , _known_holder(known_holder) { }
1672
1673 ciMethod* profiled_method() const { return _profiled_method; }
1674 int profiled_bci() const { return _profiled_bci; }
1675 LIR_Opr mdo() const { return _mdo; }
1676 LIR_Opr recv() const { return _recv; }
1677 LIR_Opr tmp1() const { return _tmp1; }
1678 ciKlass* known_holder() const { return _known_holder; }
1679
1680 virtual void emit_code(LIR_Assembler* masm);
1681 virtual LIR_OpProfileCall* as_OpProfileCall() { return this; }
1682 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1683 };
1684
1685
1686 class LIR_InsertionBuffer;
1687
1688 //--------------------------------LIR_List---------------------------------------------------
1689 // Maintains a list of LIR instructions (one instance of LIR_List per basic block)
1690 // The LIR instructions are appended by the LIR_List class itself;
1691 //
1692 // Notes:
1693 // - all offsets are(should be) in bytes
1694 // - local positions are specified with an offset, with offset 0 being local 0
1695
1696 class LIR_List: public CompilationResourceObj {
1697 private:
1698 LIR_OpList _operations;
1699
1700 Compilation* _compilation;
1701 #ifndef PRODUCT
1702 BlockBegin* _block;
1703 #endif
1704 #ifdef ASSERT
1705 const char * _file;
1706 int _line;
1707 #endif
1708
1709 void append(LIR_Op* op) {
1710 if (op->source() == NULL)
1711 op->set_source(_compilation->current_instruction());
1712 #ifndef PRODUCT
1713 if (PrintIRWithLIR) {
1714 _compilation->maybe_print_current_instruction();
1715 op->print(); tty->cr();
1716 }
1717 #endif // PRODUCT
1718
1719 _operations.append(op);
1720
1721 #ifdef ASSERT
1722 op->verify();
1723 op->set_file_and_line(_file, _line);
1724 _file = NULL;
1725 _line = 0;
1726 #endif
1727 }
1728
1729 public:
1730 LIR_List(Compilation* compilation, BlockBegin* block = NULL);
1731
1732 #ifdef ASSERT
1733 void set_file_and_line(const char * file, int line);
1734 #endif
1735
1736 //---------- accessors ---------------
1737 LIR_OpList* instructions_list() { return &_operations; }
1738 int length() const { return _operations.length(); }
1739 LIR_Op* at(int i) const { return _operations.at(i); }
1740
1741 NOT_PRODUCT(BlockBegin* block() const { return _block; });
1742
1743 // insert LIR_Ops in buffer to right places in LIR_List
1744 void append(LIR_InsertionBuffer* buffer);
1745
1746 //---------- mutators ---------------
1747 void insert_before(int i, LIR_List* op_list) { _operations.insert_before(i, op_list->instructions_list()); }
1748 void insert_before(int i, LIR_Op* op) { _operations.insert_before(i, op); }
1749
1750 //---------- printing -------------
1751 void print_instructions() PRODUCT_RETURN;
1752
1753
1754 //---------- instructions -------------
1755 void call_opt_virtual(ciMethod* method, LIR_Opr receiver, LIR_Opr result,
1756 address dest, LIR_OprList* arguments,
1757 CodeEmitInfo* info) {
1758 append(new LIR_OpJavaCall(lir_optvirtual_call, method, receiver, result, dest, arguments, info));
1759 }
1760 void call_static(ciMethod* method, LIR_Opr result,
1761 address dest, LIR_OprList* arguments, CodeEmitInfo* info) {
1762 append(new LIR_OpJavaCall(lir_static_call, method, LIR_OprFact::illegalOpr, result, dest, arguments, info));
1763 }
1764 void call_icvirtual(ciMethod* method, LIR_Opr receiver, LIR_Opr result,
1765 address dest, LIR_OprList* arguments, CodeEmitInfo* info) {
1766 append(new LIR_OpJavaCall(lir_icvirtual_call, method, receiver, result, dest, arguments, info));
1767 }
1768 void call_virtual(ciMethod* method, LIR_Opr receiver, LIR_Opr result,
1769 intptr_t vtable_offset, LIR_OprList* arguments, CodeEmitInfo* info) {
1770 append(new LIR_OpJavaCall(lir_virtual_call, method, receiver, result, vtable_offset, arguments, info));
1771 }
1772
1773 void get_thread(LIR_Opr result) { append(new LIR_Op0(lir_get_thread, result)); }
1774 void word_align() { append(new LIR_Op0(lir_word_align)); }
1775 void membar() { append(new LIR_Op0(lir_membar)); }
1776 void membar_acquire() { append(new LIR_Op0(lir_membar_acquire)); }
1777 void membar_release() { append(new LIR_Op0(lir_membar_release)); }
1778
1779 void nop() { append(new LIR_Op0(lir_nop)); }
1780 void build_frame() { append(new LIR_Op0(lir_build_frame)); }
1781
1782 void std_entry(LIR_Opr receiver) { append(new LIR_Op0(lir_std_entry, receiver)); }
1783 void osr_entry(LIR_Opr osrPointer) { append(new LIR_Op0(lir_osr_entry, osrPointer)); }
1784
1785 void branch_destination(Label* lbl) { append(new LIR_OpLabel(lbl)); }
1786
1787 void negate(LIR_Opr from, LIR_Opr to) { append(new LIR_Op1(lir_neg, from, to)); }
1788 void leal(LIR_Opr from, LIR_Opr result_reg) { append(new LIR_Op1(lir_leal, from, result_reg)); }
1789
1790 // result is a stack location for old backend and vreg for UseLinearScan
1791 // stack_loc_temp is an illegal register for old backend
1792 void roundfp(LIR_Opr reg, LIR_Opr stack_loc_temp, LIR_Opr result) { append(new LIR_OpRoundFP(reg, stack_loc_temp, result)); }
1793 void unaligned_move(LIR_Address* src, LIR_Opr dst) { append(new LIR_Op1(lir_move, LIR_OprFact::address(src), dst, dst->type(), lir_patch_none, NULL, lir_move_unaligned)); }
1794 void unaligned_move(LIR_Opr src, LIR_Address* dst) { append(new LIR_Op1(lir_move, src, LIR_OprFact::address(dst), src->type(), lir_patch_none, NULL, lir_move_unaligned)); }
1795 void unaligned_move(LIR_Opr src, LIR_Opr dst) { append(new LIR_Op1(lir_move, src, dst, dst->type(), lir_patch_none, NULL, lir_move_unaligned)); }
1796 void move(LIR_Opr src, LIR_Opr dst, CodeEmitInfo* info = NULL) { append(new LIR_Op1(lir_move, src, dst, dst->type(), lir_patch_none, info)); }
1797 void move(LIR_Address* src, LIR_Opr dst, CodeEmitInfo* info = NULL) { append(new LIR_Op1(lir_move, LIR_OprFact::address(src), dst, src->type(), lir_patch_none, info)); }
1798 void move(LIR_Opr src, LIR_Address* dst, CodeEmitInfo* info = NULL) { append(new LIR_Op1(lir_move, src, LIR_OprFact::address(dst), dst->type(), lir_patch_none, info)); }
1799
1800 void volatile_move(LIR_Opr src, LIR_Opr dst, BasicType type, CodeEmitInfo* info = NULL, LIR_PatchCode patch_code = lir_patch_none) { append(new LIR_Op1(lir_move, src, dst, type, patch_code, info, lir_move_volatile)); }
1801
1802 void oop2reg (jobject o, LIR_Opr reg) { append(new LIR_Op1(lir_move, LIR_OprFact::oopConst(o), reg)); }
1803 void oop2reg_patch(jobject o, LIR_Opr reg, CodeEmitInfo* info);
1804
1805 void return_op(LIR_Opr result) { append(new LIR_Op1(lir_return, result)); }
1806
1807 void safepoint(LIR_Opr tmp, CodeEmitInfo* info) { append(new LIR_Op1(lir_safepoint, tmp, info)); }
1808
1809 void convert(Bytecodes::Code code, LIR_Opr left, LIR_Opr dst, ConversionStub* stub = NULL/*, bool is_32bit = false*/) { append(new LIR_OpConvert(code, left, dst, stub)); }
1810
1811 void logical_and (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_and, left, right, dst)); }
1812 void logical_or (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_or, left, right, dst)); }
1813 void logical_xor (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_xor, left, right, dst)); }
1814
1815 void null_check(LIR_Opr opr, CodeEmitInfo* info) { append(new LIR_Op1(lir_null_check, opr, info)); }
1816 void throw_exception(LIR_Opr exceptionPC, LIR_Opr exceptionOop, CodeEmitInfo* info) { append(new LIR_Op2(lir_throw, exceptionPC, exceptionOop, LIR_OprFact::illegalOpr, info)); }
1817 void unwind_exception(LIR_Opr exceptionPC, LIR_Opr exceptionOop, CodeEmitInfo* info) { append(new LIR_Op2(lir_unwind, exceptionPC, exceptionOop, LIR_OprFact::illegalOpr, info)); }
1818
1819 void compare_to (LIR_Opr left, LIR_Opr right, LIR_Opr dst) {
1820 append(new LIR_Op2(lir_compare_to, left, right, dst));
1821 }
1822
1823 void push(LIR_Opr opr) { append(new LIR_Op1(lir_push, opr)); }
1824 void pop(LIR_Opr reg) { append(new LIR_Op1(lir_pop, reg)); }
1825
1826 void cmp(LIR_Condition condition, LIR_Opr left, LIR_Opr right, CodeEmitInfo* info = NULL) {
1827 append(new LIR_Op2(lir_cmp, condition, left, right, info));
1828 }
1829 void cmp(LIR_Condition condition, LIR_Opr left, int right, CodeEmitInfo* info = NULL) {
1830 cmp(condition, left, LIR_OprFact::intConst(right), info);
1831 }
1832
1833 void cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info);
1834 void cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Address* addr, CodeEmitInfo* info);
1835
1836 void cmove(LIR_Condition condition, LIR_Opr src1, LIR_Opr src2, LIR_Opr dst) {
1837 append(new LIR_Op2(lir_cmove, condition, src1, src2, dst));
1838 }
1839
1840 void cas_long(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, LIR_Opr t1, LIR_Opr t2);
1841 void cas_obj(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, LIR_Opr t1, LIR_Opr t2);
1842 void cas_int(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, LIR_Opr t1, LIR_Opr t2);
1843
1844 void abs (LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_abs , from, tmp, to)); }
1845 void sqrt(LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_sqrt, from, tmp, to)); }
1846 void log (LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_log, from, tmp, to)); }
1847 void log10 (LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_log10, from, tmp, to)); }
1848 void sin (LIR_Opr from, LIR_Opr to, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_Op2(lir_sin , from, tmp1, to, tmp2)); }
1849 void cos (LIR_Opr from, LIR_Opr to, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_Op2(lir_cos , from, tmp1, to, tmp2)); }
1850 void tan (LIR_Opr from, LIR_Opr to, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_Op2(lir_tan , from, tmp1, to, tmp2)); }
1851
1852 void add (LIR_Opr left, LIR_Opr right, LIR_Opr res) { append(new LIR_Op2(lir_add, left, right, res)); }
1853 void sub (LIR_Opr left, LIR_Opr right, LIR_Opr res, CodeEmitInfo* info = NULL) { append(new LIR_Op2(lir_sub, left, right, res, info)); }
1854 void mul (LIR_Opr left, LIR_Opr right, LIR_Opr res) { append(new LIR_Op2(lir_mul, left, right, res)); }
1855 void mul_strictfp (LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp) { append(new LIR_Op2(lir_mul_strictfp, left, right, res, tmp)); }
1856 void div (LIR_Opr left, LIR_Opr right, LIR_Opr res, CodeEmitInfo* info = NULL) { append(new LIR_Op2(lir_div, left, right, res, info)); }
1857 void div_strictfp (LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp) { append(new LIR_Op2(lir_div_strictfp, left, right, res, tmp)); }
1858 void rem (LIR_Opr left, LIR_Opr right, LIR_Opr res, CodeEmitInfo* info = NULL) { append(new LIR_Op2(lir_rem, left, right, res, info)); }
1859
1860 void volatile_load_mem_reg(LIR_Address* address, LIR_Opr dst, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none);
1861 void volatile_load_unsafe_reg(LIR_Opr base, LIR_Opr offset, LIR_Opr dst, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code);
1862
1863 void load(LIR_Address* addr, LIR_Opr src, CodeEmitInfo* info = NULL, LIR_PatchCode patch_code = lir_patch_none);
1864
1865 void prefetch(LIR_Address* addr, bool is_store);
1866
1867 void store_mem_int(jint v, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none);
1868 void store_mem_oop(jobject o, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none);
1869 void store(LIR_Opr src, LIR_Address* addr, CodeEmitInfo* info = NULL, LIR_PatchCode patch_code = lir_patch_none);
1870 void volatile_store_mem_reg(LIR_Opr src, LIR_Address* address, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none);
1871 void volatile_store_unsafe_reg(LIR_Opr src, LIR_Opr base, LIR_Opr offset, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code);
1872
1873 void idiv(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info);
1874 void idiv(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info);
1875 void irem(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info);
1876 void irem(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info);
1877
1878 void allocate_object(LIR_Opr dst, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, int header_size, int object_size, LIR_Opr klass, bool init_check, CodeStub* stub);
1879 void allocate_array(LIR_Opr dst, LIR_Opr len, LIR_Opr t1,LIR_Opr t2, LIR_Opr t3,LIR_Opr t4, BasicType type, LIR_Opr klass, CodeStub* stub);
1880
1881 // jump is an unconditional branch
1882 void jump(BlockBegin* block) {
1883 append(new LIR_OpBranch(lir_cond_always, T_ILLEGAL, block));
1884 }
1885 void jump(CodeStub* stub) {
1886 append(new LIR_OpBranch(lir_cond_always, T_ILLEGAL, stub));
1887 }
1888 void branch(LIR_Condition cond, Label* lbl) { append(new LIR_OpBranch(cond, lbl)); }
1889 void branch(LIR_Condition cond, BasicType type, BlockBegin* block) {
1890 assert(type != T_FLOAT && type != T_DOUBLE, "no fp comparisons");
1891 append(new LIR_OpBranch(cond, type, block));
1892 }
1893 void branch(LIR_Condition cond, BasicType type, CodeStub* stub) {
1894 assert(type != T_FLOAT && type != T_DOUBLE, "no fp comparisons");
1895 append(new LIR_OpBranch(cond, type, stub));
1896 }
1897 void branch(LIR_Condition cond, BasicType type, BlockBegin* block, BlockBegin* unordered) {
1898 assert(type == T_FLOAT || type == T_DOUBLE, "fp comparisons only");
1899 append(new LIR_OpBranch(cond, type, block, unordered));
1900 }
1901
1902 void shift_left(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp);
1903 void shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp);
1904 void unsigned_shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp);
1905
1906 void shift_left(LIR_Opr value, int count, LIR_Opr dst) { shift_left(value, LIR_OprFact::intConst(count), dst, LIR_OprFact::illegalOpr); }
1907 void shift_right(LIR_Opr value, int count, LIR_Opr dst) { shift_right(value, LIR_OprFact::intConst(count), dst, LIR_OprFact::illegalOpr); }
1908 void unsigned_shift_right(LIR_Opr value, int count, LIR_Opr dst) { unsigned_shift_right(value, LIR_OprFact::intConst(count), dst, LIR_OprFact::illegalOpr); }
1909
1910 void lcmp2int(LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_cmp_l2i, left, right, dst)); }
1911 void fcmp2int(LIR_Opr left, LIR_Opr right, LIR_Opr dst, bool is_unordered_less);
1912
1913 void call_runtime_leaf(address routine, LIR_Opr tmp, LIR_Opr result, LIR_OprList* arguments) {
1914 append(new LIR_OpRTCall(routine, tmp, result, arguments));
1915 }
1916
1917 void call_runtime(address routine, LIR_Opr tmp, LIR_Opr result,
1918 LIR_OprList* arguments, CodeEmitInfo* info) {
1919 append(new LIR_OpRTCall(routine, tmp, result, arguments, info));
1920 }
1921
1922 void load_stack_address_monitor(int monitor_ix, LIR_Opr dst) { append(new LIR_Op1(lir_monaddr, LIR_OprFact::intConst(monitor_ix), dst)); }
1923 void unlock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, CodeStub* stub);
1924 void lock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub, CodeEmitInfo* info);
1925
1926 void set_24bit_fpu() { append(new LIR_Op0(lir_24bit_FPU )); }
1927 void restore_fpu() { append(new LIR_Op0(lir_reset_FPU )); }
1928 void breakpoint() { append(new LIR_Op0(lir_breakpoint)); }
1929
1930 void arraycopy(LIR_Opr src, LIR_Opr src_pos, LIR_Opr dst, LIR_Opr dst_pos, LIR_Opr length, LIR_Opr tmp, ciArrayKlass* expected_type, int flags, CodeEmitInfo* info) { append(new LIR_OpArrayCopy(src, src_pos, dst, dst_pos, length, tmp, expected_type, flags, info)); }
1931
1932 void fpop_raw() { append(new LIR_Op0(lir_fpop_raw)); }
1933
1934 void checkcast (LIR_Opr result, LIR_Opr object, ciKlass* klass,
1935 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check,
1936 CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, CodeStub* stub,
1937 ciMethod* profiled_method, int profiled_bci);
1938 void instanceof(LIR_Opr result, LIR_Opr object, ciKlass* klass, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check, CodeEmitInfo* info_for_patch);
1939 void store_check(LIR_Opr object, LIR_Opr array, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, CodeEmitInfo* info_for_exception);
1940
1941 // methodDataOop profiling
1942 void profile_call(ciMethod* method, int bci, LIR_Opr mdo, LIR_Opr recv, LIR_Opr t1, ciKlass* cha_klass) { append(new LIR_OpProfileCall(lir_profile_call, method, bci, mdo, recv, t1, cha_klass)); }
1943 };
1944
1945 void print_LIR(BlockList* blocks);
1946
1947 class LIR_InsertionBuffer : public CompilationResourceObj {
1948 private:
1949 LIR_List* _lir; // the lir list where ops of this buffer should be inserted later (NULL when uninitialized)
1950
1951 // list of insertion points. index and count are stored alternately:
1952 // _index_and_count[i * 2]: the index into lir list where "count" ops should be inserted
1953 // _index_and_count[i * 2 + 1]: the number of ops to be inserted at index
1954 intStack _index_and_count;
1955
1956 // the LIR_Ops to be inserted
1957 LIR_OpList _ops;
1958
1959 void append_new(int index, int count) { _index_and_count.append(index); _index_and_count.append(count); }
1960 void set_index_at(int i, int value) { _index_and_count.at_put((i << 1), value); }
1961 void set_count_at(int i, int value) { _index_and_count.at_put((i << 1) + 1, value); }
1962
1963 #ifdef ASSERT
1964 void verify();
1965 #endif
1966 public:
1967 LIR_InsertionBuffer() : _lir(NULL), _index_and_count(8), _ops(8) { }
1968
1969 // must be called before using the insertion buffer
1970 void init(LIR_List* lir) { assert(!initialized(), "already initialized"); _lir = lir; _index_and_count.clear(); _ops.clear(); }
1971 bool initialized() const { return _lir != NULL; }
1972 // called automatically when the buffer is appended to the LIR_List
1973 void finish() { _lir = NULL; }
1974
1975 // accessors
1976 LIR_List* lir_list() const { return _lir; }
1977 int number_of_insertion_points() const { return _index_and_count.length() >> 1; }
1978 int index_at(int i) const { return _index_and_count.at((i << 1)); }
1979 int count_at(int i) const { return _index_and_count.at((i << 1) + 1); }
1980
1981 int number_of_ops() const { return _ops.length(); }
1982 LIR_Op* op_at(int i) const { return _ops.at(i); }
1983
1984 // append an instruction to the buffer
1985 void append(int index, LIR_Op* op);
1986
1987 // instruction
1988 void move(int index, LIR_Opr src, LIR_Opr dst, CodeEmitInfo* info = NULL) { append(index, new LIR_Op1(lir_move, src, dst, dst->type(), lir_patch_none, info)); }
1989 };
1990
1991
1992 //
1993 // LIR_OpVisitState is used for manipulating LIR_Ops in an abstract way.
1994 // Calling a LIR_Op's visit function with a LIR_OpVisitState causes
1995 // information about the input, output and temporaries used by the
1996 // op to be recorded. It also records whether the op has call semantics
1997 // and also records all the CodeEmitInfos used by this op.
1998 //
1999
2000
2001 class LIR_OpVisitState: public StackObj {
2002 public:
2003 typedef enum { inputMode, firstMode = inputMode, tempMode, outputMode, numModes, invalidMode = -1 } OprMode;
2004
2005 enum {
2006 maxNumberOfOperands = 14,
2007 maxNumberOfInfos = 4
2008 };
2009
2010 private:
2011 LIR_Op* _op;
2012
2013 // optimization: the operands and infos are not stored in a variable-length
2014 // list, but in a fixed-size array to save time of size checks and resizing
2015 int _oprs_len[numModes];
2016 LIR_Opr* _oprs_new[numModes][maxNumberOfOperands];
2017 int _info_len;
2018 CodeEmitInfo* _info_new[maxNumberOfInfos];
2019
2020 bool _has_call;
2021 bool _has_slow_case;
2022
2023
2024 // only include register operands
2025 // addresses are decomposed to the base and index registers
2026 // constants and stack operands are ignored
2027 void append(LIR_Opr& opr, OprMode mode) {
2028 assert(opr->is_valid(), "should not call this otherwise");
2029 assert(mode >= 0 && mode < numModes, "bad mode");
2030
2031 if (opr->is_register()) {
2032 assert(_oprs_len[mode] < maxNumberOfOperands, "array overflow");
2033 _oprs_new[mode][_oprs_len[mode]++] = &opr;
2034
2035 } else if (opr->is_pointer()) {
2036 LIR_Address* address = opr->as_address_ptr();
2037 if (address != NULL) {
2038 // special handling for addresses: add base and index register of the address
2039 // both are always input operands!
2040 if (address->_base->is_valid()) {
2041 assert(address->_base->is_register(), "must be");
2042 assert(_oprs_len[inputMode] < maxNumberOfOperands, "array overflow");
2043 _oprs_new[inputMode][_oprs_len[inputMode]++] = &address->_base;
2044 }
2045 if (address->_index->is_valid()) {
2046 assert(address->_index->is_register(), "must be");
2047 assert(_oprs_len[inputMode] < maxNumberOfOperands, "array overflow");
2048 _oprs_new[inputMode][_oprs_len[inputMode]++] = &address->_index;
2049 }
2050
2051 } else {
2052 assert(opr->is_constant(), "constant operands are not processed");
2053 }
2054 } else {
2055 assert(opr->is_stack(), "stack operands are not processed");
2056 }
2057 }
2058
2059 void append(CodeEmitInfo* info) {
2060 assert(info != NULL, "should not call this otherwise");
2061 assert(_info_len < maxNumberOfInfos, "array overflow");
2062 _info_new[_info_len++] = info;
2063 }
2064
2065 public:
2066 LIR_OpVisitState() { reset(); }
2067
2068 LIR_Op* op() const { return _op; }
2069 void set_op(LIR_Op* op) { reset(); _op = op; }
2070
2071 bool has_call() const { return _has_call; }
2072 bool has_slow_case() const { return _has_slow_case; }
2073
2074 void reset() {
2075 _op = NULL;
2076 _has_call = false;
2077 _has_slow_case = false;
2078
2079 _oprs_len[inputMode] = 0;
2080 _oprs_len[tempMode] = 0;
2081 _oprs_len[outputMode] = 0;
2082 _info_len = 0;
2083 }
2084
2085
2086 int opr_count(OprMode mode) const {
2087 assert(mode >= 0 && mode < numModes, "bad mode");
2088 return _oprs_len[mode];
2089 }
2090
2091 LIR_Opr opr_at(OprMode mode, int index) const {
2092 assert(mode >= 0 && mode < numModes, "bad mode");
2093 assert(index >= 0 && index < _oprs_len[mode], "index out of bound");
2094 return *_oprs_new[mode][index];
2095 }
2096
2097 void set_opr_at(OprMode mode, int index, LIR_Opr opr) const {
2098 assert(mode >= 0 && mode < numModes, "bad mode");
2099 assert(index >= 0 && index < _oprs_len[mode], "index out of bound");
2100 *_oprs_new[mode][index] = opr;
2101 }
2102
2103 int info_count() const {
2104 return _info_len;
2105 }
2106
2107 CodeEmitInfo* info_at(int index) const {
2108 assert(index < _info_len, "index out of bounds");
2109 return _info_new[index];
2110 }
2111
2112 XHandlers* all_xhandler();
2113
2114 // collects all register operands of the instruction
2115 void visit(LIR_Op* op);
2116
2117 #if ASSERT
2118 // check that an operation has no operands
2119 bool no_operands(LIR_Op* op);
2120 #endif
2121
2122 // LIR_Op visitor functions use these to fill in the state
2123 void do_input(LIR_Opr& opr) { append(opr, LIR_OpVisitState::inputMode); }
2124 void do_output(LIR_Opr& opr) { append(opr, LIR_OpVisitState::outputMode); }
2125 void do_temp(LIR_Opr& opr) { append(opr, LIR_OpVisitState::tempMode); }
2126 void do_info(CodeEmitInfo* info) { append(info); }
2127
2128 void do_stub(CodeStub* stub);
2129 void do_call() { _has_call = true; }
2130 void do_slow_case() { _has_slow_case = true; }
2131 void do_slow_case(CodeEmitInfo* info) {
2132 _has_slow_case = true;
2133 append(info);
2134 }
2135 };
2136
2137
2138 inline LIR_Opr LIR_OprDesc::illegalOpr() { return LIR_OprFact::illegalOpr; };
2139