1 #ifdef USE_PRAGMA_IDENT_SRC
2 #pragma ident "@(#)c1_LIRAssembler.cpp 1.135 07/07/02 16:50:41 JVM"
3 #endif
4 /*
5 * Copyright 2000-2006 Sun Microsystems, Inc. All Rights Reserved.
6 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
7 *
8 * This code is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License version 2 only, as
10 * published by the Free Software Foundation.
11 *
12 * This code is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 * version 2 for more details (a copy is included in the LICENSE file that
16 * accompanied this code).
17 *
18 * You should have received a copy of the GNU General Public License version
19 * 2 along with this work; if not, write to the Free Software Foundation,
20 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
21 *
22 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
23 * CA 95054 USA or visit www.sun.com if you need additional information or
24 * have any questions.
25 *
26 */
27
28 # include "incls/_precompiled.incl"
29 # include "incls/_c1_LIRAssembler.cpp.incl"
30
31
32 void LIR_Assembler::patching_epilog(PatchingStub* patch, LIR_PatchCode patch_code, Register obj, CodeEmitInfo* info) {
33 // we must have enough patching space so that call can be inserted
34 while ((intx) _masm->pc() - (intx) patch->pc_start() < NativeCall::instruction_size) {
35 _masm->nop();
36 }
37 patch->install(_masm, patch_code, obj, info);
38 append_patching_stub(patch);
39
40 #ifdef ASSERT
41 Bytecodes::Code code = info->scope()->method()->java_code_at_bci(info->bci());
42 if (patch->id() == PatchingStub::access_field_id) {
43 switch (code) {
44 case Bytecodes::_putstatic:
45 case Bytecodes::_getstatic:
46 case Bytecodes::_putfield:
47 case Bytecodes::_getfield:
48 break;
49 default:
50 ShouldNotReachHere();
51 }
52 } else if (patch->id() == PatchingStub::load_klass_id) {
53 switch (code) {
54 case Bytecodes::_putstatic:
55 case Bytecodes::_getstatic:
56 case Bytecodes::_new:
57 case Bytecodes::_anewarray:
58 case Bytecodes::_multianewarray:
59 case Bytecodes::_instanceof:
60 case Bytecodes::_checkcast:
61 case Bytecodes::_ldc:
62 case Bytecodes::_ldc_w:
63 break;
64 default:
65 ShouldNotReachHere();
66 }
67 } else {
68 ShouldNotReachHere();
69 }
70 #endif
71 }
72
73
74 //---------------------------------------------------------------
75
76
77 LIR_Assembler::LIR_Assembler(Compilation* c):
78 _compilation(c)
79 , _masm(c->masm())
80 , _frame_map(c->frame_map())
81 , _current_block(NULL)
82 , _pending_non_safepoint(NULL)
83 , _pending_non_safepoint_offset(0)
84 {
85 _slow_case_stubs = new CodeStubList();
86 }
87
88
89 LIR_Assembler::~LIR_Assembler() {
90 }
91
92
93 void LIR_Assembler::append_patching_stub(PatchingStub* stub) {
94 _slow_case_stubs->append(stub);
95 }
96
97
98 void LIR_Assembler::check_codespace() {
99 CodeSection* cs = _masm->code_section();
100 if (cs->remaining() < (int)(1*K)) {
101 BAILOUT("CodeBuffer overflow");
102 }
103 }
104
105
106 void LIR_Assembler::emit_code_stub(CodeStub* stub) {
107 _slow_case_stubs->append(stub);
108 }
109
110 void LIR_Assembler::emit_stubs(CodeStubList* stub_list) {
111 for (int m = 0; m < stub_list->length(); m++) {
112 CodeStub* s = (*stub_list)[m];
113
114 check_codespace();
115 CHECK_BAILOUT();
116
117 #ifndef PRODUCT
118 if (CommentedAssembly) {
119 stringStream st;
120 s->print_name(&st);
121 st.print(" slow case");
122 _masm->block_comment(st.as_string());
123 }
124 #endif
125 s->emit_code(this);
126 #ifdef ASSERT
127 s->assert_no_unbound_labels();
128 #endif
129 }
130 }
131
132
133 void LIR_Assembler::emit_slow_case_stubs() {
134 emit_stubs(_slow_case_stubs);
135 }
136
137
138 bool LIR_Assembler::needs_icache(ciMethod* method) const {
139 return !method->is_static();
140 }
141
142
143 int LIR_Assembler::code_offset() const {
144 return _masm->offset();
145 }
146
147
148 address LIR_Assembler::pc() const {
149 return _masm->pc();
150 }
151
152
153 void LIR_Assembler::emit_exception_entries(ExceptionInfoList* info_list) {
154 for (int i = 0; i < info_list->length(); i++) {
155 XHandlers* handlers = info_list->at(i)->exception_handlers();
156
157 for (int j = 0; j < handlers->length(); j++) {
158 XHandler* handler = handlers->handler_at(j);
159 assert(handler->lir_op_id() != -1, "handler not processed by LinearScan");
160 assert(handler->entry_code() == NULL ||
161 handler->entry_code()->instructions_list()->last()->code() == lir_branch ||
162 handler->entry_code()->instructions_list()->last()->code() == lir_delay_slot, "last operation must be branch");
163
164 if (handler->entry_pco() == -1) {
165 // entry code not emitted yet
166 if (handler->entry_code() != NULL && handler->entry_code()->instructions_list()->length() > 1) {
167 handler->set_entry_pco(code_offset());
168 if (CommentedAssembly) {
169 _masm->block_comment("Exception adapter block");
170 }
171 emit_lir_list(handler->entry_code());
172 } else {
173 handler->set_entry_pco(handler->entry_block()->exception_handler_pco());
174 }
175
176 assert(handler->entry_pco() != -1, "must be set now");
177 }
178 }
179 }
180 }
181
182
183 void LIR_Assembler::emit_code(BlockList* hir) {
184 if (PrintLIR) {
185 print_LIR(hir);
186 }
187
188 int n = hir->length();
189 for (int i = 0; i < n; i++) {
190 emit_block(hir->at(i));
191 CHECK_BAILOUT();
192 }
193
194 flush_debug_info(code_offset());
195
196 DEBUG_ONLY(check_no_unbound_labels());
197 }
198
199
200 void LIR_Assembler::emit_block(BlockBegin* block) {
201 if (block->is_set(BlockBegin::backward_branch_target_flag)) {
202 align_backward_branch_target();
203 }
204
205 // if this block is the start of an exception handler, record the
206 // PC offset of the first instruction for later construction of
207 // the ExceptionHandlerTable
208 if (block->is_set(BlockBegin::exception_entry_flag)) {
209 block->set_exception_handler_pco(code_offset());
210 }
211
212 #ifndef PRODUCT
213 if (PrintLIRWithAssembly) {
214 // don't print Phi's
215 InstructionPrinter ip(false);
216 block->print(ip);
217 }
218 #endif /* PRODUCT */
219
220 assert(block->lir() != NULL, "must have LIR");
221 IA32_ONLY(assert(_masm->rsp_offset() == 0, "frame size should be fixed"));
222
223 #ifndef PRODUCT
224 if (CommentedAssembly) {
225 stringStream st;
226 st.print_cr(" block B%d [%d, %d]", block->block_id(), block->bci(), block->end()->bci());
227 _masm->block_comment(st.as_string());
228 }
229 #endif
230
231 emit_lir_list(block->lir());
232
233 IA32_ONLY(assert(_masm->rsp_offset() == 0, "frame size should be fixed"));
234 }
235
236
237 void LIR_Assembler::emit_lir_list(LIR_List* list) {
238 peephole(list);
239
240 int n = list->length();
241 for (int i = 0; i < n; i++) {
242 LIR_Op* op = list->at(i);
243
244 check_codespace();
245 CHECK_BAILOUT();
246
247 #ifndef PRODUCT
248 if (CommentedAssembly) {
249 // Don't record out every op since that's too verbose. Print
250 // branches since they include block and stub names. Also print
251 // patching moves since they generate funny looking code.
252 if (op->code() == lir_branch ||
253 (op->code() == lir_move && op->as_Op1()->patch_code() != lir_patch_none)) {
254 stringStream st;
255 op->print_on(&st);
256 _masm->block_comment(st.as_string());
257 }
258 }
259 if (PrintLIRWithAssembly) {
260 // print out the LIR operation followed by the resulting assembly
261 list->at(i)->print(); tty->cr();
262 }
263 #endif /* PRODUCT */
264
265 op->emit_code(this);
266
267 if (compilation()->debug_info_recorder()->recording_non_safepoints()) {
268 process_debug_info(op);
269 }
270
271 #ifndef PRODUCT
272 if (PrintLIRWithAssembly) {
273 _masm->code()->decode();
274 }
275 #endif /* PRODUCT */
276 }
277 }
278
279 #ifdef ASSERT
280 void LIR_Assembler::check_no_unbound_labels() {
281 CHECK_BAILOUT();
282
283 for (int i = 0; i < _branch_target_blocks.length() - 1; i++) {
284 if (!_branch_target_blocks.at(i)->label()->is_bound()) {
285 tty->print_cr("label of block B%d is not bound", _branch_target_blocks.at(i)->block_id());
286 assert(false, "unbound label");
287 }
288 }
289 }
290 #endif
291
292 //----------------------------------debug info--------------------------------
293
294
295 void LIR_Assembler::add_debug_info_for_branch(CodeEmitInfo* info) {
296 _masm->code_section()->relocate(pc(), relocInfo::poll_type);
297 int pc_offset = code_offset();
298 flush_debug_info(pc_offset);
299 info->record_debug_info(compilation()->debug_info_recorder(), pc_offset);
300 if (info->exception_handlers() != NULL) {
301 compilation()->add_exception_handlers_for_pco(pc_offset, info->exception_handlers());
302 }
303 }
304
305
306 void LIR_Assembler::add_call_info(int pc_offset, CodeEmitInfo* cinfo) {
307 flush_debug_info(pc_offset);
308 cinfo->record_debug_info(compilation()->debug_info_recorder(), pc_offset);
309 if (cinfo->exception_handlers() != NULL) {
310 compilation()->add_exception_handlers_for_pco(pc_offset, cinfo->exception_handlers());
311 }
312 }
313
314 static ValueStack* debug_info(Instruction* ins) {
315 StateSplit* ss = ins->as_StateSplit();
316 if (ss != NULL) return ss->state();
317 return ins->lock_stack();
318 }
319
320 void LIR_Assembler::process_debug_info(LIR_Op* op) {
321 Instruction* src = op->source();
322 if (src == NULL) return;
323 int pc_offset = code_offset();
324 if (_pending_non_safepoint == src) {
325 _pending_non_safepoint_offset = pc_offset;
326 return;
327 }
328 ValueStack* vstack = debug_info(src);
329 if (vstack == NULL) return;
330 if (_pending_non_safepoint != NULL) {
331 // Got some old debug info. Get rid of it.
332 if (_pending_non_safepoint->bci() == src->bci() &&
333 debug_info(_pending_non_safepoint) == vstack) {
334 _pending_non_safepoint_offset = pc_offset;
335 return;
336 }
337 if (_pending_non_safepoint_offset < pc_offset) {
338 record_non_safepoint_debug_info();
339 }
340 _pending_non_safepoint = NULL;
341 }
342 // Remember the debug info.
343 if (pc_offset > compilation()->debug_info_recorder()->last_pc_offset()) {
344 _pending_non_safepoint = src;
345 _pending_non_safepoint_offset = pc_offset;
346 }
347 }
348
349 // Index caller states in s, where 0 is the oldest, 1 its callee, etc.
350 // Return NULL if n is too large.
351 // Returns the caller_bci for the next-younger state, also.
352 static ValueStack* nth_oldest(ValueStack* s, int n, int& bci_result) {
353 ValueStack* t = s;
354 for (int i = 0; i < n; i++) {
355 if (t == NULL) break;
356 t = t->caller_state();
357 }
358 if (t == NULL) return NULL;
359 for (;;) {
360 ValueStack* tc = t->caller_state();
361 if (tc == NULL) return s;
362 t = tc;
363 bci_result = s->scope()->caller_bci();
364 s = s->caller_state();
365 }
366 }
367
368 void LIR_Assembler::record_non_safepoint_debug_info() {
369 int pc_offset = _pending_non_safepoint_offset;
370 ValueStack* vstack = debug_info(_pending_non_safepoint);
371 int bci = _pending_non_safepoint->bci();
372
373 DebugInformationRecorder* debug_info = compilation()->debug_info_recorder();
374 assert(debug_info->recording_non_safepoints(), "sanity");
375
376 debug_info->add_non_safepoint(pc_offset);
377
378 // Visit scopes from oldest to youngest.
379 for (int n = 0; ; n++) {
380 int s_bci = bci;
381 ValueStack* s = nth_oldest(vstack, n, s_bci);
382 if (s == NULL) break;
383 IRScope* scope = s->scope();
384 debug_info->describe_scope(pc_offset, scope->method(), s_bci);
385 }
386
387 debug_info->end_non_safepoint(pc_offset);
388 }
389
390
391 void LIR_Assembler::add_debug_info_for_null_check_here(CodeEmitInfo* cinfo) {
392 add_debug_info_for_null_check(code_offset(), cinfo);
393 }
394
395 void LIR_Assembler::add_debug_info_for_null_check(int pc_offset, CodeEmitInfo* cinfo) {
396 ImplicitNullCheckStub* stub = new ImplicitNullCheckStub(pc_offset, cinfo);
397 emit_code_stub(stub);
398 }
399
400 void LIR_Assembler::add_debug_info_for_div0_here(CodeEmitInfo* info) {
401 add_debug_info_for_div0(code_offset(), info);
402 }
403
404 void LIR_Assembler::add_debug_info_for_div0(int pc_offset, CodeEmitInfo* cinfo) {
405 DivByZeroStub* stub = new DivByZeroStub(pc_offset, cinfo);
406 emit_code_stub(stub);
407 }
408
409 void LIR_Assembler::emit_rtcall(LIR_OpRTCall* op) {
410 rt_call(op->result_opr(), op->addr(), op->arguments(), op->tmp(), op->info());
411 }
412
413
414 void LIR_Assembler::emit_call(LIR_OpJavaCall* op) {
415 verify_oop_map(op->info());
416
417 if (os::is_MP()) {
418 // must align calls sites, otherwise they can't be updated atomically on MP hardware
419 align_call(op->code());
420 }
421
422 // emit the static call stub stuff out of line
423 emit_static_call_stub();
424
425 switch (op->code()) {
426 case lir_static_call:
427 call(op->addr(), relocInfo::static_call_type, op->info());
428 break;
429 case lir_optvirtual_call:
430 call(op->addr(), relocInfo::opt_virtual_call_type, op->info());
431 break;
432 case lir_icvirtual_call:
433 ic_call(op->addr(), op->info());
434 break;
435 case lir_virtual_call:
436 vtable_call(op->vtable_offset(), op->info());
437 break;
438 default: ShouldNotReachHere();
439 }
440 #if defined(IA32) && defined(TIERED)
441 // C2 leave fpu stack dirty clean it
442 if (UseSSE < 2) {
443 int i;
444 for ( i = 1; i <= 7 ; i++ ) {
445 ffree(i);
446 }
447 if (!op->result_opr()->is_float_kind()) {
448 ffree(0);
449 }
450 }
451 #endif // IA32 && TIERED
452 }
453
454
455 void LIR_Assembler::emit_opLabel(LIR_OpLabel* op) {
456 _masm->bind (*(op->label()));
457 }
458
459
460 void LIR_Assembler::emit_op1(LIR_Op1* op) {
461 switch (op->code()) {
462 case lir_move:
463 if (op->move_kind() == lir_move_volatile) {
464 assert(op->patch_code() == lir_patch_none, "can't patch volatiles");
465 volatile_move_op(op->in_opr(), op->result_opr(), op->type(), op->info());
466 } else {
467 move_op(op->in_opr(), op->result_opr(), op->type(),
468 op->patch_code(), op->info(), op->pop_fpu_stack(), op->move_kind() == lir_move_unaligned);
469 }
470 break;
471
472 case lir_prefetchr:
473 prefetchr(op->in_opr());
474 break;
475
476 case lir_prefetchw:
477 prefetchw(op->in_opr());
478 break;
479
480 case lir_roundfp: {
481 LIR_OpRoundFP* round_op = op->as_OpRoundFP();
482 roundfp_op(round_op->in_opr(), round_op->tmp(), round_op->result_opr(), round_op->pop_fpu_stack());
483 break;
484 }
485
486 case lir_return:
487 return_op(op->in_opr());
488 break;
489
490 case lir_safepoint:
491 if (compilation()->debug_info_recorder()->last_pc_offset() == code_offset()) {
492 _masm->nop();
493 }
494 safepoint_poll(op->in_opr(), op->info());
495 break;
496
497 case lir_fxch:
498 fxch(op->in_opr()->as_jint());
499 break;
500
501 case lir_fld:
502 fld(op->in_opr()->as_jint());
503 break;
504
505 case lir_ffree:
506 ffree(op->in_opr()->as_jint());
507 break;
508
509 case lir_branch:
510 break;
511
512 case lir_push:
513 push(op->in_opr());
514 break;
515
516 case lir_pop:
517 pop(op->in_opr());
518 break;
519
520 case lir_neg:
521 negate(op->in_opr(), op->result_opr());
522 break;
523
524 case lir_leal:
525 leal(op->in_opr(), op->result_opr());
526 break;
527
528 case lir_null_check:
529 if (GenerateCompilerNullChecks) {
530 add_debug_info_for_null_check_here(op->info());
531
532 if (op->in_opr()->is_single_cpu()) {
533 _masm->null_check(op->in_opr()->as_register());
534 } else {
535 Unimplemented();
536 }
537 }
538 break;
539
540 case lir_monaddr:
541 monitor_address(op->in_opr()->as_constant_ptr()->as_jint(), op->result_opr());
542 break;
543
544 default:
545 Unimplemented();
546 break;
547 }
548 }
549
550
551 void LIR_Assembler::emit_op0(LIR_Op0* op) {
552 switch (op->code()) {
553 case lir_word_align: {
554 while (code_offset() % BytesPerWord != 0) {
555 _masm->nop();
556 }
557 break;
558 }
559
560 case lir_nop:
561 assert(op->info() == NULL, "not supported");
562 _masm->nop();
563 break;
564
565 case lir_label:
566 Unimplemented();
567 break;
568
569 case lir_build_frame:
570 build_frame();
571 break;
572
573 case lir_std_entry:
574 // init offsets
575 offsets()->set_value(CodeOffsets::OSR_Entry, _masm->offset());
576 _masm->align(CodeEntryAlignment);
577 if (needs_icache(compilation()->method())) {
578 check_icache();
579 }
580 offsets()->set_value(CodeOffsets::Verified_Entry, _masm->offset());
581 _masm->verified_entry();
582 build_frame();
583 offsets()->set_value(CodeOffsets::Frame_Complete, _masm->offset());
584 break;
585
586 case lir_osr_entry:
587 offsets()->set_value(CodeOffsets::OSR_Entry, _masm->offset());
588 osr_entry();
589 break;
590
591 case lir_24bit_FPU:
592 set_24bit_FPU();
593 break;
594
595 case lir_reset_FPU:
596 reset_FPU();
597 break;
598
599 case lir_breakpoint:
600 breakpoint();
601 break;
602
603 case lir_fpop_raw:
604 fpop();
605 break;
606
607 case lir_membar:
608 membar();
609 break;
610
611 case lir_membar_acquire:
612 membar_acquire();
613 break;
614
615 case lir_membar_release:
616 membar_release();
617 break;
618
619 case lir_get_thread:
620 get_thread(op->result_opr());
621 break;
622
623 default:
624 ShouldNotReachHere();
625 break;
626 }
627 }
628
629
630 void LIR_Assembler::emit_op2(LIR_Op2* op) {
631 switch (op->code()) {
632 case lir_cmp:
633 if (op->info() != NULL) {
634 assert(op->in_opr1()->is_address() || op->in_opr2()->is_address(),
635 "shouldn't be codeemitinfo for non-address operands");
636 add_debug_info_for_null_check_here(op->info()); // exception possible
637 }
638 comp_op(op->condition(), op->in_opr1(), op->in_opr2(), op);
639 break;
640
641 case lir_cmp_l2i:
642 case lir_cmp_fd2i:
643 case lir_ucmp_fd2i:
644 comp_fl2i(op->code(), op->in_opr1(), op->in_opr2(), op->result_opr(), op);
645 break;
646
647 case lir_cmove:
648 cmove(op->condition(), op->in_opr1(), op->in_opr2(), op->result_opr());
649 break;
650
651 case lir_shl:
652 case lir_shr:
653 case lir_ushr:
654 if (op->in_opr2()->is_constant()) {
655 shift_op(op->code(), op->in_opr1(), op->in_opr2()->as_constant_ptr()->as_jint(), op->result_opr());
656 } else {
657 shift_op(op->code(), op->in_opr1(), op->in_opr2(), op->result_opr(), op->tmp_opr());
658 }
659 break;
660
661 case lir_add:
662 case lir_sub:
663 case lir_mul:
664 case lir_mul_strictfp:
665 case lir_div:
666 case lir_div_strictfp:
667 case lir_rem:
668 assert(op->fpu_pop_count() < 2, "");
669 arith_op(
670 op->code(),
671 op->in_opr1(),
672 op->in_opr2(),
673 op->result_opr(),
674 op->info(),
675 op->fpu_pop_count() == 1);
676 break;
677
678 case lir_abs:
679 case lir_sqrt:
680 case lir_sin:
681 case lir_tan:
682 case lir_cos:
683 case lir_log:
684 case lir_log10:
685 intrinsic_op(op->code(), op->in_opr1(), op->in_opr2(), op->result_opr(), op);
686 break;
687
688 case lir_logic_and:
689 case lir_logic_or:
690 case lir_logic_xor:
691 logic_op(
692 op->code(),
693 op->in_opr1(),
694 op->in_opr2(),
695 op->result_opr());
696 break;
697
698 case lir_throw:
699 case lir_unwind:
700 throw_op(op->in_opr1(), op->in_opr2(), op->info(), op->code() == lir_unwind);
701 break;
702
703 default:
704 Unimplemented();
705 break;
706 }
707 }
708
709
710 void LIR_Assembler::build_frame() {
711 _masm->build_frame(initial_frame_size_in_bytes());
712 }
713
714
715 void LIR_Assembler::roundfp_op(LIR_Opr src, LIR_Opr tmp, LIR_Opr dest, bool pop_fpu_stack) {
716 assert((src->is_single_fpu() && dest->is_single_stack()) ||
717 (src->is_double_fpu() && dest->is_double_stack()),
718 "round_fp: rounds register -> stack location");
719
720 reg2stack (src, dest, src->type(), pop_fpu_stack);
721 }
722
723
724 void LIR_Assembler::move_op(LIR_Opr src, LIR_Opr dest, BasicType type, LIR_PatchCode patch_code, CodeEmitInfo* info, bool pop_fpu_stack, bool unaligned) {
725 if (src->is_register()) {
726 if (dest->is_register()) {
727 assert(patch_code == lir_patch_none && info == NULL, "no patching and info allowed here");
728 reg2reg(src, dest);
729 } else if (dest->is_stack()) {
730 assert(patch_code == lir_patch_none && info == NULL, "no patching and info allowed here");
731 reg2stack(src, dest, type, pop_fpu_stack);
732 } else if (dest->is_address()) {
733 reg2mem(src, dest, type, patch_code, info, pop_fpu_stack, unaligned);
734 } else {
735 ShouldNotReachHere();
736 }
737
738 } else if (src->is_stack()) {
739 assert(patch_code == lir_patch_none && info == NULL, "no patching and info allowed here");
740 if (dest->is_register()) {
741 stack2reg(src, dest, type);
742 } else if (dest->is_stack()) {
743 stack2stack(src, dest, type);
744 } else {
745 ShouldNotReachHere();
746 }
747
748 } else if (src->is_constant()) {
749 if (dest->is_register()) {
750 const2reg(src, dest, patch_code, info); // patching is possible
751 } else if (dest->is_stack()) {
752 assert(patch_code == lir_patch_none && info == NULL, "no patching and info allowed here");
753 const2stack(src, dest);
754 } else if (dest->is_address()) {
755 assert(patch_code == lir_patch_none, "no patching allowed here");
756 const2mem(src, dest, type, info);
757 } else {
758 ShouldNotReachHere();
759 }
760
761 } else if (src->is_address()) {
762 mem2reg(src, dest, type, patch_code, info, unaligned);
763
764 } else {
765 ShouldNotReachHere();
766 }
767 }
768
769
770 void LIR_Assembler::verify_oop_map(CodeEmitInfo* info) {
771 #ifndef PRODUCT
772 if (VerifyOopMaps || VerifyOops) {
773 bool v = VerifyOops;
774 VerifyOops = true;
775 OopMapStream s(info->oop_map());
776 while (!s.is_done()) {
777 OopMapValue v = s.current();
778 if (v.is_oop()) {
779 VMReg r = v.reg();
780 if (!r->is_stack()) {
781 stringStream st;
782 st.print("bad oop %s at %d", r->as_Register()->name(), _masm->offset());
783 #ifdef SPARC
784 _masm->_verify_oop(r->as_Register(), strdup(st.as_string()), __FILE__, __LINE__);
785 #else
786 _masm->verify_oop(r->as_Register());
787 #endif
788 } else {
789 _masm->verify_stack_oop(r->reg2stack() * VMRegImpl::stack_slot_size);
790 }
791 }
792 s.next();
793 }
794 VerifyOops = v;
795 }
796 #endif
797 }
798
799
800