1 #ifdef USE_PRAGMA_IDENT_HDR
2 #pragma ident "@(#)c1_LIRAssembler.hpp 1.116 07/05/05 17:05:08 JVM"
3 #endif
4 /*
5 * Copyright 2000-2006 Sun Microsystems, Inc. All Rights Reserved.
6 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
7 *
8 * This code is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License version 2 only, as
10 * published by the Free Software Foundation.
11 *
12 * This code is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 * version 2 for more details (a copy is included in the LICENSE file that
16 * accompanied this code).
17 *
18 * You should have received a copy of the GNU General Public License version
19 * 2 along with this work; if not, write to the Free Software Foundation,
20 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
21 *
22 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
23 * CA 95054 USA or visit www.sun.com if you need additional information or
24 * have any questions.
25 *
26 */
27
28 class Compilation;
29 class ScopeValue;
30
31 class LIR_Assembler: public CompilationResourceObj {
32 private:
33 C1_MacroAssembler* _masm;
34 CodeStubList* _slow_case_stubs;
35
36 Compilation* _compilation;
37 FrameMap* _frame_map;
38 BlockBegin* _current_block;
39
40 Instruction* _pending_non_safepoint;
41 int _pending_non_safepoint_offset;
42
43 #ifdef ASSERT
44 BlockList _branch_target_blocks;
45 void check_no_unbound_labels();
46 #endif
47
48 FrameMap* frame_map() const { return _frame_map; }
49
50 void set_current_block(BlockBegin* b) { _current_block = b; }
51 BlockBegin* current_block() const { return _current_block; }
52
53 // non-safepoint debug info management
54 void flush_debug_info(int before_pc_offset) {
55 if (_pending_non_safepoint != NULL) {
56 if (_pending_non_safepoint_offset < before_pc_offset)
57 record_non_safepoint_debug_info();
58 _pending_non_safepoint = NULL;
59 }
60 }
61 void process_debug_info(LIR_Op* op);
62 void record_non_safepoint_debug_info();
63
64 // unified bailout support
65 void bailout(const char* msg) const { compilation()->bailout(msg); }
66 bool bailed_out() const { return compilation()->bailed_out(); }
67
68 // code emission patterns and accessors
69 void check_codespace();
70 bool needs_icache(ciMethod* method) const;
71
72 // returns offset of icache check
73 int check_icache();
74
75 void jobject2reg(jobject o, Register reg);
76 void jobject2reg_with_patching(Register reg, CodeEmitInfo* info);
77
78 void emit_stubs(CodeStubList* stub_list);
79
80 // addresses
81 static Address as_Address(LIR_Address* addr);
82 static Address as_Address_lo(LIR_Address* addr);
83 static Address as_Address_hi(LIR_Address* addr);
84
85 // debug information
86 void add_call_info(int pc_offset, CodeEmitInfo* cinfo);
87 void add_debug_info_for_branch(CodeEmitInfo* info);
88 void add_debug_info_for_div0(int pc_offset, CodeEmitInfo* cinfo);
89 void add_debug_info_for_div0_here(CodeEmitInfo* info);
90 void add_debug_info_for_null_check(int pc_offset, CodeEmitInfo* cinfo);
91 void add_debug_info_for_null_check_here(CodeEmitInfo* info);
92
93 void set_24bit_FPU();
94 void reset_FPU();
95 void fpop();
96 void fxch(int i);
97 void fld(int i);
98 void ffree(int i);
99
100 void breakpoint();
101 void push(LIR_Opr opr);
102 void pop(LIR_Opr opr);
103
104 // patching
105 void append_patching_stub(PatchingStub* stub);
106 void patching_epilog(PatchingStub* patch, LIR_PatchCode patch_code, Register obj, CodeEmitInfo* info);
107
108 void comp_op(LIR_Condition condition, LIR_Opr src, LIR_Opr result, LIR_Op2* op);
109
110 public:
111 LIR_Assembler(Compilation* c);
112 ~LIR_Assembler();
113 C1_MacroAssembler* masm() const { return _masm; }
114 Compilation* compilation() const { return _compilation; }
115 ciMethod* method() const { return compilation()->method(); }
116
117 CodeOffsets* offsets() const { return _compilation->offsets(); }
118 int code_offset() const;
119 address pc() const;
120
121 int initial_frame_size_in_bytes();
122
123 // test for constants which can be encoded directly in instructions
124 static bool is_small_constant(LIR_Opr opr);
125
126 static LIR_Opr receiverOpr();
127 static LIR_Opr incomingReceiverOpr();
128 static LIR_Opr osrBufferPointer();
129
130 // stubs
131 void emit_slow_case_stubs();
132 void emit_static_call_stub();
133 void emit_code_stub(CodeStub* op);
134 void add_call_info_here(CodeEmitInfo* info) { add_call_info(code_offset(), info); }
135
136 // code patterns
137 void emit_exception_handler();
138 void emit_exception_entries(ExceptionInfoList* info_list);
139 void emit_deopt_handler();
140
141 void emit_code(BlockList* hir);
142 void emit_block(BlockBegin* block);
143 void emit_lir_list(LIR_List* list);
144
145 // any last minute peephole optimizations are performed here. In
146 // particular sparc uses this for delay slot filling.
147 void peephole(LIR_List* list);
148
149 void emit_string_compare(LIR_Opr left, LIR_Opr right, LIR_Opr dst, CodeEmitInfo* info);
150
151 void return_op(LIR_Opr result);
152
153 // returns offset of poll instruction
154 int safepoint_poll(LIR_Opr result, CodeEmitInfo* info);
155
156 void const2reg (LIR_Opr src, LIR_Opr dest, LIR_PatchCode patch_code, CodeEmitInfo* info);
157 void const2stack(LIR_Opr src, LIR_Opr dest);
158 void const2mem (LIR_Opr src, LIR_Opr dest, BasicType type, CodeEmitInfo* info);
159 void reg2stack (LIR_Opr src, LIR_Opr dest, BasicType type, bool pop_fpu_stack);
160 void reg2reg (LIR_Opr src, LIR_Opr dest);
161 void reg2mem (LIR_Opr src, LIR_Opr dest, BasicType type, LIR_PatchCode patch_code, CodeEmitInfo* info, bool pop_fpu_stack, bool unaligned);
162 void stack2reg (LIR_Opr src, LIR_Opr dest, BasicType type);
163 void stack2stack(LIR_Opr src, LIR_Opr dest, BasicType type);
164 void mem2reg (LIR_Opr src, LIR_Opr dest, BasicType type,
165 LIR_PatchCode patch_code = lir_patch_none,
166 CodeEmitInfo* info = NULL, bool unaligned = false);
167
168 void prefetchr (LIR_Opr src);
169 void prefetchw (LIR_Opr src);
170
171 void shift_op(LIR_Code code, LIR_Opr left, LIR_Opr count, LIR_Opr dest, LIR_Opr tmp);
172 void shift_op(LIR_Code code, LIR_Opr left, jint count, LIR_Opr dest);
173
174 void move_regs(Register from_reg, Register to_reg);
175 void swap_reg(Register a, Register b);
176
177 void emit_op0(LIR_Op0* op);
178 void emit_op1(LIR_Op1* op);
179 void emit_op2(LIR_Op2* op);
180 void emit_op3(LIR_Op3* op);
181 void emit_opBranch(LIR_OpBranch* op);
182 void emit_opLabel(LIR_OpLabel* op);
183 void emit_arraycopy(LIR_OpArrayCopy* op);
184 void emit_opConvert(LIR_OpConvert* op);
185 void emit_alloc_obj(LIR_OpAllocObj* op);
186 void emit_alloc_array(LIR_OpAllocArray* op);
187 void emit_opTypeCheck(LIR_OpTypeCheck* op);
188 void emit_compare_and_swap(LIR_OpCompareAndSwap* op);
189 void emit_lock(LIR_OpLock* op);
190 void emit_call(LIR_OpJavaCall* op);
191 void emit_rtcall(LIR_OpRTCall* op);
192 void emit_profile_call(LIR_OpProfileCall* op);
193 void emit_delay(LIR_OpDelay* op);
194
195 void arith_op(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr dest, CodeEmitInfo* info, bool pop_fpu_stack);
196 void arithmetic_idiv(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr temp, LIR_Opr result, CodeEmitInfo* info);
197 void intrinsic_op(LIR_Code code, LIR_Opr value, LIR_Opr unused, LIR_Opr dest, LIR_Op* op);
198
199 void logic_op(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr dest);
200
201 void roundfp_op(LIR_Opr src, LIR_Opr tmp, LIR_Opr dest, bool pop_fpu_stack);
202 void move_op(LIR_Opr src, LIR_Opr result, BasicType type,
203 LIR_PatchCode patch_code, CodeEmitInfo* info, bool pop_fpu_stack, bool unaligned);
204 void volatile_move_op(LIR_Opr src, LIR_Opr result, BasicType type, CodeEmitInfo* info);
205 void comp_mem_op(LIR_Opr src, LIR_Opr result, BasicType type, CodeEmitInfo* info); // info set for null exceptions
206 void comp_fl2i(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr result, LIR_Op2* op);
207 void cmove(LIR_Condition code, LIR_Opr left, LIR_Opr right, LIR_Opr result);
208
209 void ic_call(address destination, CodeEmitInfo* info);
210 void vtable_call(int vtable_offset, CodeEmitInfo* info);
211 void call(address entry, relocInfo::relocType rtype, CodeEmitInfo* info);
212
213 void osr_entry();
214
215 void build_frame();
216
217 void throw_op(LIR_Opr exceptionPC, LIR_Opr exceptionOop, CodeEmitInfo* info, bool unwind);
218 void monitor_address(int monitor_ix, LIR_Opr dst);
219
220 void align_backward_branch_target();
221 void align_call(LIR_Code code);
222
223 void negate(LIR_Opr left, LIR_Opr dest);
224 void leal(LIR_Opr left, LIR_Opr dest);
225
226 void rt_call(LIR_Opr result, address dest, const LIR_OprList* args, LIR_Opr tmp, CodeEmitInfo* info);
227
228 void membar();
229 void membar_acquire();
230 void membar_release();
231 void get_thread(LIR_Opr result);
232
233 void verify_oop_map(CodeEmitInfo* info);
234
235 #include "incls/_c1_LIRAssembler_pd.hpp.incl"
236 };