1 #ifdef USE_PRAGMA_IDENT_HDR 2 #pragma ident "@(#)c1_LIRAssembler.hpp 1.116 07/05/05 17:05:08 JVM" 3 #endif 4 /* 5 * Copyright 2000-2008 Sun Microsystems, Inc. All Rights Reserved. 6 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 7 * 8 * This code is free software; you can redistribute it and/or modify it 9 * under the terms of the GNU General Public License version 2 only, as 10 * published by the Free Software Foundation. 11 * 12 * This code is distributed in the hope that it will be useful, but WITHOUT 13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 15 * version 2 for more details (a copy is included in the LICENSE file that 16 * accompanied this code). 17 * 18 * You should have received a copy of the GNU General Public License version 19 * 2 along with this work; if not, write to the Free Software Foundation, 20 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 21 * 22 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, 23 * CA 95054 USA or visit www.sun.com if you need additional information or 24 * have any questions. 25 * 26 */ 27 28 class Compilation; 29 class ScopeValue; 30 class BarrierSet; 31 32 class LIR_Assembler: public CompilationResourceObj { 33 private: 34 C1_MacroAssembler* _masm; 35 CodeStubList* _slow_case_stubs; 36 BarrierSet* _bs; 37 38 Compilation* _compilation; 39 FrameMap* _frame_map; 40 BlockBegin* _current_block; 41 42 Instruction* _pending_non_safepoint; 43 int _pending_non_safepoint_offset; 44 45 #ifdef ASSERT 46 BlockList _branch_target_blocks; 47 void check_no_unbound_labels(); 48 #endif 49 50 FrameMap* frame_map() const { return _frame_map; } 51 52 void set_current_block(BlockBegin* b) { _current_block = b; } 53 BlockBegin* current_block() const { return _current_block; } 54 55 // non-safepoint debug info management 56 void flush_debug_info(int before_pc_offset) { 57 if (_pending_non_safepoint != NULL) { 58 if (_pending_non_safepoint_offset < before_pc_offset) 59 record_non_safepoint_debug_info(); 60 _pending_non_safepoint = NULL; 61 } 62 } 63 void process_debug_info(LIR_Op* op); 64 void record_non_safepoint_debug_info(); 65 66 // unified bailout support 67 void bailout(const char* msg) const { compilation()->bailout(msg); } 68 bool bailed_out() const { return compilation()->bailed_out(); } 69 70 // code emission patterns and accessors 71 void check_codespace(); 72 bool needs_icache(ciMethod* method) const; 73 74 // returns offset of icache check 75 int check_icache(); 76 77 void jobject2reg(jobject o, Register reg); 78 void jobject2reg_with_patching(Register reg, CodeEmitInfo* info); 79 80 void emit_stubs(CodeStubList* stub_list); 81 82 // addresses 83 Address as_Address(LIR_Address* addr); 84 Address as_Address_lo(LIR_Address* addr); 85 Address as_Address_hi(LIR_Address* addr); 86 87 // debug information 88 void add_call_info(int pc_offset, CodeEmitInfo* cinfo); 89 void add_debug_info_for_branch(CodeEmitInfo* info); 90 void add_debug_info_for_div0(int pc_offset, CodeEmitInfo* cinfo); 91 void add_debug_info_for_div0_here(CodeEmitInfo* info); 92 void add_debug_info_for_null_check(int pc_offset, CodeEmitInfo* cinfo); 93 void add_debug_info_for_null_check_here(CodeEmitInfo* info); 94 95 void set_24bit_FPU(); 96 void reset_FPU(); 97 void fpop(); 98 void fxch(int i); 99 void fld(int i); 100 void ffree(int i); 101 102 void breakpoint(); 103 void push(LIR_Opr opr); 104 void pop(LIR_Opr opr); 105 106 // patching 107 void append_patching_stub(PatchingStub* stub); 108 void patching_epilog(PatchingStub* patch, LIR_PatchCode patch_code, Register obj, CodeEmitInfo* info); 109 110 void comp_op(LIR_Condition condition, LIR_Opr src, LIR_Opr result, LIR_Op2* op); 111 112 public: 113 LIR_Assembler(Compilation* c); 114 ~LIR_Assembler(); 115 C1_MacroAssembler* masm() const { return _masm; } 116 Compilation* compilation() const { return _compilation; } 117 ciMethod* method() const { return compilation()->method(); } 118 119 CodeOffsets* offsets() const { return _compilation->offsets(); } 120 int code_offset() const; 121 address pc() const; 122 123 int initial_frame_size_in_bytes(); 124 125 // test for constants which can be encoded directly in instructions 126 static bool is_small_constant(LIR_Opr opr); 127 128 static LIR_Opr receiverOpr(); 129 static LIR_Opr incomingReceiverOpr(); 130 static LIR_Opr osrBufferPointer(); 131 132 // stubs 133 void emit_slow_case_stubs(); 134 void emit_static_call_stub(); 135 void emit_code_stub(CodeStub* op); 136 void add_call_info_here(CodeEmitInfo* info) { add_call_info(code_offset(), info); } 137 138 // code patterns 139 void emit_exception_handler(); 140 void emit_exception_entries(ExceptionInfoList* info_list); 141 void emit_deopt_handler(); 142 143 void emit_code(BlockList* hir); 144 void emit_block(BlockBegin* block); 145 void emit_lir_list(LIR_List* list); 146 147 // any last minute peephole optimizations are performed here. In 148 // particular sparc uses this for delay slot filling. 149 void peephole(LIR_List* list); 150 151 void emit_string_compare(LIR_Opr left, LIR_Opr right, LIR_Opr dst, CodeEmitInfo* info); 152 153 void return_op(LIR_Opr result); 154 155 // returns offset of poll instruction 156 int safepoint_poll(LIR_Opr result, CodeEmitInfo* info); 157 158 void const2reg (LIR_Opr src, LIR_Opr dest, LIR_PatchCode patch_code, CodeEmitInfo* info); 159 void const2stack(LIR_Opr src, LIR_Opr dest); 160 void const2mem (LIR_Opr src, LIR_Opr dest, BasicType type, CodeEmitInfo* info); 161 void reg2stack (LIR_Opr src, LIR_Opr dest, BasicType type, bool pop_fpu_stack); 162 void reg2reg (LIR_Opr src, LIR_Opr dest); 163 void reg2mem (LIR_Opr src, LIR_Opr dest, BasicType type, LIR_PatchCode patch_code, CodeEmitInfo* info, bool pop_fpu_stack, bool unaligned); 164 void stack2reg (LIR_Opr src, LIR_Opr dest, BasicType type); 165 void stack2stack(LIR_Opr src, LIR_Opr dest, BasicType type); 166 void mem2reg (LIR_Opr src, LIR_Opr dest, BasicType type, 167 LIR_PatchCode patch_code = lir_patch_none, 168 CodeEmitInfo* info = NULL, bool unaligned = false); 169 170 void prefetchr (LIR_Opr src); 171 void prefetchw (LIR_Opr src); 172 173 void shift_op(LIR_Code code, LIR_Opr left, LIR_Opr count, LIR_Opr dest, LIR_Opr tmp); 174 void shift_op(LIR_Code code, LIR_Opr left, jint count, LIR_Opr dest); 175 176 void move_regs(Register from_reg, Register to_reg); 177 void swap_reg(Register a, Register b); 178 179 void emit_op0(LIR_Op0* op); 180 void emit_op1(LIR_Op1* op); 181 void emit_op2(LIR_Op2* op); 182 void emit_op3(LIR_Op3* op); 183 void emit_opBranch(LIR_OpBranch* op); 184 void emit_opLabel(LIR_OpLabel* op); 185 void emit_arraycopy(LIR_OpArrayCopy* op); 186 void emit_opConvert(LIR_OpConvert* op); 187 void emit_alloc_obj(LIR_OpAllocObj* op); 188 void emit_alloc_array(LIR_OpAllocArray* op); 189 void emit_opTypeCheck(LIR_OpTypeCheck* op); 190 void emit_compare_and_swap(LIR_OpCompareAndSwap* op); 191 void emit_lock(LIR_OpLock* op); 192 void emit_call(LIR_OpJavaCall* op); 193 void emit_rtcall(LIR_OpRTCall* op); 194 void emit_profile_call(LIR_OpProfileCall* op); 195 void emit_delay(LIR_OpDelay* op); 196 197 void arith_op(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr dest, CodeEmitInfo* info, bool pop_fpu_stack); 198 void arithmetic_idiv(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr temp, LIR_Opr result, CodeEmitInfo* info); 199 void intrinsic_op(LIR_Code code, LIR_Opr value, LIR_Opr unused, LIR_Opr dest, LIR_Op* op); 200 201 void logic_op(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr dest); 202 203 void roundfp_op(LIR_Opr src, LIR_Opr tmp, LIR_Opr dest, bool pop_fpu_stack); 204 void move_op(LIR_Opr src, LIR_Opr result, BasicType type, 205 LIR_PatchCode patch_code, CodeEmitInfo* info, bool pop_fpu_stack, bool unaligned); 206 void volatile_move_op(LIR_Opr src, LIR_Opr result, BasicType type, CodeEmitInfo* info); 207 void comp_mem_op(LIR_Opr src, LIR_Opr result, BasicType type, CodeEmitInfo* info); // info set for null exceptions 208 void comp_fl2i(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr result, LIR_Op2* op); 209 void cmove(LIR_Condition code, LIR_Opr left, LIR_Opr right, LIR_Opr result); 210 211 void ic_call(address destination, CodeEmitInfo* info); 212 void vtable_call(int vtable_offset, CodeEmitInfo* info); 213 void call(address entry, relocInfo::relocType rtype, CodeEmitInfo* info); 214 215 void osr_entry(); 216 217 void build_frame(); 218 219 void throw_op(LIR_Opr exceptionPC, LIR_Opr exceptionOop, CodeEmitInfo* info, bool unwind); 220 void monitor_address(int monitor_ix, LIR_Opr dst); 221 222 void align_backward_branch_target(); 223 void align_call(LIR_Code code); 224 225 void negate(LIR_Opr left, LIR_Opr dest); 226 void leal(LIR_Opr left, LIR_Opr dest); 227 228 void rt_call(LIR_Opr result, address dest, const LIR_OprList* args, LIR_Opr tmp, CodeEmitInfo* info); 229 230 void membar(); 231 void membar_acquire(); 232 void membar_release(); 233 void get_thread(LIR_Opr result); 234 235 void verify_oop_map(CodeEmitInfo* info); 236 237 #include "incls/_c1_LIRAssembler_pd.hpp.incl" 238 };