src/cpu/ppc/vm/ppc.ad
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*** old/src/cpu/ppc/vm/ppc.ad Thu May 15 17:09:25 2014
--- new/src/cpu/ppc/vm/ppc.ad Thu May 15 17:09:25 2014
*** 1283,1295 ****
--- 1283,1295 ----
bool MachConstantBaseNode::requires_postalloc_expand() const { return true; }
void MachConstantBaseNode::postalloc_expand(GrowableArray <Node *> *nodes, PhaseRegAlloc *ra_) {
Compile *C = ra_->C;
- iRegPdstOper *op_dst = new (C) iRegPdstOper();
- MachNode *m1 = new (C) loadToc_hiNode();
- MachNode *m2 = new (C) loadToc_loNode();
m1->add_req(NULL);
m2->add_req(NULL, m1);
m1->_opnds[0] = op_dst;
m2->_opnds[0] = op_dst;
*** 2230,2242 ****
--- 2230,2242 ----
/* TODO: PPC port
// Make a new machine dependent decode node (with its operands).
MachTypeNode *Matcher::make_decode_node(Compile *C) {
assert(Universe::narrow_oop_base() == NULL && Universe::narrow_oop_shift() == 0,
"This method is only implemented for unscaled cOops mode so far");
- MachTypeNode *decode = new (C) decodeN_unscaledNode();
- decode->set_opnd_array(0, new (C) iRegPdstOper());
- decode->set_opnd_array(1, new (C) iRegNsrcOper());
return decode;
}
*/
// Threshold size for cleararray.
const int Matcher::init_array_short_size = 8 * BytesPerLong;
*** 2598,2621 ****
--- 2598,2621 ----
loadConLNodesTuple nodes;
const bool large_constant_pool = true; // TODO: PPC port C->cfg()->_consts_size > 4000;
if (large_constant_pool) {
// Create new nodes.
- loadConL_hiNode *m1 = new (C) loadConL_hiNode();
- loadConL_loNode *m2 = new (C) loadConL_loNode();
// inputs for new nodes
m1->add_req(NULL, toc);
m2->add_req(NULL, m1);
// operands for new nodes
- m1->_opnds[0] = new (C) iRegLdstOper(); // dst
m1->_opnds[1] = immSrc; // src
- m1->_opnds[2] = new (C) iRegPdstOper(); // toc
- m2->_opnds[0] = new (C) iRegLdstOper(); // dst
m2->_opnds[1] = immSrc; // src
- m2->_opnds[2] = new (C) iRegLdstOper(); // base
// Initialize ins_attrib TOC fields.
m1->_const_toc_offset = -1;
m2->_const_toc_offset_hi_node = m1;
*** 2631,2649 ****
--- 2631,2649 ----
nodes._large_lo = m2;
nodes._small = NULL;
nodes._last = nodes._large_lo;
assert(m2->bottom_type()->isa_long(), "must be long");
} else {
- loadConLNode *m2 = new (C) loadConLNode();
// inputs for new nodes
m2->add_req(NULL, toc);
// operands for new nodes
- m2->_opnds[0] = new (C) iRegLdstOper(); // dst
m2->_opnds[1] = immSrc; // src
- m2->_opnds[2] = new (C) iRegPdstOper(); // toc
// Initialize ins_attrib instruction offset.
m2->_cbuf_insts_offset = -1;
// register allocation for new nodes
*** 2748,2771 ****
--- 2748,2771 ----
// expand.
enc_class postalloc_expand_load_ptr_constant(iRegPdst dst, immP src, iRegLdst toc) %{
const bool large_constant_pool = true; // TODO: PPC port C->cfg()->_consts_size > 4000;
if (large_constant_pool) {
// Create new nodes.
- loadConP_hiNode *m1 = new (C) loadConP_hiNode();
- loadConP_loNode *m2 = new (C) loadConP_loNode();
// inputs for new nodes
m1->add_req(NULL, n_toc);
m2->add_req(NULL, m1);
// operands for new nodes
- m1->_opnds[0] = new (C) iRegPdstOper(); // dst
m1->_opnds[1] = op_src; // src
- m1->_opnds[2] = new (C) iRegPdstOper(); // toc
- m2->_opnds[0] = new (C) iRegPdstOper(); // dst
m2->_opnds[1] = op_src; // src
- m2->_opnds[2] = new (C) iRegLdstOper(); // base
// Initialize ins_attrib TOC fields.
m1->_const_toc_offset = -1;
m2->_const_toc_offset_hi_node = m1;
*** 2775,2793 ****
--- 2775,2793 ----
nodes->push(m1);
nodes->push(m2);
assert(m2->bottom_type()->isa_ptr(), "must be ptr");
} else {
- loadConPNode *m2 = new (C) loadConPNode();
// inputs for new nodes
m2->add_req(NULL, n_toc);
// operands for new nodes
- m2->_opnds[0] = new (C) iRegPdstOper(); // dst
m2->_opnds[1] = op_src; // src
- m2->_opnds[2] = new (C) iRegPdstOper(); // toc
// Register allocation for new nodes.
ra_->set_pair(m2->_idx, ra_->get_reg_second(this), ra_->get_reg_first(this));
nodes->push(m2);
*** 2800,2820 ****
--- 2800,2820 ----
enc_class postalloc_expand_load_float_constant(regF dst, immF src, iRegLdst toc) %{
bool large_constant_pool = true; // TODO: PPC port C->cfg()->_consts_size > 4000;
MachNode *m2;
if (large_constant_pool) {
- m2 = new (C) loadConFCompNode();
} else {
- m2 = new (C) loadConFNode();
}
// inputs for new nodes
m2->add_req(NULL, n_toc);
// operands for new nodes
m2->_opnds[0] = op_dst;
m2->_opnds[1] = op_src;
- m2->_opnds[2] = new (C) iRegPdstOper(); // constanttablebase
// register allocation for new nodes
ra_->set_pair(m2->_idx, ra_->get_reg_second(this), ra_->get_reg_first(this));
nodes->push(m2);
%}
*** 2824,2844 ****
--- 2824,2844 ----
enc_class postalloc_expand_load_double_constant(regD dst, immD src, iRegLdst toc) %{
bool large_constant_pool = true; // TODO: PPC port C->cfg()->_consts_size > 4000;
MachNode *m2;
if (large_constant_pool) {
- m2 = new (C) loadConDCompNode();
} else {
- m2 = new (C) loadConDNode();
}
// inputs for new nodes
m2->add_req(NULL, n_toc);
// operands for new nodes
m2->_opnds[0] = op_dst;
m2->_opnds[1] = op_src;
- m2->_opnds[2] = new (C) iRegPdstOper(); // constanttablebase
// register allocation for new nodes
ra_->set_pair(m2->_idx, ra_->get_reg_second(this), ra_->get_reg_first(this));
nodes->push(m2);
%}
*** 2916,2934 ****
--- 2916,2934 ----
enc_class postalloc_expand_encode_oop(iRegNdst dst, iRegPdst src, flagsReg crx) %{
if (VM_Version::has_isel()) {
// use isel instruction with Power 7
- cmpP_reg_imm16Node *n_compare = new (C) cmpP_reg_imm16Node();
- encodeP_subNode *n_sub_base = new (C) encodeP_subNode();
- encodeP_shiftNode *n_shift = new (C) encodeP_shiftNode();
- cond_set_0_oopNode *n_cond_set = new (C) cond_set_0_oopNode();
n_compare->add_req(n_region, n_src);
n_compare->_opnds[0] = op_crx;
n_compare->_opnds[1] = op_src;
- n_compare->_opnds[2] = new (C) immL16Oper(0);
n_sub_base->add_req(n_region, n_src);
n_sub_base->_opnds[0] = op_dst;
n_sub_base->_opnds[1] = op_src;
n_sub_base->_bottom_type = _bottom_type;
*** 2954,2967 ****
--- 2954,2967 ----
nodes->push(n_shift);
nodes->push(n_cond_set);
} else {
// before Power 7
- moveRegNode *n_move = new (C) moveRegNode();
- cmpP_reg_imm16Node *n_compare = new (C) cmpP_reg_imm16Node();
- encodeP_shiftNode *n_shift = new (C) encodeP_shiftNode();
- cond_sub_baseNode *n_sub_base = new (C) cond_sub_baseNode();
n_move->add_req(n_region, n_src);
n_move->_opnds[0] = op_dst;
n_move->_opnds[1] = op_src;
ra_->set_oop(n_move, true); // Until here, 'n_move' still produces an oop.
*** 2969,2979 ****
--- 2969,2979 ----
n_compare->add_req(n_region, n_src);
n_compare->add_prec(n_move);
n_compare->_opnds[0] = op_crx;
n_compare->_opnds[1] = op_src;
- n_compare->_opnds[2] = new (C) immL16Oper(0);
n_sub_base->add_req(n_region, n_compare, n_src);
n_sub_base->_opnds[0] = op_dst;
n_sub_base->_opnds[1] = op_crx;
n_sub_base->_opnds[2] = op_src;
*** 2998,3014 ****
--- 2998,3014 ----
assert(!(ra_->is_oop(this)), "sanity"); // This is not supposed to be GC'ed.
%}
enc_class postalloc_expand_encode_oop_not_null(iRegNdst dst, iRegPdst src) %{
- encodeP_subNode *n1 = new (C) encodeP_subNode();
n1->add_req(n_region, n_src);
n1->_opnds[0] = op_dst;
n1->_opnds[1] = op_src;
n1->_bottom_type = _bottom_type;
- encodeP_shiftNode *n2 = new (C) encodeP_shiftNode();
n2->add_req(n_region, n1);
n2->_opnds[0] = op_dst;
n2->_opnds[1] = op_dst;
n2->_bottom_type = _bottom_type;
ra_->set_pair(n1->_idx, ra_->get_reg_second(this), ra_->get_reg_first(this));
*** 3018,3050 ****
--- 3018,3050 ----
nodes->push(n2);
assert(!(ra_->is_oop(this)), "sanity"); // This is not supposed to be GC'ed.
%}
enc_class postalloc_expand_decode_oop(iRegPdst dst, iRegNsrc src, flagsReg crx) %{
- decodeN_shiftNode *n_shift = new (C) decodeN_shiftNode();
- cmpN_reg_imm0Node *n_compare = new (C) cmpN_reg_imm0Node();
n_compare->add_req(n_region, n_src);
n_compare->_opnds[0] = op_crx;
n_compare->_opnds[1] = op_src;
- n_compare->_opnds[2] = new (C) immN_0Oper(TypeNarrowOop::NULL_PTR);
n_shift->add_req(n_region, n_src);
n_shift->_opnds[0] = op_dst;
n_shift->_opnds[1] = op_src;
n_shift->_bottom_type = _bottom_type;
if (VM_Version::has_isel()) {
// use isel instruction with Power 7
- decodeN_addNode *n_add_base = new (C) decodeN_addNode();
n_add_base->add_req(n_region, n_shift);
n_add_base->_opnds[0] = op_dst;
n_add_base->_opnds[1] = op_dst;
n_add_base->_bottom_type = _bottom_type;
- cond_set_0_ptrNode *n_cond_set = new (C) cond_set_0_ptrNode();
n_cond_set->add_req(n_region, n_compare, n_add_base);
n_cond_set->_opnds[0] = op_dst;
n_cond_set->_opnds[1] = op_crx;
n_cond_set->_opnds[2] = op_dst;
n_cond_set->_bottom_type = _bottom_type;
*** 3062,3072 ****
--- 3062,3072 ----
nodes->push(n_add_base);
nodes->push(n_cond_set);
} else {
// before Power 7
- cond_add_baseNode *n_add_base = new (C) cond_add_baseNode();
n_add_base->add_req(n_region, n_compare, n_shift);
n_add_base->_opnds[0] = op_dst;
n_add_base->_opnds[1] = op_crx;
n_add_base->_opnds[2] = op_dst;
*** 3084,3100 ****
--- 3084,3100 ----
nodes->push(n_add_base);
}
%}
enc_class postalloc_expand_decode_oop_not_null(iRegPdst dst, iRegNsrc src) %{
- decodeN_shiftNode *n1 = new (C) decodeN_shiftNode();
n1->add_req(n_region, n_src);
n1->_opnds[0] = op_dst;
n1->_opnds[1] = op_src;
n1->_bottom_type = _bottom_type;
- decodeN_addNode *n2 = new (C) decodeN_addNode();
n2->add_req(n_region, n1);
n2->_opnds[0] = op_dst;
n2->_opnds[1] = op_dst;
n2->_bottom_type = _bottom_type;
ra_->set_pair(n1->_idx, ra_->get_reg_second(this), ra_->get_reg_first(this));
*** 3386,3396 ****
--- 3386,3396 ----
// expand.
enc_class postalloc_expand_load_replF_constant(iRegLdst dst, immF src, iRegLdst toc) %{
// Create new nodes.
// Make an operand with the bit pattern to load as float.
- immLOper *op_repl = new (C) immLOper((jlong)replicate_immF(op_src->constantF()));
loadConLNodesTuple loadConLNodes =
loadConLNodesTuple_create(C, ra_, n_toc, op_repl,
ra_->get_reg_second(this), ra_->get_reg_first(this));
*** 3609,3623 ****
--- 3609,3623 ----
// postalloc expand emitter for virtual calls.
enc_class postalloc_expand_java_dynamic_call_sched(method meth, iRegLdst toc) %{
// Create the nodes for loading the IC from the TOC.
loadConLNodesTuple loadConLNodes_IC =
- loadConLNodesTuple_create(C, ra_, n_toc, new (C) immLOper((jlong)Universe::non_oop_word()),
OptoReg::Name(R19_H_num), OptoReg::Name(R19_num));
// Create the call node.
- CallDynamicJavaDirectSchedNode *call = new (C) CallDynamicJavaDirectSchedNode();
call->_method_handle_invoke = _method_handle_invoke;
call->_vtable_index = _vtable_index;
call->_method = _method;
call->_bci = _bci;
call->_optimized_virtual = _optimized_virtual;
*** 3763,3773 ****
--- 3763,3773 ----
enc_class postalloc_expand_java_to_runtime_call(method meth, iRegLdst toc) %{
loadConLNodesTuple loadConLNodes_Entry;
#if defined(ABI_ELFv2)
jlong entry_address = (jlong) this->entry_point();
assert(entry_address, "need address here");
- loadConLNodes_Entry = loadConLNodesTuple_create(C, ra_, n_toc, new (C) immLOper(entry_address),
OptoReg::Name(R12_H_num), OptoReg::Name(R12_num));
#else
// Get the struct that describes the function we are about to call.
FunctionDescriptor* fd = (FunctionDescriptor*) this->entry_point();
assert(fd, "need fd here");
*** 3775,3820 ****
--- 3775,3820 ----
// new nodes
loadConLNodesTuple loadConLNodes_Env;
loadConLNodesTuple loadConLNodes_Toc;
// Create nodes and operands for loading the entry point.
- loadConLNodes_Entry = loadConLNodesTuple_create(C, ra_, n_toc, new (C) immLOper(entry_address),
OptoReg::Name(R12_H_num), OptoReg::Name(R12_num));
// Create nodes and operands for loading the env pointer.
if (fd->env() != NULL) {
- loadConLNodes_Env = loadConLNodesTuple_create(C, ra_, n_toc, new (C) immLOper((jlong) fd->env()),
OptoReg::Name(R11_H_num), OptoReg::Name(R11_num));
} else {
loadConLNodes_Env._large_hi = NULL;
loadConLNodes_Env._large_lo = NULL;
loadConLNodes_Env._small = NULL;
- loadConLNodes_Env._last = new (C) loadConL16Node();
- loadConLNodes_Env._last->_opnds[0] = new (C) iRegLdstOper();
- loadConLNodes_Env._last->_opnds[1] = new (C) immL16Oper(0);
ra_->set_pair(loadConLNodes_Env._last->_idx, OptoReg::Name(R11_H_num), OptoReg::Name(R11_num));
}
// Create nodes and operands for loading the Toc point.
- loadConLNodes_Toc = loadConLNodesTuple_create(C, ra_, n_toc, new (C) immLOper((jlong) fd->toc()),
OptoReg::Name(R2_H_num), OptoReg::Name(R2_num));
#endif // ABI_ELFv2
// mtctr node
- MachNode *mtctr = new (C) CallLeafDirect_mtctrNode();
assert(loadConLNodes_Entry._last != NULL, "entry must exist");
mtctr->add_req(0, loadConLNodes_Entry._last);
- mtctr->_opnds[0] = new (C) iRegLdstOper();
- mtctr->_opnds[1] = new (C) iRegLdstOper();
// call node
- MachCallLeafNode *call = new (C) CallLeafDirectNode();
call->_opnds[0] = _opnds[0];
- call->_opnds[1] = new (C) methodOper((intptr_t) entry_address); // May get set later.
// Make the new call node look like the old one.
call->_name = _name;
call->_tf = _tf;
call->_entry_point = _entry_point;
*** 6048,6060 ****
--- 6048,6060 ----
match(Set dst src);
ins_cost(DEFAULT_COST*2);
format %{ "LoadN $dst, $src \t// postalloc expanded" %} // mask
postalloc_expand %{
- MachNode *m1 = new (C) loadConN_hiNode();
- MachNode *m2 = new (C) loadConN_loNode();
- MachNode *m3 = new (C) clearMs32bNode();
m1->add_req(NULL);
m2->add_req(NULL, m1);
m3->add_req(NULL, m2);
m1->_opnds[0] = op_dst;
m1->_opnds[1] = op_src;
*** 6115,6143 ****
--- 6115,6143 ----
ins_cost(DEFAULT_COST*2);
format %{ "LoadN $dst, $src \t// postalloc expanded" %} // mask
postalloc_expand %{
// Load high bits into register. Sign extended.
- MachNode *m1 = new (C) loadConNKlass_hiNode();
m1->add_req(NULL);
m1->_opnds[0] = op_dst;
m1->_opnds[1] = op_src;
ra_->set_pair(m1->_idx, ra_->get_reg_second(this), ra_->get_reg_first(this));
nodes->push(m1);
MachNode *m2 = m1;
if (!Assembler::is_uimm((jlong)Klass::encode_klass((Klass *)op_src->constant()), 31)) {
// Value might be 1-extended. Mask out these bits.
- m2 = new (C) clearMs32bNode();
m2->add_req(NULL, m1);
m2->_opnds[0] = op_dst;
m2->_opnds[1] = op_dst;
ra_->set_pair(m2->_idx, ra_->get_reg_second(this), ra_->get_reg_first(this));
nodes->push(m2);
}
- MachNode *m3 = new (C) loadConNKlass_loNode();
m3->add_req(NULL, m2);
m3->_opnds[0] = op_dst;
m3->_opnds[1] = op_src;
m3->_opnds[2] = op_dst;
ra_->set_pair(m3->_idx, ra_->get_reg_second(this), ra_->get_reg_first(this));
*** 6985,7002 ****
--- 6985,7002 ----
match(Set dst (EncodePKlass (Binary base src)));
predicate(false);
format %{ "EncodePKlass $dst, $src\t// $src != Null, postalloc expanded" %}
postalloc_expand %{
- encodePKlass_sub_baseNode *n1 = new (C) encodePKlass_sub_baseNode();
n1->add_req(n_region, n_base, n_src);
n1->_opnds[0] = op_dst;
n1->_opnds[1] = op_base;
n1->_opnds[2] = op_src;
n1->_bottom_type = _bottom_type;
- encodePKlass_shiftNode *n2 = new (C) encodePKlass_shiftNode();
n2->add_req(n_region, n1);
n2->_opnds[0] = op_dst;
n2->_opnds[1] = op_dst;
n2->_bottom_type = _bottom_type;
ra_->set_pair(n1->_idx, ra_->get_reg_second(this), ra_->get_reg_first(this));
*** 7062,7079 ****
--- 7062,7079 ----
//effect(kill src); // We need a register for the immediate result after shifting.
predicate(false);
format %{ "DecodeNKlass $dst = $base + ($src << 3) \t// $src != NULL, postalloc expanded" %}
postalloc_expand %{
- decodeNKlass_add_baseNode *n1 = new (C) decodeNKlass_add_baseNode();
n1->add_req(n_region, n_base, n_src);
n1->_opnds[0] = op_dst;
n1->_opnds[1] = op_base;
n1->_opnds[2] = op_src;
n1->_bottom_type = _bottom_type;
- decodeNKlass_shiftNode *n2 = new (C) decodeNKlass_shiftNode();
n2->add_req(n_region, n1);
n2->_opnds[0] = op_dst;
n2->_opnds[1] = op_dst;
n2->_bottom_type = _bottom_type;
*** 9771,9793 ****
--- 9771,9793 ----
// | \ | | /
// dst=cmovI_bso_stackSlotL
//
// Create new nodes.
- MachNode *m1 = new (C) loadConI16Node();
- MachNode *m2 = new (C) cmovI_bso_stackSlotLNode();
// inputs for new nodes
m1->add_req(n_region);
m2->add_req(n_region, n_crx, n_mem);
// precedences for new nodes
m2->add_prec(m1);
// operands for new nodes
m1->_opnds[0] = op_dst;
- m1->_opnds[1] = new (C) immI16Oper(0);
m2->_opnds[0] = op_dst;
m2->_opnds[1] = op_crx;
m2->_opnds[2] = op_mem;
*** 9940,9960 ****
--- 9940,9960 ----
// | \ | | /
// dst=cmovL_bso_stackSlotL
//
// Create new nodes.
- MachNode *m1 = new (C) loadConL16Node();
- MachNode *m2 = new (C) cmovL_bso_stackSlotLNode();
// inputs for new nodes
m1->add_req(n_region);
m2->add_req(n_region, n_crx, n_mem);
m2->add_prec(m1);
// operands for new nodes
m1->_opnds[0] = op_dst;
- m1->_opnds[1] = new (C) immL16Oper(0);
m2->_opnds[0] = op_dst;
m2->_opnds[1] = op_crx;
m2->_opnds[2] = op_mem;
// registers for new nodes
*** 10286,10306 ****
--- 10286,10306 ----
// | \ |
// dst=cmovI_conIvalueMinus1_conIvalue1
//
// Create new nodes.
- MachNode *m1 = new (C) loadConI16Node();
- MachNode *m2 = new (C) cmovI_conIvalueMinus1_conIvalue1Node();
// inputs for new nodes
m1->add_req(n_region);
m2->add_req(n_region, n_crx);
m2->add_prec(m1);
// operands for new nodes
m1->_opnds[0] = op_dst;
- m1->_opnds[1] = new (C) immI16Oper(0);
m2->_opnds[0] = op_dst;
m2->_opnds[1] = op_crx;
// registers for new nodes
ra_->set_pair(m1->_idx, ra_->get_reg_second(this), ra_->get_reg_first(this)); // dst
*** 10621,10632 ****
--- 10621,10632 ----
// | \
// crx=cmov_bns_less
//
// Create new nodes.
- MachNode *m1 = new (C) cmpFUnordered_reg_regNode();
- MachNode *m2 = new (C) cmov_bns_lessNode();
// inputs for new nodes
m1->add_req(n_region, n_src1, n_src2);
m2->add_req(n_region);
m2->add_prec(m1);
*** 10696,10707 ****
--- 10696,10707 ----
// | \
// crx=cmov_bns_less
//
// create new nodes
- MachNode *m1 = new (C) cmpDUnordered_reg_regNode();
- MachNode *m2 = new (C) cmov_bns_lessNode();
// inputs for new nodes
m1->add_req(n_region, n_src1, n_src2);
m2->add_req(n_region);
m2->add_prec(m1);
src/cpu/ppc/vm/ppc.ad
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