--- old/src/share/vm/opto/mulnode.cpp 2014-05-15 17:09:30.386522702 +0200 +++ new/src/share/vm/opto/mulnode.cpp 2014-05-15 17:09:30.054522717 +0200 @@ -199,22 +199,22 @@ Node *res = NULL; jint bit1 = con & -con; // Extract low bit if( bit1 == con ) { // Found a power of 2? - res = new (phase->C) LShiftINode( in(1), phase->intcon(log2_intptr(bit1)) ); + res = new LShiftINode( in(1), phase->intcon(log2_intptr(bit1)) ); } else { // Check for constant with 2 bits set jint bit2 = con-bit1; bit2 = bit2 & -bit2; // Extract 2nd bit if( bit2 + bit1 == con ) { // Found all bits in con? - Node *n1 = phase->transform( new (phase->C) LShiftINode( in(1), phase->intcon(log2_intptr(bit1)) ) ); - Node *n2 = phase->transform( new (phase->C) LShiftINode( in(1), phase->intcon(log2_intptr(bit2)) ) ); - res = new (phase->C) AddINode( n2, n1 ); + Node *n1 = phase->transform( new LShiftINode( in(1), phase->intcon(log2_intptr(bit1)) ) ); + Node *n2 = phase->transform( new LShiftINode( in(1), phase->intcon(log2_intptr(bit2)) ) ); + res = new AddINode( n2, n1 ); } else if (is_power_of_2(con+1)) { // Sleezy: power-of-2 -1. Next time be generic. jint temp = (jint) (con + 1); - Node *n1 = phase->transform( new (phase->C) LShiftINode( in(1), phase->intcon(log2_intptr(temp)) ) ); - res = new (phase->C) SubINode( n1, in(1) ); + Node *n1 = phase->transform( new LShiftINode( in(1), phase->intcon(log2_intptr(temp)) ) ); + res = new SubINode( n1, in(1) ); } else { return MulNode::Ideal(phase, can_reshape); } @@ -222,7 +222,7 @@ if( sign_flip ) { // Need to negate result? res = phase->transform(res);// Transform, before making the zero con - res = new (phase->C) SubINode(phase->intcon(0),res); + res = new SubINode(phase->intcon(0),res); } return res; // Return final result @@ -295,22 +295,22 @@ Node *res = NULL; jlong bit1 = con & -con; // Extract low bit if( bit1 == con ) { // Found a power of 2? - res = new (phase->C) LShiftLNode( in(1), phase->intcon(log2_long(bit1)) ); + res = new LShiftLNode( in(1), phase->intcon(log2_long(bit1)) ); } else { // Check for constant with 2 bits set jlong bit2 = con-bit1; bit2 = bit2 & -bit2; // Extract 2nd bit if( bit2 + bit1 == con ) { // Found all bits in con? - Node *n1 = phase->transform( new (phase->C) LShiftLNode( in(1), phase->intcon(log2_long(bit1)) ) ); - Node *n2 = phase->transform( new (phase->C) LShiftLNode( in(1), phase->intcon(log2_long(bit2)) ) ); - res = new (phase->C) AddLNode( n2, n1 ); + Node *n1 = phase->transform( new LShiftLNode( in(1), phase->intcon(log2_long(bit1)) ) ); + Node *n2 = phase->transform( new LShiftLNode( in(1), phase->intcon(log2_long(bit2)) ) ); + res = new AddLNode( n2, n1 ); } else if (is_power_of_2_long(con+1)) { // Sleezy: power-of-2 -1. Next time be generic. jlong temp = (jlong) (con + 1); - Node *n1 = phase->transform( new (phase->C) LShiftLNode( in(1), phase->intcon(log2_long(temp)) ) ); - res = new (phase->C) SubLNode( n1, in(1) ); + Node *n1 = phase->transform( new LShiftLNode( in(1), phase->intcon(log2_long(temp)) ) ); + res = new SubLNode( n1, in(1) ); } else { return MulNode::Ideal(phase, can_reshape); } @@ -318,7 +318,7 @@ if( sign_flip ) { // Need to negate result? res = phase->transform(res);// Transform, before making the zero con - res = new (phase->C) SubLNode(phase->longcon(0),res); + res = new SubLNode(phase->longcon(0),res); } return res; // Return final result @@ -477,31 +477,31 @@ // Masking bits off of a Character? Hi bits are already zero. if( lop == Op_LoadUS && (mask & 0xFFFF0000) ) // Can we make a smaller mask? - return new (phase->C) AndINode(load,phase->intcon(mask&0xFFFF)); + return new AndINode(load,phase->intcon(mask&0xFFFF)); // Masking bits off of a Short? Loading a Character does some masking if (can_reshape && load->outcnt() == 1 && load->unique_out() == this) { if (lop == Op_LoadS && (mask & 0xFFFF0000) == 0 ) { - Node *ldus = new (phase->C) LoadUSNode(load->in(MemNode::Control), - load->in(MemNode::Memory), - load->in(MemNode::Address), - load->adr_type(), - TypeInt::CHAR, MemNode::unordered); + Node *ldus = new LoadUSNode(load->in(MemNode::Control), + load->in(MemNode::Memory), + load->in(MemNode::Address), + load->adr_type(), + TypeInt::CHAR, MemNode::unordered); ldus = phase->transform(ldus); - return new (phase->C) AndINode(ldus, phase->intcon(mask & 0xFFFF)); + return new AndINode(ldus, phase->intcon(mask & 0xFFFF)); } // Masking sign bits off of a Byte? Do an unsigned byte load plus // an and. if (lop == Op_LoadB && (mask & 0xFFFFFF00) == 0) { - Node* ldub = new (phase->C) LoadUBNode(load->in(MemNode::Control), - load->in(MemNode::Memory), - load->in(MemNode::Address), - load->adr_type(), - TypeInt::UBYTE, MemNode::unordered); + Node* ldub = new LoadUBNode(load->in(MemNode::Control), + load->in(MemNode::Memory), + load->in(MemNode::Address), + load->adr_type(), + TypeInt::UBYTE, MemNode::unordered); ldub = phase->transform(ldub); - return new (phase->C) AndINode(ldub, phase->intcon(mask)); + return new AndINode(ldub, phase->intcon(mask)); } } @@ -516,8 +516,8 @@ // bits survive. NO sign-extension bits survive the maskings. if( (sign_bits_mask & mask) == 0 ) { // Use zero-fill shift instead - Node *zshift = phase->transform(new (phase->C) URShiftINode(load->in(1),load->in(2))); - return new (phase->C) AndINode( zshift, in(2) ); + Node *zshift = phase->transform(new URShiftINode(load->in(1),load->in(2))); + return new AndINode( zshift, in(2) ); } } } @@ -527,7 +527,7 @@ // plus 1) and the mask is of the low order bit. Skip the negate. if( lop == Op_SubI && mask == 1 && load->in(1) && phase->type(load->in(1)) == TypeInt::ZERO ) - return new (phase->C) AndINode( load->in(2), in(2) ); + return new AndINode( load->in(2), in(2) ); return MulNode::Ideal(phase, can_reshape); } @@ -611,9 +611,9 @@ // value. This check includes UI2L masks (0x00000000FFFFFFFF) which // would be optimized away later in Identity. if (op == Op_ConvI2L && (mask & CONST64(0xFFFFFFFF80000000)) == 0) { - Node* andi = new (phase->C) AndINode(in1->in(1), phase->intcon(mask)); + Node* andi = new AndINode(in1->in(1), phase->intcon(mask)); andi = phase->transform(andi); - return new (phase->C) ConvI2LNode(andi); + return new ConvI2LNode(andi); } // Masking off sign bits? Dont make them! @@ -627,8 +627,8 @@ // bits survive. NO sign-extension bits survive the maskings. if( (sign_bits_mask & mask) == 0 ) { // Use zero-fill shift instead - Node *zshift = phase->transform(new (phase->C) URShiftLNode(in1->in(1), in1->in(2))); - return new (phase->C) AndLNode(zshift, in(2)); + Node *zshift = phase->transform(new URShiftLNode(in1->in(1), in1->in(2))); + return new AndLNode(zshift, in(2)); } } } @@ -666,9 +666,9 @@ // and 'i2b' patterns which typically fold into 'StoreC/StoreB'. if( con < 16 ) { // Compute X << con0 - Node *lsh = phase->transform( new (phase->C) LShiftINode( add1->in(1), in(2) ) ); + Node *lsh = phase->transform( new LShiftINode( add1->in(1), in(2) ) ); // Compute X<C) AddINode( lsh, phase->intcon(t12->get_con() << con)); + return new AddINode( lsh, phase->intcon(t12->get_con() << con)); } } } @@ -677,7 +677,7 @@ if( (add1_op == Op_RShiftI || add1_op == Op_URShiftI ) && add1->in(2) == in(2) ) // Convert to "(x & -(1<C) AndINode(add1->in(1),phase->intcon( -(1<in(1),phase->intcon( -(1<>c0) & Y)<in(2) == in(2) ) { // Convert to "(x & (Y<transform( new (phase->C) LShiftINode( add1->in(2), in(2) ) ); - return new (phase->C) AndINode( add2->in(1), y_sh ); + Node *y_sh = phase->transform( new LShiftINode( add1->in(2), in(2) ) ); + return new AndINode( add2->in(1), y_sh ); } } @@ -696,7 +696,7 @@ const jint bits_mask = right_n_bits(BitsPerJavaInteger-con); if( add1_op == Op_AndI && phase->type(add1->in(2)) == TypeInt::make( bits_mask ) ) - return new (phase->C) LShiftINode( add1->in(1), in(2) ); + return new LShiftINode( add1->in(1), in(2) ); return NULL; } @@ -776,9 +776,9 @@ const TypeLong *t12 = phase->type(add1->in(2))->isa_long(); if( t12 && t12->is_con() ){ // Left input is an add of a con? // Compute X << con0 - Node *lsh = phase->transform( new (phase->C) LShiftLNode( add1->in(1), in(2) ) ); + Node *lsh = phase->transform( new LShiftLNode( add1->in(1), in(2) ) ); // Compute X<C) AddLNode( lsh, phase->longcon(t12->get_con() << con)); + return new AddLNode( lsh, phase->longcon(t12->get_con() << con)); } } @@ -786,7 +786,7 @@ if( (add1_op == Op_RShiftL || add1_op == Op_URShiftL ) && add1->in(2) == in(2) ) // Convert to "(x & -(1<C) AndLNode(add1->in(1),phase->longcon( -(CONST64(1)<in(1),phase->longcon( -(CONST64(1)<>c0) & Y)<in(2) == in(2) ) { // Convert to "(x & (Y<transform( new (phase->C) LShiftLNode( add1->in(2), in(2) ) ); - return new (phase->C) AndLNode( add2->in(1), y_sh ); + Node *y_sh = phase->transform( new LShiftLNode( add1->in(2), in(2) ) ); + return new AndLNode( add2->in(1), y_sh ); } } @@ -805,7 +805,7 @@ const jlong bits_mask = ((jlong)CONST64(1) << (jlong)(BitsPerJavaLong - con)) - CONST64(1); if( add1_op == Op_AndL && phase->type(add1->in(2)) == TypeLong::make( bits_mask ) ) - return new (phase->C) LShiftLNode( add1->in(1), in(2) ); + return new LShiftLNode( add1->in(1), in(2) ); return NULL; } @@ -907,8 +907,8 @@ Node *x = mask->in(1); jint maskbits = t3->get_con(); // Convert to "(x >> shift) & (mask >> shift)" - Node *shr_nomask = phase->transform( new (phase->C) RShiftINode(mask->in(1), in(2)) ); - return new (phase->C) AndINode(shr_nomask, phase->intcon( maskbits >> shift)); + Node *shr_nomask = phase->transform( new RShiftINode(mask->in(1), in(2)) ); + return new AndINode(shr_nomask, phase->intcon( maskbits >> shift)); } // Check for "(short[i] <<16)>>16" which simply sign-extends @@ -933,11 +933,11 @@ ld->Opcode() == Op_LoadUS && ld->outcnt() == 1 && ld->unique_out() == shl) // Replace zero-extension-load with sign-extension-load - return new (phase->C) LoadSNode( ld->in(MemNode::Control), - ld->in(MemNode::Memory), - ld->in(MemNode::Address), - ld->adr_type(), TypeInt::SHORT, - MemNode::unordered); + return new LoadSNode( ld->in(MemNode::Control), + ld->in(MemNode::Memory), + ld->in(MemNode::Address), + ld->adr_type(), TypeInt::SHORT, + MemNode::unordered); } // Check for "(byte[i] <<24)>>24" which simply sign-extends @@ -1119,7 +1119,7 @@ const int con2 = t12->get_con() & 31; // Shift count is always masked const int con3 = con+con2; if( con3 < 32 ) // Only merge shifts if total is < 32 - return new (phase->C) URShiftINode( in(1)->in(1), phase->intcon(con3) ); + return new URShiftINode( in(1)->in(1), phase->intcon(con3) ); } } @@ -1132,9 +1132,9 @@ Node *lshl = add->in(1); if( lshl->Opcode() == Op_LShiftI && phase->type(lshl->in(2)) == t2 ) { - Node *y_z = phase->transform( new (phase->C) URShiftINode(add->in(2),in(2)) ); - Node *sum = phase->transform( new (phase->C) AddINode( lshl->in(1), y_z ) ); - return new (phase->C) AndINode( sum, phase->intcon(mask) ); + Node *y_z = phase->transform( new URShiftINode(add->in(2),in(2)) ); + Node *sum = phase->transform( new AddINode( lshl->in(1), y_z ) ); + return new AndINode( sum, phase->intcon(mask) ); } } @@ -1147,8 +1147,8 @@ if( t3 && t3->is_con() ) { // Right input is a constant jint mask2 = t3->get_con(); mask2 >>= con; // *signed* shift downward (high-order zeroes do not help) - Node *newshr = phase->transform( new (phase->C) URShiftINode(andi->in(1), in(2)) ); - return new (phase->C) AndINode(newshr, phase->intcon(mask2)); + Node *newshr = phase->transform( new URShiftINode(andi->in(1), in(2)) ); + return new AndINode(newshr, phase->intcon(mask2)); // The negative values are easier to materialize than positive ones. // A typical case from address arithmetic is ((x & ~15) >> 4). // It's better to change that to ((x >> 4) & ~0) versus @@ -1160,7 +1160,7 @@ Node *shl = in(1); if( in1_op == Op_LShiftI && phase->type(shl->in(2)) == t2 ) - return new (phase->C) AndINode( shl->in(1), phase->intcon(mask) ); + return new AndINode( shl->in(1), phase->intcon(mask) ); return NULL; } @@ -1265,9 +1265,9 @@ Node *lshl = add->in(1); if( lshl->Opcode() == Op_LShiftL && phase->type(lshl->in(2)) == t2 ) { - Node *y_z = phase->transform( new (phase->C) URShiftLNode(add->in(2),in(2)) ); - Node *sum = phase->transform( new (phase->C) AddLNode( lshl->in(1), y_z ) ); - return new (phase->C) AndLNode( sum, phase->longcon(mask) ); + Node *y_z = phase->transform( new URShiftLNode(add->in(2),in(2)) ); + Node *sum = phase->transform( new AddLNode( lshl->in(1), y_z ) ); + return new AndLNode( sum, phase->longcon(mask) ); } } @@ -1280,8 +1280,8 @@ if( t3 && t3->is_con() ) { // Right input is a constant jlong mask2 = t3->get_con(); mask2 >>= con; // *signed* shift downward (high-order zeroes do not help) - Node *newshr = phase->transform( new (phase->C) URShiftLNode(andi->in(1), in(2)) ); - return new (phase->C) AndLNode(newshr, phase->longcon(mask2)); + Node *newshr = phase->transform( new URShiftLNode(andi->in(1), in(2)) ); + return new AndLNode(newshr, phase->longcon(mask2)); } } @@ -1289,7 +1289,7 @@ Node *shl = in(1); if( shl->Opcode() == Op_LShiftL && phase->type(shl->in(2)) == t2 ) - return new (phase->C) AndLNode( shl->in(1), phase->longcon(mask) ); + return new AndLNode( shl->in(1), phase->longcon(mask) ); return NULL; }