1 /*
2 * Copyright (c) 1999, 2012, Oracle and/or its affiliates. All rights reserved.
3 * Copyright (c) 2014, Red Hat Inc. All rights reserved.
4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
5 *
6 * This code is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 only, as
8 * published by the Free Software Foundation.
9 *
10 * This code is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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24 */
25 // This file is a derivative work resulting from (and including) modifications
26 // made by Azul Systems, Inc. The dates of such changes are 2013-2016.
27 // Copyright 2013-2016 Azul Systems, Inc. All Rights Reserved.
28 //
29 // Please contact Azul Systems, 385 Moffett Park Drive, Suite 115, Sunnyvale,
30 // CA 94089 USA or visit www.azul.com if you need additional information or
31 // have any questions.
32
33 #ifndef CPU_AARCH32_VM_C1_FRAMEMAP_AARCH32_HPP
34 #define CPU_AARCH32_VM_C1_FRAMEMAP_AARCH32_HPP
35
36 // The following schema visualizes how a C1 frame looks like on AArch32.
37 // It corresponds to the case of an unextended frame. Each line of text
38 // represents one 4-byte slot. Every monitor takes two slots. Positions of
39 // incoming arguments are determined by the Java calling convention. Spill
40 // area and monitor area are not required to be 8-byte aligned. The slot
41 // for deoptimization support is used by frame::deoptimize() method to save
42 // the original pc before patching in the new one.
43 //
44 // When LIR_Opr's reference stack slots, they use virtual stack slot indices.
45 // They are mapped to the real stack slots by FrameMap::sp_offset_for_slot()
46 // and FrameMap::sp_offset_for_double_slot() methods. The first _argcount
47 // virtual stack slots correspond to the real stack slots occupied by the
48 // incoming arguments. Their mapping is defined by _argument_locations array
49 // (which is filled in by applying the Java calling convention). All other
50 // virtual stack slots correspond to spill slots.
51 //
52 // Higher addresses
53 // | incoming | virtual stack slots
54 // | | [0 ... _arg_count - 1]
55 // | arguments |
56 // |====================================|----X- 8-byte aligned
57 // | previous lr | /|\ address
58 // rfp ===> |------------------------------------| |
59 // | previous rfp | |
60 // |====================================| |
61 // | alignment slot (if needed) | |
62 // |====================================| |
63 // | slot for deoptimization support | |
64 // |====================================| |
65 // | monitor [_num_monitors - 1] object | |
66 // | | |
67 // | monitor [_num_monitors - 1] lock | |
68 // |------------------------------------| |
69 // | | |
70 // Direction of | ... | | _framesize
71 // stack growth | | | slots
72 // | |------------------------------------| |
73 // V | monitor [0] object | |
74 // | | |
75 // | monitor [0] lock | |
76 // |====================================| |
77 // | spill slot [_num_spills - 1] | | virtual stack slot
78 // |------------------------------------| | [_arg_count + _num_spills - 1]
79 // | ... | | ...
80 // |------------------------------------| |
81 // | spill slot [0] | | virtual stack slot
82 // |====================================| | [_arg_count]
83 // | reserved argument area for | |
84 // | ... | |
85 // | outgoing calls (8-byte aligned) | \|/
86 // sp ===> |====================================|----X- 8-byte aligned
87 // | | address
88 // Lower addresses
89
90 public:
91 enum {
92 first_available_sp_in_frame = 0,
93 frame_pad_in_bytes = 8
94 };
95
96 public:
97 static LIR_Opr r0_opr;
98 static LIR_Opr r1_opr;
99 static LIR_Opr r2_opr;
100 static LIR_Opr r3_opr;
101 static LIR_Opr r4_opr;
102 static LIR_Opr r5_opr;
103 static LIR_Opr r6_opr;
104 static LIR_Opr r7_opr;
105 static LIR_Opr r8_opr;
106 static LIR_Opr r9_opr;
107 static LIR_Opr r10_opr;
108 static LIR_Opr r11_opr;
109 static LIR_Opr r12_opr;
110 static LIR_Opr r13_opr;
111 static LIR_Opr r14_opr;
112 static LIR_Opr r15_opr;
113
114 static LIR_Opr r0_oop_opr;
115 static LIR_Opr r1_oop_opr;
116 static LIR_Opr r2_oop_opr;
117 static LIR_Opr r3_oop_opr;
118 static LIR_Opr r4_oop_opr;
119 static LIR_Opr r5_oop_opr;
120 static LIR_Opr r6_oop_opr;
121 static LIR_Opr r7_oop_opr;
122 static LIR_Opr r8_oop_opr;
123 static LIR_Opr r9_oop_opr;
124 static LIR_Opr r10_oop_opr;
125 static LIR_Opr r11_oop_opr;
126 static LIR_Opr r12_oop_opr;
127 static LIR_Opr r13_oop_opr;
128 static LIR_Opr r14_oop_opr;
129 static LIR_Opr r15_oop_opr;
130
131 static LIR_Opr r0_metadata_opr;
132 static LIR_Opr r1_metadata_opr;
133 static LIR_Opr r2_metadata_opr;
134 static LIR_Opr r3_metadata_opr;
135 static LIR_Opr r4_metadata_opr;
136 static LIR_Opr r5_metadata_opr;
137
138 static LIR_Opr sp_opr;
139 static LIR_Opr receiver_opr;
140
141 static LIR_Opr rscratch1_opr;
142 static LIR_Opr rscratch2_opr;
143 static LIR_Opr rscratch_long_opr;
144
145 static LIR_Opr long0_opr;
146 static LIR_Opr long1_opr;
147 static LIR_Opr long2_opr;
148 static LIR_Opr fpu0_float_opr;
149 static LIR_Opr fpu0_double_opr;
150
151 static LIR_Opr as_long_opr(Register r1, Register r2) {
152 return LIR_OprFact::double_cpu(cpu_reg2rnr(r1), cpu_reg2rnr(r2));
153 }
154 static LIR_Opr as_pointer_opr(Register r) {
155 return LIR_OprFact::single_cpu(cpu_reg2rnr(r));
156 }
157
158 static VMReg fpu_regname(int n);
159
160 static bool is_caller_save_register(LIR_Opr opr) {
161 // On AArch32, unlike on SPARC, we never explicitly request the C1 register
162 // allocator to allocate a callee-saved register. Since the only place this
163 // method is called is the assert in LinearScan::color_lir_opr(), we can
164 // safely just always return true here.
165 return true;
166 }
167 static int nof_caller_save_cpu_regs() {
168 return pd_nof_caller_save_cpu_regs_frame_map;
169 }
170 static int last_cpu_reg() {
171 return pd_last_cpu_reg;
172 }
173
174 #endif // CPU_AARCH32_VM_C1_FRAMEMAP_AARCH32_HPP