1 /*
   2  * Copyright (c) 2005, 2010, Oracle and/or its affiliates. All rights reserved.
   3  * Copyright (c) 2014, Red Hat Inc. All rights reserved.
   4  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   5  *
   6  * This code is free software; you can redistribute it and/or modify it
   7  * under the terms of the GNU General Public License version 2 only, as
   8  * published by the Free Software Foundation.
   9  *
  10  * This code is distributed in the hope that it will be useful, but WITHOUT
  11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  13  * version 2 for more details (a copy is included in the LICENSE file that
  14  * accompanied this code).
  15  *
  16  * You should have received a copy of the GNU General Public License version
  17  * 2 along with this work; if not, write to the Free Software Foundation,
  18  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  19  *
  20  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  21  * or visit www.oracle.com if you need additional information or have any
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  23  *
  24  */
  25 // This file is a derivative work resulting from (and including) modifications
  26 // made by Azul Systems, Inc.  The dates of such changes are 2013-2016.
  27 // Copyright 2013-2016 Azul Systems, Inc.  All Rights Reserved.
  28 //
  29 // Please contact Azul Systems, 385 Moffett Park Drive, Suite 115, Sunnyvale,
  30 // CA 94089 USA or visit www.azul.com if you need additional information or
  31 // have any questions.
  32 
  33 #ifndef CPU_AARCH32_VM_C1_LINEARSCAN_AARCH32_HPP
  34 #define CPU_AARCH32_VM_C1_LINEARSCAN_AARCH32_HPP
  35 
  36 inline bool LinearScan::is_processed_reg_num(int reg_num) {
  37   return reg_num <= pd_last_cpu_reg || reg_num >= pd_nof_cpu_regs_frame_map;
  38 }
  39 
  40 inline int LinearScan::num_physical_regs(BasicType type) {
  41   if (type == T_LONG || type == T_DOUBLE) {
  42     return 2;
  43   }
  44   return 1;
  45 }
  46 
  47 inline bool LinearScan::requires_adjacent_regs(BasicType type) {
  48   if (type == T_DOUBLE) {
  49     return true;
  50   }
  51   return false;
  52 }
  53 
  54 inline bool LinearScan::is_caller_save(int assigned_reg) {
  55   assert(assigned_reg >= 0 && assigned_reg < nof_regs,
  56          "should call this only for registers");
  57   // TODO: Remove the following line when support for callee-saved registers
  58   // is added
  59   return true;
  60   if (assigned_reg < pd_first_callee_saved_cpu_reg) {
  61     return true;
  62   }
  63   if (assigned_reg > pd_last_callee_saved_cpu_reg &&
  64       assigned_reg < pd_first_callee_saved_fpu_reg) {
  65     return true;
  66   }
  67   if (assigned_reg > pd_last_callee_saved_fpu_reg &&
  68       assigned_reg <= pd_last_fpu_reg) {
  69     return true;
  70   }
  71   return false;
  72 }
  73 
  74 // If there are special cases when some particular LIR operations kill some
  75 // specific registers, this behavior should be described here. An example
  76 // can be found in x86 port.
  77 inline void LinearScan::pd_add_temps(LIR_Op* op) {
  78   if (op->code() == lir_move) {
  79     LIR_Op1* move_op = op->as_Op1();
  80     if (move_op->move_kind() == lir_move_volatile) {
  81       bool is_long = move_op->type() == T_LONG;
  82       bool is_double = move_op->type() == T_DOUBLE;
  83       bool is_store = move_op->in_opr()->is_register();
  84       if (is_double) {
  85         add_temp(reg_num(FrameMap::long0_opr), op->id(), noUse, T_ILLEGAL);
  86         add_temp(reg_numHi(FrameMap::long0_opr), op->id(), noUse, T_ILLEGAL);
  87       }
  88       if (is_store && (is_long || is_double)) {
  89         add_temp(reg_num(FrameMap::long1_opr), op->id(), noUse, T_ILLEGAL);
  90         add_temp(reg_numHi(FrameMap::long1_opr), op->id(), noUse, T_ILLEGAL);
  91       }
  92     }
  93   }
  94 }
  95 
  96 inline bool LinearScanWalker::pd_init_regs_for_alloc(Interval* cur) {
  97   // The default logic is good enough for AArch32.
  98   return false;
  99 }
 100 
 101 #endif // CPU_AARCH32_VM_C1_LINEARSCAN_AARCH32_HPP