src/cpu/aarch32/vm/icBuffer_aarch32.cpp

rev 8069 : 8164652: aarch32: C1 port

*** 33,43 ****
  #include "memory/resourceArea.hpp"
  #include "nativeInst_aarch32.hpp"
  #include "oops/oop.inline.hpp"
  
  int InlineCacheBuffer::ic_stub_code_size() {
!   return 5 * NativeInstruction::arm_insn_sz;
  }
  
  #define __ masm->
  
  void InlineCacheBuffer::assemble_ic_buffer_code(address code_begin, void* cached_value, address entry_point) {
--- 33,43 ----
  #include "memory/resourceArea.hpp"
  #include "nativeInst_aarch32.hpp"
  #include "oops/oop.inline.hpp"
  
  int InlineCacheBuffer::ic_stub_code_size() {
!   return (MacroAssembler::far_branches() ? 5 : 3) * NativeInstruction::arm_insn_sz;
  }
  
  #define __ masm->
  
  void InlineCacheBuffer::assemble_ic_buffer_code(address code_begin, void* cached_value, address entry_point) {