src/cpu/aarch32/vm/macroAssembler_aarch32.hpp

rev 8069 : 8164652: aarch32: C1 port

*** 157,179 ****
  
    inline void mov(Register dst, address addr, Condition cond = C_DFLT) {
      // TODO: Do Address end up as address and then passing through this method, after
      // being marked for relocation elsewhere? If not (as I suspect) then this can
      // be relaxed to mov_immediate to potentially produce shorter code sequences.
!     mov_immediate32(dst, (u_int32_t)addr, cond, false);
    }
  
    inline void mov(Register dst, long l, Condition cond = C_DFLT) {
!     mov(dst, (u_int32_t)l, cond);
    }
    inline void mov(Register dst, unsigned long l, Condition cond = C_DFLT) {
!     mov(dst, (u_int32_t)l, cond);
    }
    inline void mov(Register dst, int i, Condition cond = C_DFLT) {
!     mov(dst, (u_int32_t)i, cond);
    }
!   inline void mov(Register dst, u_int32_t i, Condition cond = C_DFLT) {
      mov_immediate(dst, i, cond, false);
    }
  
    inline void mov(Register dst, Register src, Condition cond = C_DFLT) {
      Assembler::mov(dst, src, cond);
--- 157,179 ----
  
    inline void mov(Register dst, address addr, Condition cond = C_DFLT) {
      // TODO: Do Address end up as address and then passing through this method, after
      // being marked for relocation elsewhere? If not (as I suspect) then this can
      // be relaxed to mov_immediate to potentially produce shorter code sequences.
!     mov_immediate32(dst, (uint32_t)addr, cond, false);
    }
  
    inline void mov(Register dst, long l, Condition cond = C_DFLT) {
!     mov(dst, (uint32_t)l, cond);
    }
    inline void mov(Register dst, unsigned long l, Condition cond = C_DFLT) {
!     mov(dst, (uint32_t)l, cond);
    }
    inline void mov(Register dst, int i, Condition cond = C_DFLT) {
!     mov(dst, (uint32_t)i, cond);
    }
!   inline void mov(Register dst, uint32_t i, Condition cond = C_DFLT) {
      mov_immediate(dst, i, cond, false);
    }
  
    inline void mov(Register dst, Register src, Condition cond = C_DFLT) {
      Assembler::mov(dst, src, cond);
*** 588,600 ****
  
    // Stack overflow checking
    void bang_stack_with_offset(int offset) {
      // stack grows down, caller passes positive offset
      assert(offset > 0, "must bang with negative offset");
!     mov(rscratch2, -offset);
!     // bang with random number from r0
!     str(r0, Address(sp, rscratch2));
    }
  
    // Writes to stack successive pages until offset reached to check for
    // stack overflow + shadow pages.  Also, clobbers tmp
    void bang_stack_size(Register size, Register tmp);
--- 588,605 ----
  
    // Stack overflow checking
    void bang_stack_with_offset(int offset) {
      // stack grows down, caller passes positive offset
      assert(offset > 0, "must bang with negative offset");
!     // bang with random value from r0
!     if (operand_valid_for_add_sub_immediate(offset)) {
!       sub(rscratch2, sp, offset);
!       strb(r0, Address(rscratch2));
!     } else {
!       mov(rscratch2, offset);
!       strb(r0, Address(sp, rscratch2, Assembler::lsl(), Address::SUB));
!     }
    }
  
    // Writes to stack successive pages until offset reached to check for
    // stack overflow + shadow pages.  Also, clobbers tmp
    void bang_stack_size(Register size, Register tmp);
*** 651,661 ****
--- 656,670 ----
    void far_call(Address entry, CodeBuffer *cbuf = NULL, Register tmp = rscratch1);
    void far_jump(Address entry, CodeBuffer *cbuf = NULL, Register tmp = rscratch1);
  
    static int far_branch_size() {
      // TODO performance issue: always generate real far jumps
+     if (far_branches()) {
        return 3 * 4;  // movw, movt, br
+     } else {
+       return 4;
+     }
    }
  
    // Emit the CompiledIC call idiom
    void ic_call(address entry);