1 /*
   2  * Copyright (c) 1999, 2012, Oracle and/or its affiliates. All rights reserved.
   3  * Copyright (c) 2014, Red Hat Inc. All rights reserved.
   4  * Copyright (c) 2015-2018, Azul Systems, Inc. All rights reserved.
   5  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   6  *
   7  * This code is free software; you can redistribute it and/or modify it
   8  * under the terms of the GNU General Public License version 2 only, as
   9  * published by the Free Software Foundation.
  10  *
  11  * This code is distributed in the hope that it will be useful, but WITHOUT
  12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  14  * version 2 for more details (a copy is included in the LICENSE file that
  15  * accompanied this code).
  16  *
  17  * You should have received a copy of the GNU General Public License version
  18  * 2 along with this work; if not, write to the Free Software Foundation,
  19  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  20  *
  21  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  22  * or visit www.oracle.com if you need additional information or have any
  23  * questions.
  24  *
  25  */
  26 
  27 #ifndef CPU_AARCH32_VM_C1_FRAMEMAP_AARCH32_HPP
  28 #define CPU_AARCH32_VM_C1_FRAMEMAP_AARCH32_HPP
  29 
  30 // The following schema visualizes how a C1 frame looks like on AArch32.
  31 // It corresponds to the case of an unextended frame. Each line of text
  32 // represents one 4-byte slot. Every monitor takes two slots. Positions of
  33 // incoming arguments are determined by the Java calling convention. Spill
  34 // area and monitor area are not required to be 8-byte aligned. The slot
  35 // for deoptimization support is used by frame::deoptimize() method to save
  36 // the original pc before patching in the new one.
  37 //
  38 // When LIR_Opr's reference stack slots, they use virtual stack slot indices.
  39 // They are mapped to the real stack slots by FrameMap::sp_offset_for_slot()
  40 // and FrameMap::sp_offset_for_double_slot() methods. The first _argcount
  41 // virtual stack slots correspond to the real stack slots occupied by the
  42 // incoming arguments. Their mapping is defined by _argument_locations array
  43 // (which is filled in by applying the Java calling convention). All other
  44 // virtual stack slots correspond to spill slots.
  45 //
  46 // Higher addresses
  47 //                  |              incoming              |      virtual stack slots
  48 //                  |                                    |      [0 ... _arg_count - 1]
  49 //                  |             arguments              |
  50 //                  |====================================|----X- 8-byte aligned
  51 //                  |            previous lr             |   /|\ address
  52 //         rfp ===> |------------------------------------|    |
  53 //                  |            previous rfp            |    |
  54 //                  |====================================|    |
  55 //                  |     alignment slot (if needed)     |    |
  56 //                  |====================================|    |
  57 //                  |  slot for deoptimization support   |    |
  58 //                  |====================================|    |
  59 //                  | monitor [_num_monitors - 1] object |    |
  60 //                  |                                    |    |
  61 //                  |  monitor [_num_monitors - 1] lock  |    |
  62 //                  |------------------------------------|    |
  63 //                  |                                    |    |
  64 // Direction of     |                ...                 |    | _framesize
  65 // stack growth     |                                    |    | slots
  66 //      |           |------------------------------------|    |
  67 //      V           |         monitor [0] object         |    |
  68 //                  |                                    |    |
  69 //                  |          monitor [0] lock          |    |
  70 //                  |====================================|    |
  71 //                  |    spill slot [_num_spills - 1]    |    | virtual stack slot
  72 //                  |------------------------------------|    | [_arg_count + _num_spills - 1]
  73 //                  |                ...                 |    | ...
  74 //                  |------------------------------------|    |
  75 //                  |           spill slot [0]           |    | virtual stack slot
  76 //                  |====================================|    | [_arg_count]
  77 //                  |     reserved argument area for     |    |
  78 //                  |                ...                 |    |
  79 //                  |  outgoing calls (8-byte aligned)   |   \|/
  80 //          sp ===> |====================================|----X- 8-byte aligned
  81 //                  |                                    |       address
  82 // Lower addresses
  83 
  84  public:
  85   enum {
  86     first_available_sp_in_frame = 0,
  87     max_frame_pad = 16, // max value that frame::get_frame_size() may return
  88     frame_pad_in_bytes = max_frame_pad
  89   };
  90 
  91  public:
  92   static LIR_Opr r0_opr;
  93   static LIR_Opr r1_opr;
  94   static LIR_Opr r2_opr;
  95   static LIR_Opr r3_opr;
  96   static LIR_Opr r4_opr;
  97   static LIR_Opr r5_opr;
  98   static LIR_Opr r6_opr;
  99   static LIR_Opr r7_opr;
 100   static LIR_Opr r8_opr;
 101   static LIR_Opr r9_opr;
 102   static LIR_Opr r10_opr;
 103   static LIR_Opr r11_opr;
 104   static LIR_Opr r12_opr;
 105   static LIR_Opr r13_opr;
 106   static LIR_Opr r14_opr;
 107   static LIR_Opr r15_opr;
 108 
 109   static LIR_Opr r0_oop_opr;
 110   static LIR_Opr r1_oop_opr;
 111   static LIR_Opr r2_oop_opr;
 112   static LIR_Opr r3_oop_opr;
 113   static LIR_Opr r4_oop_opr;
 114   static LIR_Opr r5_oop_opr;
 115   static LIR_Opr r6_oop_opr;
 116   static LIR_Opr r7_oop_opr;
 117   static LIR_Opr r8_oop_opr;
 118   static LIR_Opr r9_oop_opr;
 119   static LIR_Opr r10_oop_opr;
 120   static LIR_Opr r11_oop_opr;
 121   static LIR_Opr r12_oop_opr;
 122   static LIR_Opr r13_oop_opr;
 123   static LIR_Opr r14_oop_opr;
 124   static LIR_Opr r15_oop_opr;
 125 
 126   static LIR_Opr r0_metadata_opr;
 127   static LIR_Opr r1_metadata_opr;
 128   static LIR_Opr r2_metadata_opr;
 129   static LIR_Opr r3_metadata_opr;
 130   static LIR_Opr r4_metadata_opr;
 131   static LIR_Opr r5_metadata_opr;
 132 
 133   static LIR_Opr sp_opr;
 134   static LIR_Opr receiver_opr;
 135 
 136   static LIR_Opr rscratch1_opr;
 137   static LIR_Opr rscratch2_opr;
 138   static LIR_Opr rscratch_long_opr;
 139 
 140   static LIR_Opr long0_opr;
 141   static LIR_Opr long1_opr;
 142   static LIR_Opr long2_opr;
 143   static LIR_Opr fpu0_float_opr;
 144   static LIR_Opr fpu0_double_opr;
 145 
 146   static LIR_Opr as_long_opr(Register r1, Register r2) {
 147     return LIR_OprFact::double_cpu(cpu_reg2rnr(r1), cpu_reg2rnr(r2));
 148   }
 149   static LIR_Opr as_pointer_opr(Register r) {
 150     return LIR_OprFact::single_cpu(cpu_reg2rnr(r));
 151   }
 152 
 153   static VMReg fpu_regname(int n);
 154 
 155   static bool is_caller_save_register(LIR_Opr opr) {
 156     // On AArch32, unlike on SPARC, we never explicitly request the C1 register
 157     // allocator to allocate a callee-saved register. Since the only place this
 158     // method is called is the assert in LinearScan::color_lir_opr(), we can
 159     // safely just always return true here.
 160     return true;
 161   }
 162   static int nof_caller_save_cpu_regs() {
 163     return pd_nof_caller_save_cpu_regs_frame_map;
 164   }
 165   static int last_cpu_reg() {
 166     return pd_last_cpu_reg;
 167   }
 168 
 169 #endif // CPU_AARCH32_VM_C1_FRAMEMAP_AARCH32_HPP