1 /*
   2  * Copyright (c) 2000, 2010, Oracle and/or its affiliates. All rights reserved.
   3  * Copyright (c) 2014, Red Hat Inc. All rights reserved.
   4  * Copyright (c) 2015-2018, Azul Systems, Inc. All rights reserved.
   5  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   6  *
   7  * This code is free software; you can redistribute it and/or modify it
   8  * under the terms of the GNU General Public License version 2 only, as
   9  * published by the Free Software Foundation.
  10  *
  11  * This code is distributed in the hope that it will be useful, but WITHOUT
  12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  14  * version 2 for more details (a copy is included in the LICENSE file that
  15  * accompanied this code).
  16  *
  17  * You should have received a copy of the GNU General Public License version
  18  * 2 along with this work; if not, write to the Free Software Foundation,
  19  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  20  *
  21  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  22  * or visit www.oracle.com if you need additional information or have any
  23  * questions.
  24  *
  25  */
  26 
  27 #ifndef CPU_AARCH32_VM_C1_LIRASSEMBLER_AARCH32_HPP
  28 #define CPU_AARCH32_VM_C1_LIRASSEMBLER_AARCH32_HPP
  29 
  30 #include "assembler_aarch32.hpp"
  31 
  32 // ArrayCopyStub needs access to bailout
  33 friend class ArrayCopyStub;
  34 
  35  private:
  36 
  37   int array_element_size(BasicType type) const;
  38 
  39   // helper functions which checks for overflow and sets bailout if it
  40   // occurs.  Always returns a valid embeddable pointer but in the
  41   // bailout case the pointer won't be to unique storage.
  42   address float_constant(float f);
  43   address double_constant(double d);
  44 
  45   Address as_Address(LIR_Address* addr, Register tmp, Address::InsnDataType type);
  46   Address as_Address_hi(LIR_Address* addr, Address::InsnDataType type);
  47   Address as_Address_lo(LIR_Address* addr, Address::InsnDataType type);
  48 
  49   Address as_Address(LIR_Address* addr, Address::InsnDataType type) {
  50     return as_Address(addr, rscratch1, type);
  51   }
  52 
  53 
  54   // Record the type of the receiver in ReceiverTypeData
  55   void type_profile_helper(Register mdo,
  56                            ciMethodData *md, ciProfileData *data,
  57                            Register recv, Label* update_done);
  58   void add_debug_info_for_branch(address adr, CodeEmitInfo* info);
  59 
  60   void casw(Register addr, Register newval, Register cmpval, Register result);
  61   void casl(Register addr, Register newval_lo, Register newval_hi,
  62             Register cmpval_lo,  Register cmpval_hi,
  63             Register tmp_lo, Register tmp_hi, Register result);
  64 
  65   FloatRegister as_float_reg(LIR_Opr doubleReg);
  66 
  67   static const int max_tableswitches = 20;
  68   struct tableswitch switches[max_tableswitches];
  69   int tableswitch_count;
  70 
  71   void init() { tableswitch_count = 0; }
  72 
  73   void deoptimize_trap(CodeEmitInfo *info);
  74 
  75   enum {
  76     _call_stub_size = 12 * NativeInstruction::arm_insn_sz,
  77     _call_aot_stub_size = 0,
  78     _exception_handler_size = DEBUG_ONLY(1*K) NOT_DEBUG(175),
  79     _deopt_handler_size = 7 * NativeInstruction::arm_insn_sz
  80   };
  81 
  82   // remap input register (*s1 or *s2) to a temp one if it is at the same time
  83   // used a result register (d) of a preceeding operation (so otherwise its
  84   // contents gets effectively corrupt)
  85   void check_register_collision(Register d, Register *s1, Register *s2 = NULL, Register tmp = rscratch1);
  86 
  87 public:
  88 
  89   void store_parameter(Register r, int offset_from_sp_in_words);
  90   void store_parameter(jint c,     int offset_from_sp_in_words);
  91   void store_parameter(jobject c,  int offset_from_sp_in_words);
  92 
  93 #endif // CPU_AARCH32_VM_C1_LIRASSEMBLER_AARCH32_HPP