1 /*
   2  * Copyright (c) 2018, Oracle and/or its affiliates. All rights reserved.
   3  * Copyright (c) 2015-2018, Azul Systems, Inc. All rights reserved.
   4  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   5  *
   6  * This code is free software; you can redistribute it and/or modify it
   7  * under the terms of the GNU General Public License version 2 only, as
   8  * published by the Free Software Foundation.
   9  *
  10  * This code is distributed in the hope that it will be useful, but WITHOUT
  11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  13  * version 2 for more details (a copy is included in the LICENSE file that
  14  * accompanied this code).
  15  *
  16  * You should have received a copy of the GNU General Public License version
  17  * 2 along with this work; if not, write to the Free Software Foundation,
  18  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  19  *
  20  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  21  * or visit www.oracle.com if you need additional information or have any
  22  * questions.
  23  *
  24  */
  25 
  26 #ifndef CPU_AARCH32_GC_G1_G1BARRIERSETASSEMBLER_AARCH32_HPP
  27 #define CPU_AARCH32_GC_G1_G1BARRIERSETASSEMBLER_AARCH32_HPP
  28 
  29 #include "asm/macroAssembler.hpp"
  30 #include "gc/shared/modRefBarrierSetAssembler.hpp"
  31 #include "utilities/macros.hpp"
  32 
  33 class LIR_Assembler;
  34 class StubAssembler;
  35 class G1PreBarrierStub;
  36 class G1PostBarrierStub;
  37 
  38 class G1BarrierSetAssembler: public ModRefBarrierSetAssembler {
  39 protected:
  40   void gen_write_ref_array_pre_barrier(MacroAssembler* masm, DecoratorSet decorators,
  41                                        Register addr, Register count);
  42   void gen_write_ref_array_post_barrier(MacroAssembler* masm, DecoratorSet decorators,
  43                                         Register start, Register end, Register tmp);
  44 
  45   void g1_write_barrier_pre(MacroAssembler* masm,
  46                             Address obj,
  47                             Register pre_val,
  48                             Register thread,
  49                             Register tmp,
  50                             bool tosca_live,
  51                             bool expand_call);
  52 
  53   void g1_write_barrier_post(MacroAssembler* masm,
  54                              Address store_addr,
  55                              Register new_val,
  56                              Register thread,
  57                              Register tmp,
  58                              Register tmp2);
  59 
  60   virtual void oop_store_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
  61                             Address dst, Register val, Register tmp1, Register tmp2);
  62 
  63 public:
  64 #ifdef COMPILER1
  65   void gen_pre_barrier_stub(LIR_Assembler* ce, G1PreBarrierStub* stub);
  66   void gen_post_barrier_stub(LIR_Assembler* ce, G1PostBarrierStub* stub);
  67 
  68   void generate_c1_pre_barrier_runtime_stub(StubAssembler* sasm);
  69   void generate_c1_post_barrier_runtime_stub(StubAssembler* sasm);
  70 #endif
  71 
  72   void load_word_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
  73                     Register dst, Address src, Register tmp1, Register tmp_thread);
  74   void load_tos_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
  75                    Address src, Register tmp1, Register tmp_thread);
  76 };
  77 
  78 #endif // CPU_AARCH32_GC_G1_G1BARRIERSETASSEMBLER_AARCH32_HPP