1 /*
2 * Copyright (c) 2000, 2010, Oracle and/or its affiliates. All rights reserved.
3 * Copyright (c) 2014, Red Hat Inc. All rights reserved.
4 * Copyright (c) 2015-2018, Azul Systems, Inc. All rights reserved.
5 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
6 *
7 * This code is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 only, as
9 * published by the Free Software Foundation.
10 *
11 * This code is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 * version 2 for more details (a copy is included in the LICENSE file that
15 * accompanied this code).
16 *
17 * You should have received a copy of the GNU General Public License version
18 * 2 along with this work; if not, write to the Free Software Foundation,
19 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
20 *
21 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
22 * or visit www.oracle.com if you need additional information or have any
23 * questions.
24 *
25 */
26
27 #ifndef CPU_AARCH32_VM_C1_DEFS_AARCH32_HPP
28 #define CPU_AARCH32_VM_C1_DEFS_AARCH32_HPP
29
30 // Native word offsets from memory address (little endian format)
31 enum {
32 pd_lo_word_offset_in_bytes = 0,
33 pd_hi_word_offset_in_bytes = BytesPerWord
34 };
35
36 // TODO: We should understand what values are correct for the following 3 flags
37 // relevant to floating point operations:
38 // - UseSSE
39 // Highest supported SSE instruction set on x86/x64. I believe we should
40 // set it to 0 in VM_Version::initialize(), like other non-x86 ports do.
41 // - RoundFPResults
42 // Indicates whether rounding is needed for floating point results
43 // - pd_strict_fp_requires_explicit_rounding
44 // The same as above but for the strictfp mode
45
46 // Explicit rounding operations are not required to implement the strictfp mode
47 enum {
48 pd_strict_fp_requires_explicit_rounding = false
49 };
50
51 // Registers
52 enum {
53 // Number of registers used during code emission
54 pd_nof_cpu_regs_frame_map = RegisterImpl::number_of_registers,
55 pd_nof_fpu_regs_frame_map = FloatRegisterImpl::number_of_registers,
56
57 // Number of registers killed by calls
58 pd_nof_caller_save_cpu_regs_frame_map = 9,
59
60 pd_nof_caller_save_fpu_regs_frame_map = pd_nof_fpu_regs_frame_map,
61 // The following two constants need to be defined since they are referenced
62 // from c1_FrameMap.hpp, but actually they are never used, so can be set to
63 // arbitrary values.
64 pd_nof_cpu_regs_reg_alloc = -1,
65 pd_nof_fpu_regs_reg_alloc = -1,
66
67 // All the constants below are used by linear scan register allocator only.
68 // Number of registers visible to register allocator
69 pd_nof_cpu_regs_linearscan = pd_nof_cpu_regs_frame_map,
70 pd_nof_fpu_regs_linearscan = pd_nof_fpu_regs_frame_map,
71 pd_nof_xmm_regs_linearscan = 0,
72
73 // Register allocator specific register numbers corresponding to first/last
74 // CPU/FPU registers available for allocation
75 pd_first_cpu_reg = 0,
76 pd_last_cpu_reg = 8,
77 pd_first_fpu_reg = pd_nof_cpu_regs_frame_map,
78 pd_last_fpu_reg = pd_first_fpu_reg + pd_nof_fpu_regs_frame_map - 1,
79 // Register allocator specific register numbers corresponding to first/last
80 // CPU/FPU callee-saved registers. These constants are used in
81 // LinearScan::is_caller_save() only.
82 pd_first_callee_saved_cpu_reg = 4,
83 pd_last_callee_saved_cpu_reg = 11,
84 pd_first_callee_saved_fpu_reg = pd_first_fpu_reg + pd_nof_fpu_regs_frame_map/2,
85 pd_last_callee_saved_fpu_reg = pd_first_fpu_reg + pd_nof_fpu_regs_frame_map - 1
86 };
87
88 // This flag must be in sync with how the floating point registers are stored
89 // on the stack by RegisterSaver::save_live_registers() method
90 // (sharedRuntime_aarch32.cpp) and save_live_registers() function
91 // (c1_Runtime1_aarch32.cpp). On AArch32 the floating point registers keep
92 // floats and doubles in their native form. No float to double conversion
93 // happens when the registers are stored on the stack. This is opposite to
94 // what happens on x86, where the FPU stack registers are 80 bits wide,
95 // and storing them in either 4 byte or 8 byte stack slot is a conversion
96 // operation.
97 enum {
98 pd_float_saved_as_double = false
99 };
100
101 #endif // CPU_AARCH32_VM_C1_DEFS_AARCH32_HPP