< prev index next >

src/hotspot/share/c1/c1_LIR.cpp

Print this page

        

*** 1,7 **** --- 1,8 ---- /* * Copyright (c) 2000, 2017, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2015-2018, Azul Systems, Inc. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License version 2 only, as * published by the Free Software Foundation.
*** 143,152 **** --- 144,154 ---- size_field() == double_size, "must match"); break; case T_FLOAT: // FP return values can be also in CPU registers on ARM and PPC32 (softfp ABI) assert((kindfield == fpu_register || kindfield == stack_value + AARCH32_ONLY(|| kindfield == cpu_register) ARM_ONLY(|| kindfield == cpu_register) PPC32_ONLY(|| kindfield == cpu_register) ) && size_field() == single_size, "must match"); break; case T_DOUBLE:
*** 1490,1500 **** #elif defined(AARCH64) } else if (is_single_fpu()) { out->print("fpu%d", fpu_regnr()); } else if (is_double_fpu()) { out->print("fpu%d", fpu_regnrLo()); ! #elif defined(ARM) } else if (is_single_fpu()) { out->print("s%d", fpu_regnr()); } else if (is_double_fpu()) { out->print("d%d", fpu_regnrLo() >> 1); #else --- 1492,1502 ---- #elif defined(AARCH64) } else if (is_single_fpu()) { out->print("fpu%d", fpu_regnr()); } else if (is_double_fpu()) { out->print("fpu%d", fpu_regnrLo()); ! #elif defined(ARM) || defined(AARCH32) } else if (is_single_fpu()) { out->print("s%d", fpu_regnr()); } else if (is_double_fpu()) { out->print("d%d", fpu_regnrLo() >> 1); #else
< prev index next >