1 /*
2 * Copyright (c) 2000, 2017, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
128 default:
129 ShouldNotReachHere();
130 return '?';
131 }
132 }
133
134 #ifndef PRODUCT
135 void LIR_OprDesc::validate_type() const {
136
137 #ifdef ASSERT
138 if (!is_pointer() && !is_illegal()) {
139 OprKind kindfield = kind_field(); // Factored out because of compiler bug, see 8002160
140 switch (as_BasicType(type_field())) {
141 case T_LONG:
142 assert((kindfield == cpu_register || kindfield == stack_value) &&
143 size_field() == double_size, "must match");
144 break;
145 case T_FLOAT:
146 // FP return values can be also in CPU registers on ARM and PPC32 (softfp ABI)
147 assert((kindfield == fpu_register || kindfield == stack_value
148 ARM_ONLY(|| kindfield == cpu_register)
149 PPC32_ONLY(|| kindfield == cpu_register) ) &&
150 size_field() == single_size, "must match");
151 break;
152 case T_DOUBLE:
153 // FP return values can be also in CPU registers on ARM and PPC32 (softfp ABI)
154 assert((kindfield == fpu_register || kindfield == stack_value
155 ARM_ONLY(|| kindfield == cpu_register)
156 PPC32_ONLY(|| kindfield == cpu_register) ) &&
157 size_field() == double_size, "must match");
158 break;
159 case T_BOOLEAN:
160 case T_CHAR:
161 case T_BYTE:
162 case T_SHORT:
163 case T_INT:
164 case T_ADDRESS:
165 case T_OBJECT:
166 case T_METADATA:
167 case T_ARRAY:
1475 out->print("R%d", vreg_number());
1476 } else if (is_single_cpu()) {
1477 out->print("%s", as_register()->name());
1478 } else if (is_double_cpu()) {
1479 out->print("%s", as_register_hi()->name());
1480 out->print("%s", as_register_lo()->name());
1481 #if defined(X86)
1482 } else if (is_single_xmm()) {
1483 out->print("%s", as_xmm_float_reg()->name());
1484 } else if (is_double_xmm()) {
1485 out->print("%s", as_xmm_double_reg()->name());
1486 } else if (is_single_fpu()) {
1487 out->print("fpu%d", fpu_regnr());
1488 } else if (is_double_fpu()) {
1489 out->print("fpu%d", fpu_regnrLo());
1490 #elif defined(AARCH64)
1491 } else if (is_single_fpu()) {
1492 out->print("fpu%d", fpu_regnr());
1493 } else if (is_double_fpu()) {
1494 out->print("fpu%d", fpu_regnrLo());
1495 #elif defined(ARM)
1496 } else if (is_single_fpu()) {
1497 out->print("s%d", fpu_regnr());
1498 } else if (is_double_fpu()) {
1499 out->print("d%d", fpu_regnrLo() >> 1);
1500 #else
1501 } else if (is_single_fpu()) {
1502 out->print("%s", as_float_reg()->name());
1503 } else if (is_double_fpu()) {
1504 out->print("%s", as_double_reg()->name());
1505 #endif
1506
1507 } else if (is_illegal()) {
1508 out->print("-");
1509 } else {
1510 out->print("Unknown Operand");
1511 }
1512 if (!is_illegal()) {
1513 out->print("|%c", type_char());
1514 }
1515 if (is_register() && is_last_use()) {
|
1 /*
2 * Copyright (c) 2000, 2017, Oracle and/or its affiliates. All rights reserved.
3 * Copyright (c) 2015-2018, Azul Systems, Inc. All rights reserved.
4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
5 *
6 * This code is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 only, as
8 * published by the Free Software Foundation.
9 *
10 * This code is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
129 default:
130 ShouldNotReachHere();
131 return '?';
132 }
133 }
134
135 #ifndef PRODUCT
136 void LIR_OprDesc::validate_type() const {
137
138 #ifdef ASSERT
139 if (!is_pointer() && !is_illegal()) {
140 OprKind kindfield = kind_field(); // Factored out because of compiler bug, see 8002160
141 switch (as_BasicType(type_field())) {
142 case T_LONG:
143 assert((kindfield == cpu_register || kindfield == stack_value) &&
144 size_field() == double_size, "must match");
145 break;
146 case T_FLOAT:
147 // FP return values can be also in CPU registers on ARM and PPC32 (softfp ABI)
148 assert((kindfield == fpu_register || kindfield == stack_value
149 AARCH32_ONLY(|| kindfield == cpu_register)
150 ARM_ONLY(|| kindfield == cpu_register)
151 PPC32_ONLY(|| kindfield == cpu_register) ) &&
152 size_field() == single_size, "must match");
153 break;
154 case T_DOUBLE:
155 // FP return values can be also in CPU registers on ARM and PPC32 (softfp ABI)
156 assert((kindfield == fpu_register || kindfield == stack_value
157 ARM_ONLY(|| kindfield == cpu_register)
158 PPC32_ONLY(|| kindfield == cpu_register) ) &&
159 size_field() == double_size, "must match");
160 break;
161 case T_BOOLEAN:
162 case T_CHAR:
163 case T_BYTE:
164 case T_SHORT:
165 case T_INT:
166 case T_ADDRESS:
167 case T_OBJECT:
168 case T_METADATA:
169 case T_ARRAY:
1477 out->print("R%d", vreg_number());
1478 } else if (is_single_cpu()) {
1479 out->print("%s", as_register()->name());
1480 } else if (is_double_cpu()) {
1481 out->print("%s", as_register_hi()->name());
1482 out->print("%s", as_register_lo()->name());
1483 #if defined(X86)
1484 } else if (is_single_xmm()) {
1485 out->print("%s", as_xmm_float_reg()->name());
1486 } else if (is_double_xmm()) {
1487 out->print("%s", as_xmm_double_reg()->name());
1488 } else if (is_single_fpu()) {
1489 out->print("fpu%d", fpu_regnr());
1490 } else if (is_double_fpu()) {
1491 out->print("fpu%d", fpu_regnrLo());
1492 #elif defined(AARCH64)
1493 } else if (is_single_fpu()) {
1494 out->print("fpu%d", fpu_regnr());
1495 } else if (is_double_fpu()) {
1496 out->print("fpu%d", fpu_regnrLo());
1497 #elif defined(ARM) || defined(AARCH32)
1498 } else if (is_single_fpu()) {
1499 out->print("s%d", fpu_regnr());
1500 } else if (is_double_fpu()) {
1501 out->print("d%d", fpu_regnrLo() >> 1);
1502 #else
1503 } else if (is_single_fpu()) {
1504 out->print("%s", as_float_reg()->name());
1505 } else if (is_double_fpu()) {
1506 out->print("%s", as_double_reg()->name());
1507 #endif
1508
1509 } else if (is_illegal()) {
1510 out->print("-");
1511 } else {
1512 out->print("Unknown Operand");
1513 }
1514 if (!is_illegal()) {
1515 out->print("|%c", type_char());
1516 }
1517 if (is_register() && is_last_use()) {
|