257 void membar_loadstore();
258 void membar_storeload();
259 void get_thread(LIR_Opr result);
260
261 void verify_oop_map(CodeEmitInfo* info);
262
263 void atomic_op(LIR_Code code, LIR_Opr src, LIR_Opr data, LIR_Opr dest, LIR_Opr tmp);
264
265 #ifdef TARGET_ARCH_x86
266 # include "c1_LIRAssembler_x86.hpp"
267 #endif
268 #ifdef TARGET_ARCH_sparc
269 # include "c1_LIRAssembler_sparc.hpp"
270 #endif
271 #ifdef TARGET_ARCH_arm
272 # include "c1_LIRAssembler_arm.hpp"
273 #endif
274 #ifdef TARGET_ARCH_ppc
275 # include "c1_LIRAssembler_ppc.hpp"
276 #endif
277
278 };
279
280 #endif // SHARE_VM_C1_C1_LIRASSEMBLER_HPP
|
257 void membar_loadstore();
258 void membar_storeload();
259 void get_thread(LIR_Opr result);
260
261 void verify_oop_map(CodeEmitInfo* info);
262
263 void atomic_op(LIR_Code code, LIR_Opr src, LIR_Opr data, LIR_Opr dest, LIR_Opr tmp);
264
265 #ifdef TARGET_ARCH_x86
266 # include "c1_LIRAssembler_x86.hpp"
267 #endif
268 #ifdef TARGET_ARCH_sparc
269 # include "c1_LIRAssembler_sparc.hpp"
270 #endif
271 #ifdef TARGET_ARCH_arm
272 # include "c1_LIRAssembler_arm.hpp"
273 #endif
274 #ifdef TARGET_ARCH_ppc
275 # include "c1_LIRAssembler_ppc.hpp"
276 #endif
277 #ifdef TARGET_ARCH_aarch64
278 # include "c1_LIRAssembler_aarch64.hpp"
279 #endif
280
281 };
282
283 #endif // SHARE_VM_C1_C1_LIRASSEMBLER_HPP
|