1600 CardTableModRef_post_barrier_helper(addr, card_table_base);
1601 #else
1602 LIR_Opr tmp = new_pointer_register();
1603 if (TwoOperandLIRForm) {
1604 __ move(addr, tmp);
1605 __ unsigned_shift_right(tmp, CardTableModRefBS::card_shift, tmp);
1606 } else {
1607 __ unsigned_shift_right(addr, CardTableModRefBS::card_shift, tmp);
1608 }
1609
1610 LIR_Address* card_addr;
1611 if (can_inline_as_constant(card_table_base)) {
1612 card_addr = new LIR_Address(tmp, card_table_base->as_jint(), T_BYTE);
1613 } else {
1614 card_addr = new LIR_Address(tmp, load_constant(card_table_base), T_BYTE);
1615 }
1616
1617 LIR_Opr dirty = LIR_OprFact::intConst(CardTableModRefBS::dirty_card_val());
1618 if (UseCondCardMark) {
1619 LIR_Opr cur_value = new_register(T_INT);
1620 __ move(card_addr, cur_value);
1621
1622 LabelObj* L_already_dirty = new LabelObj();
1623 __ cmp(lir_cond_equal, cur_value, dirty);
1624 __ branch(lir_cond_equal, T_BYTE, L_already_dirty->label());
1625 __ move(dirty, card_addr);
1626 __ branch_destination(L_already_dirty->label());
1627 } else {
1628 __ move(dirty, card_addr);
1629 }
1630 #endif
1631 }
1632
1633
1634 //------------------------field access--------------------------------------
1635
1636 // Comment copied form templateTable_i486.cpp
1637 // ----------------------------------------------------------------------------
1638 // Volatile variables demand their effects be made known to all CPU's in
1639 // order. Store buffers on most chips allow reads & writes to reorder; the
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1600 CardTableModRef_post_barrier_helper(addr, card_table_base);
1601 #else
1602 LIR_Opr tmp = new_pointer_register();
1603 if (TwoOperandLIRForm) {
1604 __ move(addr, tmp);
1605 __ unsigned_shift_right(tmp, CardTableModRefBS::card_shift, tmp);
1606 } else {
1607 __ unsigned_shift_right(addr, CardTableModRefBS::card_shift, tmp);
1608 }
1609
1610 LIR_Address* card_addr;
1611 if (can_inline_as_constant(card_table_base)) {
1612 card_addr = new LIR_Address(tmp, card_table_base->as_jint(), T_BYTE);
1613 } else {
1614 card_addr = new LIR_Address(tmp, load_constant(card_table_base), T_BYTE);
1615 }
1616
1617 LIR_Opr dirty = LIR_OprFact::intConst(CardTableModRefBS::dirty_card_val());
1618 if (UseCondCardMark) {
1619 LIR_Opr cur_value = new_register(T_INT);
1620 if (UseConcMarkSweepGC) {
1621 __ membar_storeload();
1622 }
1623 __ move(card_addr, cur_value);
1624
1625 LabelObj* L_already_dirty = new LabelObj();
1626 __ cmp(lir_cond_equal, cur_value, dirty);
1627 __ branch(lir_cond_equal, T_BYTE, L_already_dirty->label());
1628 __ move(dirty, card_addr);
1629 __ branch_destination(L_already_dirty->label());
1630 } else {
1631 __ move(dirty, card_addr);
1632 }
1633 #endif
1634 }
1635
1636
1637 //------------------------field access--------------------------------------
1638
1639 // Comment copied form templateTable_i486.cpp
1640 // ----------------------------------------------------------------------------
1641 // Volatile variables demand their effects be made known to all CPU's in
1642 // order. Store buffers on most chips allow reads & writes to reorder; the
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