src/cpu/aarch64/vm/macroAssembler_aarch64.cpp

rev 9058 : 8139041: Redundant DMB instructions
Summary: Merge consecutive DMB intstructions
Reviewd-by: roland, kvn

*** 1707,1716 ****
--- 1707,1730 ----
    }
  
    return idivq_offset;
  }
  
+ void MacroAssembler::membar(Membar_mask_bits order_constraint) {
+   address prev = pc() - NativeMembar::instruction_size;
+   if (prev == code()->last_membar()) {
+     NativeMembar *bar = NativeMembar_at(prev);
+     // We are merging two memory barrier instructions.  On AArch64 we
+     // can do this simply by ORing them together.
+     bar->set_kind(bar->get_kind() | order_constraint);
+     BLOCK_COMMENT("merged membar");
+   } else {
+     code()->set_last_membar(pc());
+     dmb(Assembler::barrier(order_constraint));
+   }
+ }
+ 
  // MacroAssembler routines found actually to be needed
  
  void MacroAssembler::push(Register src)
  {
    str(src, Address(pre(esp, -1 * wordSize)));