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src/cpu/aarch64/vm/macroAssembler_aarch64.cpp
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*** 2299,2308 ****
--- 2299,2332 ----
patch_end[-2] = (u_int64_t)prolog_ptr;
patch_end[-1] = calltype;
}
#endif
+ void MacroAssembler::push_call_clobbered_registers() {
+ push(RegSet::range(r0, r18) - RegSet::of(rscratch1, rscratch2), sp);
+
+ // Push v0-v7, v16-v31.
+ for (int i = 30; i >= 0; i -= 2) {
+ if (i <= v7->encoding() || i >= v16->encoding()) {
+ stpd(as_FloatRegister(i), as_FloatRegister(i+1),
+ Address(pre(sp, -2 * wordSize)));
+ }
+ }
+ }
+
+ void MacroAssembler::pop_call_clobbered_registers() {
+
+ for (int i = 0; i < 32; i += 2) {
+ if (i <= v7->encoding() || i >= v16->encoding()) {
+ ldpd(as_FloatRegister(i), as_FloatRegister(i+1),
+ Address(post(sp, 2 * wordSize)));
+ }
+ }
+
+ pop(RegSet::range(r0, r18) - RegSet::of(rscratch1, rscratch2), sp);
+ }
+
void MacroAssembler::push_CPU_state(bool save_vectors) {
push(0x3fffffff, sp); // integer registers except lr & sp
if (!save_vectors) {
for (int i = 30; i >= 0; i -= 2)
*** 3097,3112 ****
lsr(obj, obj, CardTableModRefBS::card_shift);
assert(CardTableModRefBS::dirty_card_val() == 0, "must be");
! {
! ExternalAddress cardtable((address) ct->byte_map_base);
! unsigned long offset;
! adrp(rscratch1, cardtable, offset);
! assert(offset == 0, "byte_map_base is misaligned");
! }
if (UseCondCardMark) {
Label L_already_dirty;
membar(StoreLoad);
ldrb(rscratch2, Address(obj, rscratch1));
--- 3121,3131 ----
lsr(obj, obj, CardTableModRefBS::card_shift);
assert(CardTableModRefBS::dirty_card_val() == 0, "must be");
! load_byte_map_base(rscratch1);
if (UseCondCardMark) {
Label L_already_dirty;
membar(StoreLoad);
ldrb(rscratch2, Address(obj, rscratch1));
*** 3594,3623 ****
assert(sizeof(*ct->byte_map_base) == sizeof(jbyte), "adjust this code");
const Register card_addr = tmp;
lsr(card_addr, store_addr, CardTableModRefBS::card_shift);
- unsigned long offset;
- adrp(tmp2, cardtable, offset);
-
// get the address of the card
add(card_addr, card_addr, tmp2);
! ldrb(tmp2, Address(card_addr, offset));
cmpw(tmp2, (int)G1SATBCardTableModRefBS::g1_young_card_val());
br(Assembler::EQ, done);
assert((int)CardTableModRefBS::dirty_card_val() == 0, "must be 0");
membar(Assembler::StoreLoad);
! ldrb(tmp2, Address(card_addr, offset));
cbzw(tmp2, done);
// storing a region crossing, non-NULL oop, card is clean.
// dirty card and log.
! strb(zr, Address(card_addr, offset));
ldr(rscratch1, queue_index);
cbz(rscratch1, runtime);
sub(rscratch1, rscratch1, wordSize);
str(rscratch1, queue_index);
--- 3613,3640 ----
assert(sizeof(*ct->byte_map_base) == sizeof(jbyte), "adjust this code");
const Register card_addr = tmp;
lsr(card_addr, store_addr, CardTableModRefBS::card_shift);
// get the address of the card
+ load_byte_map_base(tmp2);
add(card_addr, card_addr, tmp2);
! ldrb(tmp2, Address(card_addr));
cmpw(tmp2, (int)G1SATBCardTableModRefBS::g1_young_card_val());
br(Assembler::EQ, done);
assert((int)CardTableModRefBS::dirty_card_val() == 0, "must be 0");
membar(Assembler::StoreLoad);
! ldrb(tmp2, Address(card_addr));
cbzw(tmp2, done);
// storing a region crossing, non-NULL oop, card is clean.
// dirty card and log.
! strb(zr, Address(card_addr));
ldr(rscratch1, queue_index);
cbz(rscratch1, runtime);
sub(rscratch1, rscratch1, wordSize);
str(rscratch1, queue_index);
*** 3969,3978 ****
--- 3986,3998 ----
unsigned long high_page = (unsigned long)(CodeCache::high_bound()-1) >> 12;
unsigned long dest_page = (unsigned long)dest.target() >> 12;
long offset_low = dest_page - low_page;
long offset_high = dest_page - high_page;
+ assert(is_valid_AArch64_address(dest.target()), "bad address");
+ assert(dest.getMode() == Address::literal, "ADRP must be applied to a literal address");
+
InstructionMark im(this);
code_section()->relocate(inst_mark(), dest.rspec());
// 8143067: Ensure that the adrp can reach the dest from anywhere within
// the code cache so that if it is relocated we know it will still reach
if (offset_high >= -(1<<20) && offset_low < (1<<20)) {
*** 3980,3994 ****
} else {
unsigned long pc_page = (unsigned long)pc() >> 12;
long offset = dest_page - pc_page;
offset = (offset & ((1<<20)-1)) << 12;
_adrp(reg1, pc()+offset);
! movk(reg1, ((unsigned long)dest.target() >> 32) & 0xffff, 32);
}
byte_offset = (unsigned long)dest.target() & 0xfff;
}
void MacroAssembler::build_frame(int framesize) {
assert(framesize > 0, "framesize must be > 0");
if (framesize < ((1 << 9) + 2 * wordSize)) {
sub(sp, sp, framesize);
stp(rfp, lr, Address(sp, framesize - 2 * wordSize));
--- 4000,4029 ----
} else {
unsigned long pc_page = (unsigned long)pc() >> 12;
long offset = dest_page - pc_page;
offset = (offset & ((1<<20)-1)) << 12;
_adrp(reg1, pc()+offset);
! movk(reg1, (unsigned long)dest.target() >> 32, 32);
}
byte_offset = (unsigned long)dest.target() & 0xfff;
}
+ void MacroAssembler::load_byte_map_base(Register reg) {
+ jbyte *byte_map_base =
+ ((CardTableModRefBS*)(Universe::heap()->barrier_set()))->byte_map_base;
+
+ if (is_valid_AArch64_address((address)byte_map_base)) {
+ // Strictly speaking the byte_map_base isn't an address at all,
+ // and it might even be negative.
+ unsigned long offset;
+ adrp(reg, ExternalAddress((address)byte_map_base), offset);
+ assert(offset == 0, "misaligned card table base");
+ } else {
+ mov(reg, (uint64_t)byte_map_base);
+ }
+ }
+
void MacroAssembler::build_frame(int framesize) {
assert(framesize > 0, "framesize must be > 0");
if (framesize < ((1 << 9) + 2 * wordSize)) {
sub(sp, sp, framesize);
stp(rfp, lr, Address(sp, framesize - 2 * wordSize));
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