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src/cpu/aarch64/vm/register_aarch64.hpp

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rev 12320 : 8170106: AArch64: Multiple JVMCI issues
Reviewed-by: rschatz

@@ -41,11 +41,12 @@
 
 class RegisterImpl: public AbstractRegisterImpl {
  public:
   enum {
     number_of_registers      = 32,
-    number_of_byte_registers = 32
+    number_of_byte_registers      = 32,
+    number_of_registers_for_jvmci = 34   // Including SP and ZR.
   };
 
   // derived registers, offsets, and addresses
   Register successor() const                          { return as_Register(encoding() + 1); }
 

@@ -101,10 +102,14 @@
 CONSTANT_REGISTER_DECLARATION(Register, r27,  (27));
 CONSTANT_REGISTER_DECLARATION(Register, r28,  (28));
 CONSTANT_REGISTER_DECLARATION(Register, r29,  (29));
 CONSTANT_REGISTER_DECLARATION(Register, r30,  (30));
 
+
+// r31 is not a general purpose register, but represents either the
+// stack pointer or the zero/discard register depending on the
+// instruction.
 CONSTANT_REGISTER_DECLARATION(Register, r31_sp, (31));
 CONSTANT_REGISTER_DECLARATION(Register, zr,  (32));
 CONSTANT_REGISTER_DECLARATION(Register, sp,  (33));
 
 // Used as a filler in instructions where a register field is unused.
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