1 /*
2 * Copyright (c) 2000, 2010, Oracle and/or its affiliates. All rights reserved.
3 * Copyright (c) 2014, Red Hat Inc. All rights reserved.
4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
5 *
6 * This code is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 only, as
8 * published by the Free Software Foundation.
9 *
10 * This code is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
24 */
25
26 #ifndef CPU_AARCH64_VM_REGISTER_AARCH64_HPP
27 #define CPU_AARCH64_VM_REGISTER_AARCH64_HPP
28
29 #include "asm/register.hpp"
30
31 class VMRegImpl;
32 typedef VMRegImpl* VMReg;
33
34 // Use Register as shortcut
35 class RegisterImpl;
36 typedef RegisterImpl* Register;
37
38 inline Register as_Register(int encoding) {
39 return (Register)(intptr_t) encoding;
40 }
41
42 class RegisterImpl: public AbstractRegisterImpl {
43 public:
44 enum {
45 number_of_registers = 32,
46 number_of_byte_registers = 32
47 };
48
49 // derived registers, offsets, and addresses
50 Register successor() const { return as_Register(encoding() + 1); }
51
52 // construction
53 inline friend Register as_Register(int encoding);
54
55 VMReg as_VMReg();
56
57 // accessors
58 int encoding() const { assert(is_valid(), "invalid register"); return (intptr_t)this; }
59 bool is_valid() const { return 0 <= (intptr_t)this && (intptr_t)this < number_of_registers; }
60 bool has_byte_register() const { return 0 <= (intptr_t)this && (intptr_t)this < number_of_byte_registers; }
61 const char* name() const;
62 int encoding_nocheck() const { return (intptr_t)this; }
63
64 // Return the bit which represents this register. This is intended
65 // to be ORed into a bitmask: for usage see class RegSet below.
66 unsigned long bit(bool should_set = true) const { return should_set ? 1 << encoding() : 0; }
67 };
68
69 // The integer registers of the aarch64 architecture
70
71 CONSTANT_REGISTER_DECLARATION(Register, noreg, (-1));
72
73
74 CONSTANT_REGISTER_DECLARATION(Register, r0, (0));
75 CONSTANT_REGISTER_DECLARATION(Register, r1, (1));
76 CONSTANT_REGISTER_DECLARATION(Register, r2, (2));
77 CONSTANT_REGISTER_DECLARATION(Register, r3, (3));
78 CONSTANT_REGISTER_DECLARATION(Register, r4, (4));
79 CONSTANT_REGISTER_DECLARATION(Register, r5, (5));
80 CONSTANT_REGISTER_DECLARATION(Register, r6, (6));
81 CONSTANT_REGISTER_DECLARATION(Register, r7, (7));
82 CONSTANT_REGISTER_DECLARATION(Register, r8, (8));
83 CONSTANT_REGISTER_DECLARATION(Register, r9, (9));
84 CONSTANT_REGISTER_DECLARATION(Register, r10, (10));
85 CONSTANT_REGISTER_DECLARATION(Register, r11, (11));
86 CONSTANT_REGISTER_DECLARATION(Register, r12, (12));
87 CONSTANT_REGISTER_DECLARATION(Register, r13, (13));
88 CONSTANT_REGISTER_DECLARATION(Register, r14, (14));
89 CONSTANT_REGISTER_DECLARATION(Register, r15, (15));
90 CONSTANT_REGISTER_DECLARATION(Register, r16, (16));
91 CONSTANT_REGISTER_DECLARATION(Register, r17, (17));
92 CONSTANT_REGISTER_DECLARATION(Register, r18, (18));
93 CONSTANT_REGISTER_DECLARATION(Register, r19, (19));
94 CONSTANT_REGISTER_DECLARATION(Register, r20, (20));
95 CONSTANT_REGISTER_DECLARATION(Register, r21, (21));
96 CONSTANT_REGISTER_DECLARATION(Register, r22, (22));
97 CONSTANT_REGISTER_DECLARATION(Register, r23, (23));
98 CONSTANT_REGISTER_DECLARATION(Register, r24, (24));
99 CONSTANT_REGISTER_DECLARATION(Register, r25, (25));
100 CONSTANT_REGISTER_DECLARATION(Register, r26, (26));
101 CONSTANT_REGISTER_DECLARATION(Register, r27, (27));
102 CONSTANT_REGISTER_DECLARATION(Register, r28, (28));
103 CONSTANT_REGISTER_DECLARATION(Register, r29, (29));
104 CONSTANT_REGISTER_DECLARATION(Register, r30, (30));
105
106 CONSTANT_REGISTER_DECLARATION(Register, r31_sp, (31));
107 CONSTANT_REGISTER_DECLARATION(Register, zr, (32));
108 CONSTANT_REGISTER_DECLARATION(Register, sp, (33));
109
110 // Used as a filler in instructions where a register field is unused.
111 const Register dummy_reg = r31_sp;
112
113 // Use FloatRegister as shortcut
114 class FloatRegisterImpl;
115 typedef FloatRegisterImpl* FloatRegister;
116
117 inline FloatRegister as_FloatRegister(int encoding) {
118 return (FloatRegister)(intptr_t) encoding;
119 }
120
121 // The implementation of floating point registers for the architecture
122 class FloatRegisterImpl: public AbstractRegisterImpl {
123 public:
124 enum {
125 number_of_registers = 32
126 };
127
128 // construction
129 inline friend FloatRegister as_FloatRegister(int encoding);
130
131 VMReg as_VMReg();
132
133 // derived registers, offsets, and addresses
134 FloatRegister successor() const { return as_FloatRegister(encoding() + 1); }
135
136 // accessors
137 int encoding() const { assert(is_valid(), "invalid register"); return (intptr_t)this; }
138 int encoding_nocheck() const { return (intptr_t)this; }
139 bool is_valid() const { return 0 <= (intptr_t)this && (intptr_t)this < number_of_registers; }
140 const char* name() const;
141
142 };
143
144 // The float registers of the AARCH64 architecture
145
146 CONSTANT_REGISTER_DECLARATION(FloatRegister, fnoreg , (-1));
147
148 CONSTANT_REGISTER_DECLARATION(FloatRegister, v0 , ( 0));
149 CONSTANT_REGISTER_DECLARATION(FloatRegister, v1 , ( 1));
150 CONSTANT_REGISTER_DECLARATION(FloatRegister, v2 , ( 2));
151 CONSTANT_REGISTER_DECLARATION(FloatRegister, v3 , ( 3));
152 CONSTANT_REGISTER_DECLARATION(FloatRegister, v4 , ( 4));
153 CONSTANT_REGISTER_DECLARATION(FloatRegister, v5 , ( 5));
154 CONSTANT_REGISTER_DECLARATION(FloatRegister, v6 , ( 6));
155 CONSTANT_REGISTER_DECLARATION(FloatRegister, v7 , ( 7));
156 CONSTANT_REGISTER_DECLARATION(FloatRegister, v8 , ( 8));
157 CONSTANT_REGISTER_DECLARATION(FloatRegister, v9 , ( 9));
158 CONSTANT_REGISTER_DECLARATION(FloatRegister, v10 , (10));
159 CONSTANT_REGISTER_DECLARATION(FloatRegister, v11 , (11));
160 CONSTANT_REGISTER_DECLARATION(FloatRegister, v12 , (12));
161 CONSTANT_REGISTER_DECLARATION(FloatRegister, v13 , (13));
162 CONSTANT_REGISTER_DECLARATION(FloatRegister, v14 , (14));
163 CONSTANT_REGISTER_DECLARATION(FloatRegister, v15 , (15));
164 CONSTANT_REGISTER_DECLARATION(FloatRegister, v16 , (16));
165 CONSTANT_REGISTER_DECLARATION(FloatRegister, v17 , (17));
166 CONSTANT_REGISTER_DECLARATION(FloatRegister, v18 , (18));
167 CONSTANT_REGISTER_DECLARATION(FloatRegister, v19 , (19));
168 CONSTANT_REGISTER_DECLARATION(FloatRegister, v20 , (20));
169 CONSTANT_REGISTER_DECLARATION(FloatRegister, v21 , (21));
170 CONSTANT_REGISTER_DECLARATION(FloatRegister, v22 , (22));
171 CONSTANT_REGISTER_DECLARATION(FloatRegister, v23 , (23));
172 CONSTANT_REGISTER_DECLARATION(FloatRegister, v24 , (24));
173 CONSTANT_REGISTER_DECLARATION(FloatRegister, v25 , (25));
174 CONSTANT_REGISTER_DECLARATION(FloatRegister, v26 , (26));
175 CONSTANT_REGISTER_DECLARATION(FloatRegister, v27 , (27));
176 CONSTANT_REGISTER_DECLARATION(FloatRegister, v28 , (28));
177 CONSTANT_REGISTER_DECLARATION(FloatRegister, v29 , (29));
178 CONSTANT_REGISTER_DECLARATION(FloatRegister, v30 , (30));
179 CONSTANT_REGISTER_DECLARATION(FloatRegister, v31 , (31));
180
181 // Need to know the total number of registers of all sorts for SharedInfo.
182 // Define a class that exports it.
183 class ConcreteRegisterImpl : public AbstractRegisterImpl {
184 public:
185 enum {
186 // A big enough number for C2: all the registers plus flags
187 // This number must be large enough to cover REG_COUNT (defined by c2) registers.
188 // There is no requirement that any ordering here matches any ordering c2 gives
189 // it's optoregs.
190
191 number_of_registers = (2 * RegisterImpl::number_of_registers +
192 4 * FloatRegisterImpl::number_of_registers +
193 1) // flags
194 };
195
196 // added to make it compile
197 static const int max_gpr;
198 static const int max_fpr;
199 };
200
201 // A set of registers
202 class RegSet {
203 uint32_t _bitset;
204
205 RegSet(uint32_t bitset) : _bitset(bitset) { }
206
207 public:
208
209 RegSet() : _bitset(0) { }
210
211 RegSet(Register r1) : _bitset(r1->bit()) { }
212
213 RegSet operator+(const RegSet aSet) const {
214 RegSet result(_bitset | aSet._bitset);
215 return result;
216 }
217
218 RegSet operator-(const RegSet aSet) const {
219 RegSet result(_bitset & ~aSet._bitset);
220 return result;
221 }
222
223 RegSet &operator+=(const RegSet aSet) {
224 *this = *this + aSet;
225 return *this;
226 }
227
228 static RegSet of(Register r1) {
229 return RegSet(r1);
230 }
231
232 static RegSet of(Register r1, Register r2) {
233 return of(r1) + r2;
234 }
235
236 static RegSet of(Register r1, Register r2, Register r3) {
237 return of(r1, r2) + r3;
238 }
239
240 static RegSet of(Register r1, Register r2, Register r3, Register r4) {
241 return of(r1, r2, r3) + r4;
242 }
243
244 static RegSet range(Register start, Register end) {
245 uint32_t bits = ~0;
246 bits <<= start->encoding();
247 bits <<= 31 - end->encoding();
248 bits >>= 31 - end->encoding();
249
250 return RegSet(bits);
251 }
252
253 uint32_t bits() const { return _bitset; }
254 };
255
256 #endif // CPU_AARCH64_VM_REGISTER_AARCH64_HPP