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src/hotspot/cpu/aarch64/assembler_aarch64.hpp

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rev 48402 : 8193260: AArch64: JVMCI: Implement trampoline calls
Reviewed-by: adinn


 831 
 832 #undef INSN
 833 
 834   // Extract
 835 #define INSN(NAME, opcode)                                              \
 836   void NAME(Register Rd, Register Rn, Register Rm, unsigned imms) {     \
 837     starti;                                                             \
 838     f(opcode, 31, 21), f(imms, 15, 10);                                 \
 839     rf(Rm, 16), rf(Rn, 5), rf(Rd, 0);                                   \
 840   }
 841 
 842   INSN(extrw, 0b00010011100);
 843   INSN(extr,  0b10010011110);
 844 
 845 #undef INSN
 846 
 847   // The maximum range of a branch is fixed for the AArch64
 848   // architecture.  In debug mode we shrink it in order to test
 849   // trampolines, but not so small that branches in the interpreter
 850   // are out of range.
 851   static const unsigned long branch_range = INCLUDE_JVMCI ? 128 * M : NOT_DEBUG(128 * M) DEBUG_ONLY(2 * M);
 852 
 853   static bool reachable_from_branch_at(address branch, address target) {
 854     return uabs(target - branch) < branch_range;
 855   }
 856 
 857   // Unconditional branch (immediate)
 858 #define INSN(NAME, opcode)                                              \
 859   void NAME(address dest) {                                             \
 860     starti;                                                             \
 861     long offset = (dest - pc()) >> 2;                                   \
 862     DEBUG_ONLY(assert(reachable_from_branch_at(pc(), dest), "debug only")); \
 863     f(opcode, 31), f(0b00101, 30, 26), sf(offset, 25, 0);               \
 864   }                                                                     \
 865   void NAME(Label &L) {                                                 \
 866     wrap_label(L, &Assembler::NAME);                                    \
 867   }                                                                     \
 868   void NAME(const Address &dest);
 869 
 870   INSN(b, 0);
 871   INSN(bl, 1);




 831 
 832 #undef INSN
 833 
 834   // Extract
 835 #define INSN(NAME, opcode)                                              \
 836   void NAME(Register Rd, Register Rn, Register Rm, unsigned imms) {     \
 837     starti;                                                             \
 838     f(opcode, 31, 21), f(imms, 15, 10);                                 \
 839     rf(Rm, 16), rf(Rn, 5), rf(Rd, 0);                                   \
 840   }
 841 
 842   INSN(extrw, 0b00010011100);
 843   INSN(extr,  0b10010011110);
 844 
 845 #undef INSN
 846 
 847   // The maximum range of a branch is fixed for the AArch64
 848   // architecture.  In debug mode we shrink it in order to test
 849   // trampolines, but not so small that branches in the interpreter
 850   // are out of range.
 851   static const unsigned long branch_range = NOT_DEBUG(128 * M) DEBUG_ONLY(2 * M);
 852 
 853   static bool reachable_from_branch_at(address branch, address target) {
 854     return uabs(target - branch) < branch_range;
 855   }
 856 
 857   // Unconditional branch (immediate)
 858 #define INSN(NAME, opcode)                                              \
 859   void NAME(address dest) {                                             \
 860     starti;                                                             \
 861     long offset = (dest - pc()) >> 2;                                   \
 862     DEBUG_ONLY(assert(reachable_from_branch_at(pc(), dest), "debug only")); \
 863     f(opcode, 31), f(0b00101, 30, 26), sf(offset, 25, 0);               \
 864   }                                                                     \
 865   void NAME(Label &L) {                                                 \
 866     wrap_label(L, &Assembler::NAME);                                    \
 867   }                                                                     \
 868   void NAME(const Address &dest);
 869 
 870   INSN(b, 0);
 871   INSN(bl, 1);


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