43 #include "oops/klass.inline.hpp"
44 #include "runtime/biasedLocking.hpp"
45 #include "runtime/icache.hpp"
46 #include "runtime/interfaceSupport.inline.hpp"
47 #include "runtime/jniHandles.inline.hpp"
48 #include "runtime/sharedRuntime.hpp"
49 #include "runtime/thread.hpp"
50 #include "utilities/powerOfTwo.hpp"
51 #ifdef COMPILER1
52 #include "c1/c1_LIRAssembler.hpp"
53 #endif
54 #ifdef COMPILER2
55 #include "oops/oop.hpp"
56 #include "opto/compile.hpp"
57 #include "opto/node.hpp"
58 #include "opto/output.hpp"
59 #endif
60
61 #ifdef PRODUCT
62 #define BLOCK_COMMENT(str) /* nothing */
63 #define STOP(error) stop(error)
64 #else
65 #define BLOCK_COMMENT(str) block_comment(str)
66 #define STOP(error) block_comment(error); stop(error)
67 #endif
68
69 #define BIND(label) bind(label); BLOCK_COMMENT(#label ":")
70
71 // Patch any kind of instruction; there may be several instructions.
72 // Return the total length (in bytes) of the instructions.
73 int MacroAssembler::pd_patch_instruction_size(address branch, address target) {
74 int instructions = 1;
75 assert((uint64_t)target < (1ul << 48), "48-bit overflow in address constant");
76 long offset = (target - branch) >> 2;
77 unsigned insn = *(unsigned*)branch;
78 if ((Instruction_aarch64::extract(insn, 29, 24) & 0b111011) == 0b011000) {
79 // Load register (literal)
80 Instruction_aarch64::spatch(branch, 23, 5, offset);
81 } else if (Instruction_aarch64::extract(insn, 30, 26) == 0b00101) {
82 // Unconditional branch (immediate)
83 Instruction_aarch64::spatch(branch, 25, 0, offset);
84 } else if (Instruction_aarch64::extract(insn, 31, 25) == 0b0101010) {
85 // Conditional branch (immediate)
86 Instruction_aarch64::spatch(branch, 23, 5, offset);
87 } else if (Instruction_aarch64::extract(insn, 30, 25) == 0b011010) {
88 // Compare & branch (immediate)
2206 Label done, not_weak;
2207 cbz(value, done); // Use NULL as-is.
2208
2209 STATIC_ASSERT(JNIHandles::weak_tag_mask == 1u);
2210 tbz(r0, 0, not_weak); // Test for jweak tag.
2211
2212 // Resolve jweak.
2213 access_load_at(T_OBJECT, IN_NATIVE | ON_PHANTOM_OOP_REF, value,
2214 Address(value, -JNIHandles::weak_tag_value), tmp, thread);
2215 verify_oop(value);
2216 b(done);
2217
2218 bind(not_weak);
2219 // Resolve (untagged) jobject.
2220 access_load_at(T_OBJECT, IN_NATIVE, value, Address(value, 0), tmp, thread);
2221 verify_oop(value);
2222 bind(done);
2223 }
2224
2225 void MacroAssembler::stop(const char* msg) {
2226 address ip = pc();
2227 pusha();
2228 mov(c_rarg0, (address)msg);
2229 mov(c_rarg1, (address)ip);
2230 mov(c_rarg2, sp);
2231 mov(c_rarg3, CAST_FROM_FN_PTR(address, MacroAssembler::debug64));
2232 blr(c_rarg3);
2233 hlt(0);
2234 }
2235
2236 void MacroAssembler::warn(const char* msg) {
2237 pusha();
2238 mov(c_rarg0, (address)msg);
2239 mov(lr, CAST_FROM_FN_PTR(address, warning));
2240 blr(lr);
2241 popa();
2242 }
2243
2244 void MacroAssembler::unimplemented(const char* what) {
2245 const char* buf = NULL;
2246 {
2247 ResourceMark rm;
2248 stringStream ss;
2249 ss.print("unimplemented: %s", what);
2250 buf = code_string(ss.as_string());
2251 }
2252 stop(buf);
2253 }
2254
2255 // If a constant does not fit in an immediate field, generate some
2256 // number of MOV instructions and then perform the operation.
2257 void MacroAssembler::wrap_add_sub_imm_insn(Register Rd, Register Rn, unsigned imm,
2258 add_sub_imm_insn insn1,
2259 add_sub_reg_insn insn2) {
2260 assert(Rd != zr, "Rd = zr and not setting flags?");
2261 if (operand_valid_for_add_sub_immediate((int)imm)) {
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43 #include "oops/klass.inline.hpp"
44 #include "runtime/biasedLocking.hpp"
45 #include "runtime/icache.hpp"
46 #include "runtime/interfaceSupport.inline.hpp"
47 #include "runtime/jniHandles.inline.hpp"
48 #include "runtime/sharedRuntime.hpp"
49 #include "runtime/thread.hpp"
50 #include "utilities/powerOfTwo.hpp"
51 #ifdef COMPILER1
52 #include "c1/c1_LIRAssembler.hpp"
53 #endif
54 #ifdef COMPILER2
55 #include "oops/oop.hpp"
56 #include "opto/compile.hpp"
57 #include "opto/node.hpp"
58 #include "opto/output.hpp"
59 #endif
60
61 #ifdef PRODUCT
62 #define BLOCK_COMMENT(str) /* nothing */
63 #else
64 #define BLOCK_COMMENT(str) block_comment(str)
65 #endif
66 #define STOP(str) stop(str);
67 #define BIND(label) bind(label); BLOCK_COMMENT(#label ":")
68
69 // Patch any kind of instruction; there may be several instructions.
70 // Return the total length (in bytes) of the instructions.
71 int MacroAssembler::pd_patch_instruction_size(address branch, address target) {
72 int instructions = 1;
73 assert((uint64_t)target < (1ul << 48), "48-bit overflow in address constant");
74 long offset = (target - branch) >> 2;
75 unsigned insn = *(unsigned*)branch;
76 if ((Instruction_aarch64::extract(insn, 29, 24) & 0b111011) == 0b011000) {
77 // Load register (literal)
78 Instruction_aarch64::spatch(branch, 23, 5, offset);
79 } else if (Instruction_aarch64::extract(insn, 30, 26) == 0b00101) {
80 // Unconditional branch (immediate)
81 Instruction_aarch64::spatch(branch, 25, 0, offset);
82 } else if (Instruction_aarch64::extract(insn, 31, 25) == 0b0101010) {
83 // Conditional branch (immediate)
84 Instruction_aarch64::spatch(branch, 23, 5, offset);
85 } else if (Instruction_aarch64::extract(insn, 30, 25) == 0b011010) {
86 // Compare & branch (immediate)
2204 Label done, not_weak;
2205 cbz(value, done); // Use NULL as-is.
2206
2207 STATIC_ASSERT(JNIHandles::weak_tag_mask == 1u);
2208 tbz(r0, 0, not_weak); // Test for jweak tag.
2209
2210 // Resolve jweak.
2211 access_load_at(T_OBJECT, IN_NATIVE | ON_PHANTOM_OOP_REF, value,
2212 Address(value, -JNIHandles::weak_tag_value), tmp, thread);
2213 verify_oop(value);
2214 b(done);
2215
2216 bind(not_weak);
2217 // Resolve (untagged) jobject.
2218 access_load_at(T_OBJECT, IN_NATIVE, value, Address(value, 0), tmp, thread);
2219 verify_oop(value);
2220 bind(done);
2221 }
2222
2223 void MacroAssembler::stop(const char* msg) {
2224 BLOCK_COMMENT(msg);
2225 dcps1(0xdeae);
2226 emit_int64((uintptr_t)msg);
2227 }
2228
2229 void MacroAssembler::unimplemented(const char* what) {
2230 const char* buf = NULL;
2231 {
2232 ResourceMark rm;
2233 stringStream ss;
2234 ss.print("unimplemented: %s", what);
2235 buf = code_string(ss.as_string());
2236 }
2237 stop(buf);
2238 }
2239
2240 // If a constant does not fit in an immediate field, generate some
2241 // number of MOV instructions and then perform the operation.
2242 void MacroAssembler::wrap_add_sub_imm_insn(Register Rd, Register Rn, unsigned imm,
2243 add_sub_imm_insn insn1,
2244 add_sub_reg_insn insn2) {
2245 assert(Rd != zr, "Rd = zr and not setting flags?");
2246 if (operand_valid_for_add_sub_immediate((int)imm)) {
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