--- old/agent/src/os/linux/LinuxDebuggerLocal.c 2014-12-10 05:38:28.711691317 -0500 +++ new/agent/src/os/linux/LinuxDebuggerLocal.c 2014-12-10 05:38:28.511709029 -0500 @@ -341,7 +341,7 @@ return (err == PS_OK)? array : 0; } -#if defined(i386) || defined(amd64) || defined(sparc) || defined(sparcv9) +#if defined(i386) || defined(amd64) || defined(sparc) || defined(sparcv9) || defined(aarch64) JNIEXPORT jlongArray JNICALL Java_sun_jvm_hotspot_debugger_linux_LinuxDebuggerLocal_getThreadIntegerRegisterSet0 (JNIEnv *env, jobject this_obj, jint lwp_id) { @@ -363,6 +363,9 @@ #ifdef amd64 #define NPRGREG sun_jvm_hotspot_debugger_amd64_AMD64ThreadContext_NPRGREG #endif +#ifdef aarch64 +#define NPRGREG 32 +#endif #if defined(sparc) || defined(sparcv9) #define NPRGREG sun_jvm_hotspot_debugger_sparc_SPARCThreadContext_NPRGREG #endif @@ -458,6 +461,12 @@ regs[REG_INDEX(R_O7)] = gregs.u_regs[14]; #endif /* sparc */ +#if defined(aarch64) + +#define REG_INDEX(reg) sun_jvm_hotspot_debugger_aarch64_AARCH64ThreadContext_##reg + +#endif /* aarch64 */ + (*env)->ReleaseLongArrayElements(env, array, regs, JNI_COMMIT); return array; --- old/agent/src/os/linux/libproc.h 2014-12-10 05:38:29.971579732 -0500 +++ new/agent/src/os/linux/libproc.h 2014-12-10 05:38:29.761598329 -0500 @@ -71,6 +71,9 @@ #if defined(sparc) || defined(sparcv9) || defined(ppc64) #define user_regs_struct pt_regs #endif +#if defined(aarch64) +#define user_regs_struct user_pt_regs +#endif // This C bool type must be int for compatibility with Linux calls and // it would be a mistake to equivalence it to C++ bool on many platforms --- old/agent/src/share/classes/sun/jvm/hotspot/HotSpotAgent.java 2014-12-10 05:38:31.211469918 -0500 +++ new/agent/src/share/classes/sun/jvm/hotspot/HotSpotAgent.java 2014-12-10 05:38:31.001488515 -0500 @@ -34,6 +34,7 @@ import sun.jvm.hotspot.debugger.MachineDescription; import sun.jvm.hotspot.debugger.MachineDescriptionAMD64; import sun.jvm.hotspot.debugger.MachineDescriptionPPC64; +import sun.jvm.hotspot.debugger.MachineDescriptionAArch64; import sun.jvm.hotspot.debugger.MachineDescriptionIA64; import sun.jvm.hotspot.debugger.MachineDescriptionIntelX86; import sun.jvm.hotspot.debugger.MachineDescriptionSPARC32Bit; @@ -591,6 +592,8 @@ machDesc = new MachineDescriptionAMD64(); } else if (cpu.equals("ppc64")) { machDesc = new MachineDescriptionPPC64(); + } else if (cpu.equals("aarch64")) { + machDesc = new MachineDescriptionAArch64(); } else if (cpu.equals("sparc")) { if (LinuxDebuggerLocal.getAddressSize()==8) { machDesc = new MachineDescriptionSPARC64Bit(); --- old/agent/src/share/classes/sun/jvm/hotspot/utilities/PlatformInfo.java 2014-12-10 05:38:32.521353905 -0500 +++ new/agent/src/share/classes/sun/jvm/hotspot/utilities/PlatformInfo.java 2014-12-10 05:38:32.301373388 -0500 @@ -61,7 +61,7 @@ return "x86"; } else if (cpu.equals("sparc") || cpu.equals("sparcv9")) { return "sparc"; - } else if (cpu.equals("ia64") || cpu.equals("amd64") || cpu.equals("x86_64") || cpu.equals("ppc64")) { + } else if (cpu.equals("ia64") || cpu.equals("amd64") || cpu.equals("x86_64") || cpu.equals("ppc64") || cpu.equals("aarch64")) { return cpu; } else { try { --- old/make/defs.make 2014-12-10 05:38:33.801240548 -0500 +++ new/make/defs.make 2014-12-10 05:38:33.591259146 -0500 @@ -286,7 +286,7 @@ # Use uname output for SRCARCH, but deal with platform differences. If ARCH # is not explicitly listed below, it is treated as x86. - SRCARCH = $(ARCH/$(filter sparc sparc64 ia64 amd64 x86_64 arm ppc ppc64 zero,$(ARCH))) + SRCARCH = $(ARCH/$(filter sparc sparc64 ia64 amd64 x86_64 arm ppc ppc64 aarch64 zero,$(ARCH))) ARCH/ = x86 ARCH/sparc = sparc ARCH/sparc64= sparc @@ -296,6 +296,7 @@ ARCH/ppc64 = ppc ARCH/ppc = ppc ARCH/arm = arm + ARCH/aarch64= aarch64 ARCH/zero = zero # BUILDARCH is usually the same as SRCARCH, except for sparcv9 @@ -326,11 +327,12 @@ LIBARCH/sparcv9 = sparcv9 LIBARCH/ia64 = ia64 LIBARCH/ppc64 = ppc64 + LIBARCH/aarch64 = aarch64 LIBARCH/ppc = ppc LIBARCH/arm = arm LIBARCH/zero = $(ZERO_LIBARCH) - LP64_ARCH = sparcv9 amd64 ia64 ppc64 zero + LP64_ARCH = sparcv9 amd64 ia64 ppc64 aarch64 zero endif # Required make macro settings for all platforms --- old/make/linux/makefiles/buildtree.make 2014-12-10 05:38:35.081127192 -0500 +++ new/make/linux/makefiles/buildtree.make 2014-12-10 05:38:34.871145789 -0500 @@ -194,6 +194,7 @@ DATA_MODE/sparcv9 = 64 DATA_MODE/amd64 = 64 DATA_MODE/ppc64 = 64 +DATA_MODE/aarch64 = 64 DATA_MODE = $(DATA_MODE/$(BUILDARCH)) --- old/make/linux/makefiles/defs.make 2014-12-10 05:38:36.341015606 -0500 +++ new/make/linux/makefiles/defs.make 2014-12-10 05:38:36.121035089 -0500 @@ -130,6 +130,15 @@ HS_ARCH = ppc endif +# AARCH64 +ifeq ($(ARCH), aarch64) + ARCH_DATA_MODEL = 64 + MAKE_ARGS += LP64=1 + PLATFORM = linux-aarch64 + VM_PLATFORM = linux_aarch64 + HS_ARCH = aarch64 +endif + # On 32 bit linux we build server and client, on 64 bit just server. ifeq ($(JVM_VARIANTS),) ifeq ($(ARCH_DATA_MODEL), 32) --- old/make/linux/makefiles/gcc.make 2014-12-10 05:38:37.580905792 -0500 +++ new/make/linux/makefiles/gcc.make 2014-12-10 05:38:37.370924390 -0500 @@ -172,6 +172,7 @@ ARCHFLAG = $(ARCHFLAG/$(BUILDARCH)) ARCHFLAG/i486 = -m32 -march=i586 ARCHFLAG/amd64 = -m64 $(STACK_ALIGNMENT_OPT) +ARCHFLAG/aarch64 = ARCHFLAG/ia64 = ARCHFLAG/sparc = -m32 -mcpu=v9 ARCHFLAG/sparcv9 = -m64 -mcpu=v9 --- old/src/os/linux/vm/os_linux.cpp 2014-12-10 05:38:38.850793321 -0500 +++ new/src/os/linux/vm/os_linux.cpp 2014-12-10 05:38:38.620813690 -0500 @@ -275,6 +275,8 @@ #else static char cpu_arch[] = "sparc"; #endif +#elif defined(AARCH64) +static char cpu_arch[] = "aarch64"; #else #error Add appropriate cpu_arch setting #endif @@ -1926,6 +1928,9 @@ #ifndef EM_486 #define EM_486 6 /* Intel 80486 */ #endif +#ifndef EM_AARCH64 + #define EM_AARCH64 183 /* ARM AARCH64 */ +#endif static const arch_t arch_array[]={ {EM_386, EM_386, ELFCLASS32, ELFDATA2LSB, (char*)"IA 32"}, @@ -1947,7 +1952,8 @@ {EM_MIPS_RS3_LE, EM_MIPS_RS3_LE, ELFCLASS32, ELFDATA2LSB, (char*)"MIPSel"}, {EM_MIPS, EM_MIPS, ELFCLASS32, ELFDATA2MSB, (char*)"MIPS"}, {EM_PARISC, EM_PARISC, ELFCLASS32, ELFDATA2MSB, (char*)"PARISC"}, - {EM_68K, EM_68K, ELFCLASS32, ELFDATA2MSB, (char*)"M68k"} + {EM_68K, EM_68K, ELFCLASS32, ELFDATA2MSB, (char*)"M68k"}, + {EM_AARCH64, EM_AARCH64, ELFCLASS64, ELFDATA2LSB, (char*)"AARCH64"}, }; #if (defined IA32) @@ -1978,9 +1984,11 @@ static Elf32_Half running_arch_code=EM_MIPS; #elif (defined M68K) static Elf32_Half running_arch_code=EM_68K; +#elif (defined AARCH64) + static Elf32_Half running_arch_code=EM_AARCH64; #else #error Method os::dll_load requires that one of following is defined:\ - IA32, AMD64, IA64, __sparc, __powerpc__, ARM, S390, ALPHA, MIPS, MIPSEL, PARISC, M68K + IA32, AMD64, IA64, __sparc, __powerpc__, ARM, S390, ALPHA, MIPS, MIPSEL, PARISC, M68K, AARCH64 #endif // Identify compatability class for VM's architecture and library's architecture @@ -3307,7 +3315,7 @@ #ifndef ZERO large_page_size = IA32_ONLY(4 * M) AMD64_ONLY(2 * M) IA64_ONLY(256 * M) SPARC_ONLY(4 * M) - ARM_ONLY(2 * M) PPC_ONLY(4 * M); + ARM_ONLY(2 * M) PPC_ONLY(4 * M) AARCH64_ONLY(2 * M); #endif // ZERO FILE *fp = fopen("/proc/meminfo", "r"); @@ -5870,11 +5878,11 @@ extern char** environ; #ifndef __NR_fork - #define __NR_fork IA32_ONLY(2) IA64_ONLY(not defined) AMD64_ONLY(57) + #define __NR_fork IA32_ONLY(2) IA64_ONLY(not defined) AMD64_ONLY(57) AARCH64_ONLY(1079) #endif #ifndef __NR_execve - #define __NR_execve IA32_ONLY(11) IA64_ONLY(1033) AMD64_ONLY(59) + #define __NR_execve IA32_ONLY(11) IA64_ONLY(1033) AMD64_ONLY(59) AARCH64_ONLY(221) #endif // Run the specified command in a separate process. Return its exit value, --- old/src/share/vm/asm/assembler.hpp 2014-12-10 05:38:40.310664024 -0500 +++ new/src/share/vm/asm/assembler.hpp 2014-12-10 05:38:40.090683507 -0500 @@ -433,6 +433,9 @@ #ifdef TARGET_ARCH_ppc # include "assembler_ppc.hpp" #endif +#ifdef TARGET_ARCH_aarch64 +# include "assembler_aarch64.hpp" +#endif #endif // SHARE_VM_ASM_ASSEMBLER_HPP --- old/src/share/vm/asm/assembler.inline.hpp 2014-12-10 05:38:41.560553325 -0500 +++ new/src/share/vm/asm/assembler.inline.hpp 2014-12-10 05:38:41.340572808 -0500 @@ -42,5 +42,8 @@ #ifdef TARGET_ARCH_ppc # include "assembler_ppc.inline.hpp" #endif +#ifdef TARGET_ARCH_aarch64 +# include "assembler_aarch64.inline.hpp" +#endif #endif // SHARE_VM_ASM_ASSEMBLER_INLINE_HPP --- old/src/share/vm/asm/codeBuffer.hpp 2014-12-10 05:38:42.790444396 -0500 +++ new/src/share/vm/asm/codeBuffer.hpp 2014-12-10 05:38:42.580462994 -0500 @@ -632,6 +632,9 @@ #ifdef TARGET_ARCH_ppc # include "codeBuffer_ppc.hpp" #endif +#ifdef TARGET_ARCH_aarch64 +# include "codeBuffer_aarch64.hpp" +#endif }; --- old/src/share/vm/asm/macroAssembler.hpp 2014-12-10 05:38:44.050332811 -0500 +++ new/src/share/vm/asm/macroAssembler.hpp 2014-12-10 05:38:43.840351408 -0500 @@ -42,5 +42,8 @@ #ifdef TARGET_ARCH_ppc # include "macroAssembler_ppc.hpp" #endif +#ifdef TARGET_ARCH_aarch64 +# include "macroAssembler_aarch64.hpp" +#endif #endif // SHARE_VM_ASM_MACROASSEMBLER_HPP --- old/src/share/vm/asm/macroAssembler.inline.hpp 2014-12-10 05:38:45.290222997 -0500 +++ new/src/share/vm/asm/macroAssembler.inline.hpp 2014-12-10 05:38:45.080241594 -0500 @@ -42,5 +42,8 @@ #ifdef TARGET_ARCH_ppc # include "macroAssembler_ppc.inline.hpp" #endif +#ifdef TARGET_ARCH_aarch64 +# include "macroAssembler_aarch64.inline.hpp" +#endif #endif // SHARE_VM_ASM_MACROASSEMBLER_INLINE_HPP --- old/src/share/vm/asm/register.hpp 2014-12-10 05:38:46.530113183 -0500 +++ new/src/share/vm/asm/register.hpp 2014-12-10 05:38:46.320131780 -0500 @@ -108,6 +108,9 @@ #ifdef TARGET_ARCH_ppc # include "register_ppc.hpp" #endif +#ifdef TARGET_ARCH_aarch64 +# include "register_aarch64.hpp" +#endif // Debugging support --- old/src/share/vm/c1/c1_Defs.hpp 2014-12-10 05:38:47.899991856 -0500 +++ new/src/share/vm/c1/c1_Defs.hpp 2014-12-10 05:38:47.680011339 -0500 @@ -48,6 +48,9 @@ #ifdef TARGET_ARCH_ppc # include "c1_Defs_ppc.hpp" #endif +#ifdef TARGET_ARCH_aarch64 +# include "c1_Defs_aarch64.hpp" +#endif // native word offsets from memory address --- old/src/share/vm/c1/c1_FpuStackSim.hpp 2014-12-10 05:38:49.139882042 -0500 +++ new/src/share/vm/c1/c1_FpuStackSim.hpp 2014-12-10 05:38:48.919901525 -0500 @@ -44,6 +44,9 @@ #ifdef TARGET_ARCH_ppc # include "c1_FpuStackSim_ppc.hpp" #endif +#ifdef TARGET_ARCH_aarch64 +# include "c1_FpuStackSim_aarch64.hpp" +#endif #endif // SHARE_VM_C1_C1_FPUSTACKSIM_HPP --- old/src/share/vm/c1/c1_FrameMap.hpp 2014-12-10 05:38:50.379772228 -0500 +++ new/src/share/vm/c1/c1_FrameMap.hpp 2014-12-10 05:38:50.159791711 -0500 @@ -94,6 +94,9 @@ #ifdef TARGET_ARCH_ppc # include "c1_FrameMap_ppc.hpp" #endif +#ifdef TARGET_ARCH_aarch64 +# include "c1_FrameMap_aarch64.hpp" +#endif friend class LIR_OprDesc; --- old/src/share/vm/c1/c1_LIR.cpp 2014-12-10 05:38:51.629661528 -0500 +++ new/src/share/vm/c1/c1_LIR.cpp 2014-12-10 05:38:51.409681011 -0500 @@ -67,7 +67,7 @@ #endif -#ifdef ARM +#if defined(ARM) || defined (AARCH64) FloatRegister LIR_OprDesc::as_float_reg() const { return as_FloatRegister(fpu_regnr()); @@ -154,7 +154,11 @@ #endif #ifdef _LP64 assert(base()->is_cpu_register(), "wrong base operand"); +#ifndef AARCH64 assert(index()->is_illegal() || index()->is_double_cpu(), "wrong index operand"); +#else + assert(index()->is_illegal() || index()->is_double_cpu() || index()->is_single_cpu(), "wrong index operand"); +#endif assert(base()->type() == T_OBJECT || base()->type() == T_LONG || base()->type() == T_METADATA, "wrong type for addresses"); #else @@ -1575,6 +1579,11 @@ } else if (is_single_fpu()) { out->print("fpu%d", fpu_regnr()); } else if (is_double_fpu()) { + out->print("fpu%d", fpu_regnrLo()); +#elif defined(AARCH64) + } else if (is_single_fpu()) { + out->print("fpu%d", fpu_regnr()); + } else if (is_double_fpu()) { out->print("fpu%d", fpu_regnrLo()); #elif defined(ARM) } else if (is_single_fpu()) { --- old/src/share/vm/c1/c1_LIR.hpp 2014-12-10 05:38:52.929546400 -0500 +++ new/src/share/vm/c1/c1_LIR.hpp 2014-12-10 05:38:52.719564998 -0500 @@ -450,8 +450,8 @@ XMMRegister as_xmm_double_reg() const; // for compatibility with RInfo int fpu () const { return lo_reg_half(); } -#endif // X86 -#if defined(SPARC) || defined(ARM) || defined(PPC) +#endif +#if defined(SPARC) || defined(ARM) || defined(PPC) || defined(AARCH64) FloatRegister as_float_reg () const; FloatRegister as_double_reg () const; #endif @@ -541,7 +541,7 @@ , _type(type) , _disp(0) { verify(); } -#if defined(X86) || defined(ARM) +#if defined(X86) || defined(ARM) || defined(AARCH64) LIR_Address(LIR_Opr base, LIR_Opr index, Scale scale, intx disp, BasicType type): _base(base) , _index(index) @@ -622,7 +622,7 @@ LIR_OprDesc::fpu_register | LIR_OprDesc::double_size); } #endif -#ifdef X86 +#if defined(X86) || defined(AARCH64) static LIR_Opr double_fpu(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) | (reg << LIR_OprDesc::reg2_shift) | LIR_OprDesc::double_type | --- old/src/share/vm/c1/c1_LIRAssembler.hpp 2014-12-10 05:38:54.249429501 -0500 +++ new/src/share/vm/c1/c1_LIRAssembler.hpp 2014-12-10 05:38:54.039448099 -0500 @@ -274,6 +274,9 @@ #ifdef TARGET_ARCH_ppc # include "c1_LIRAssembler_ppc.hpp" #endif +#ifdef TARGET_ARCH_aarch64 +# include "c1_LIRAssembler_aarch64.hpp" +#endif }; --- old/src/share/vm/c1/c1_LinearScan.hpp 2014-12-10 05:38:55.499318802 -0500 +++ new/src/share/vm/c1/c1_LinearScan.hpp 2014-12-10 05:38:55.279338285 -0500 @@ -985,6 +985,9 @@ #ifdef TARGET_ARCH_ppc # include "c1_LinearScan_ppc.hpp" #endif +#ifdef TARGET_ARCH_aarch64 +# include "c1_LinearScan_aarch64.hpp" +#endif #endif // SHARE_VM_C1_C1_LINEARSCAN_HPP --- old/src/share/vm/c1/c1_MacroAssembler.hpp 2014-12-10 05:38:56.769206331 -0500 +++ new/src/share/vm/c1/c1_MacroAssembler.hpp 2014-12-10 05:38:56.549225814 -0500 @@ -59,6 +59,9 @@ #ifdef TARGET_ARCH_ppc # include "c1_MacroAssembler_ppc.hpp" #endif +#ifdef TARGET_ARCH_aarch64 +# include "c1_MacroAssembler_aarch64.hpp" +#endif }; --- old/src/share/vm/c1/c1_Runtime1.cpp 2014-12-10 05:38:58.009096517 -0500 +++ new/src/share/vm/c1/c1_Runtime1.cpp 2014-12-10 05:38:57.799115114 -0500 @@ -722,6 +722,8 @@ JRT_END +#ifndef DEOPTIMIZE_WHEN_PATCHING + static Klass* resolve_field_return_klass(methodHandle caller, int bci, TRAPS) { Bytecode_field field_access(caller, bci); // This can be static or non-static field access @@ -1210,6 +1212,33 @@ } JRT_END +#else // DEOPTIMIZE_WHEN_PATCHING + +JRT_ENTRY(void, Runtime1::patch_code(JavaThread* thread, Runtime1::StubID stub_id )) + RegisterMap reg_map(thread, false); + + NOT_PRODUCT(_patch_code_slowcase_cnt++;) + if (TracePatching) { + tty->print_cr("Deoptimizing because patch is needed"); + } + + frame runtime_frame = thread->last_frame(); + frame caller_frame = runtime_frame.sender(®_map); + + // It's possible the nmethod was invalidated in the last + // safepoint, but if it's still alive then make it not_entrant. + nmethod* nm = CodeCache::find_nmethod(caller_frame.pc()); + if (nm != NULL) { + nm->make_not_entrant(); + } + + Deoptimization::deoptimize_frame(thread, caller_frame.id()); + + // Return to the now deoptimized frame. +JRT_END + +#endif // DEOPTIMIZE_WHEN_PATCHING + // // Entry point for compiled code. We want to patch a nmethod. // We don't do a normal VM transition here because we want to --- old/src/share/vm/c1/c1_globals.hpp 2014-12-10 05:38:59.298982275 -0500 +++ new/src/share/vm/c1/c1_globals.hpp 2014-12-10 05:38:59.089000872 -0500 @@ -38,6 +38,9 @@ #ifdef TARGET_ARCH_ppc # include "c1_globals_ppc.hpp" #endif +#ifdef TARGET_ARCH_aarch64 +# include "c1_globals_aarch64.hpp" +#endif #ifdef TARGET_OS_FAMILY_linux # include "c1_globals_linux.hpp" #endif --- old/src/share/vm/code/nativeInst.hpp 2014-12-10 05:39:00.558870689 -0500 +++ new/src/share/vm/code/nativeInst.hpp 2014-12-10 05:39:00.338890173 -0500 @@ -40,5 +40,8 @@ #ifdef TARGET_ARCH_ppc # include "nativeInst_ppc.hpp" #endif +#ifdef TARGET_ARCH_aarch64 +# include "nativeInst_aarch64.hpp" +#endif #endif // SHARE_VM_CODE_NATIVEINST_HPP --- old/src/share/vm/code/relocInfo.hpp 2014-12-10 05:39:01.798760875 -0500 +++ new/src/share/vm/code/relocInfo.hpp 2014-12-10 05:39:01.578780359 -0500 @@ -430,7 +430,9 @@ #ifdef TARGET_ARCH_ppc # include "relocInfo_ppc.hpp" #endif - +#ifdef TARGET_ARCH_aarch64 +# include "relocInfo_aarch64.hpp" +#endif protected: // Derived constant, based on format_width which is PD: --- old/src/share/vm/code/vmreg.hpp 2014-12-10 05:39:03.078647519 -0500 +++ new/src/share/vm/code/vmreg.hpp 2014-12-10 05:39:02.858667002 -0500 @@ -155,6 +155,9 @@ #ifdef TARGET_ARCH_ppc # include "vmreg_ppc.hpp" #endif +#ifdef TARGET_ARCH_aarch64 +# include "vmreg_aarch64.hpp" +#endif }; --- old/src/share/vm/code/vmreg.inline.hpp 2014-12-10 05:39:04.328536819 -0500 +++ new/src/share/vm/code/vmreg.inline.hpp 2014-12-10 05:39:04.108556302 -0500 @@ -42,5 +42,8 @@ #ifdef TARGET_ARCH_ppc # include "vmreg_ppc.inline.hpp" #endif +#ifdef TARGET_ARCH_aarch64 +# include "vmreg_aarch64.inline.hpp" +#endif #endif // SHARE_VM_CODE_VMREG_INLINE_HPP --- old/src/share/vm/compiler/disassembler.cpp 2014-12-10 05:39:05.568427005 -0500 +++ new/src/share/vm/compiler/disassembler.cpp 2014-12-10 05:39:05.348446488 -0500 @@ -48,6 +48,9 @@ #ifdef TARGET_ARCH_ppc # include "depChecker_ppc.hpp" #endif +#ifdef TARGET_ARCH_aarch64 +# include "depChecker_aarch64.hpp" +#endif #ifdef SHARK #include "shark/sharkEntry.hpp" #endif --- old/src/share/vm/compiler/disassembler.hpp 2014-12-10 05:39:06.818316306 -0500 +++ new/src/share/vm/compiler/disassembler.hpp 2014-12-10 05:39:06.608334903 -0500 @@ -78,6 +78,9 @@ #ifdef TARGET_ARCH_ppc # include "disassembler_ppc.hpp" #endif +#ifdef TARGET_ARCH_aarch64 +# include "disassembler_aarch64.hpp" +#endif public: --- old/src/share/vm/interpreter/bytecodeInterpreter.hpp 2014-12-10 05:39:08.158197635 -0500 +++ new/src/share/vm/interpreter/bytecodeInterpreter.hpp 2014-12-10 05:39:07.948216233 -0500 @@ -588,6 +588,9 @@ #ifdef TARGET_ARCH_ppc # include "bytecodeInterpreter_ppc.hpp" #endif +#ifdef TARGET_ARCH_aarch64 +# include "bytecodeInterpreter_aarch64.hpp" +#endif }; // BytecodeInterpreter --- old/src/share/vm/interpreter/bytecodeInterpreter.inline.hpp 2014-12-10 05:39:09.418086050 -0500 +++ new/src/share/vm/interpreter/bytecodeInterpreter.inline.hpp 2014-12-10 05:39:09.198105533 -0500 @@ -58,6 +58,9 @@ #ifdef TARGET_ARCH_ppc # include "bytecodeInterpreter_ppc.inline.hpp" #endif +#ifdef TARGET_ARCH_aarch64 +# include "bytecodeInterpreter_aarch64.inline.hpp" +#endif #endif // CC_INTERP --- old/src/share/vm/interpreter/cppInterpreter.hpp 2014-12-10 05:39:10.657976236 -0500 +++ new/src/share/vm/interpreter/cppInterpreter.hpp 2014-12-10 05:39:10.437995719 -0500 @@ -96,6 +96,9 @@ #ifdef TARGET_ARCH_ppc # include "cppInterpreter_ppc.hpp" #endif +#ifdef TARGET_ARCH_aarch64 +# include "cppInterpreter_aarch64.hpp" +#endif }; --- old/src/share/vm/interpreter/cppInterpreterGenerator.hpp 2014-12-10 05:39:11.897866422 -0500 +++ new/src/share/vm/interpreter/cppInterpreterGenerator.hpp 2014-12-10 05:39:11.687885020 -0500 @@ -59,6 +59,9 @@ #ifdef TARGET_ARCH_ppc # include "cppInterpreterGenerator_ppc.hpp" #endif +#ifdef TARGET_ARCH_aarch64 +# include "cppInterpreterGenerator_aarch64.hpp" +#endif }; --- old/src/share/vm/interpreter/interp_masm.hpp 2014-12-10 05:39:13.137756608 -0500 +++ new/src/share/vm/interpreter/interp_masm.hpp 2014-12-10 05:39:12.927775206 -0500 @@ -45,5 +45,8 @@ #ifdef TARGET_ARCH_MODEL_ppc_64 # include "interp_masm_ppc_64.hpp" #endif +#ifdef TARGET_ARCH_MODEL_aarch64 +# include "interp_masm_aarch64.hpp" +#endif #endif // SHARE_VM_INTERPRETER_INTERP_MASM_HPP --- old/src/share/vm/interpreter/interpreter.hpp 2014-12-10 05:39:14.377646794 -0500 +++ new/src/share/vm/interpreter/interpreter.hpp 2014-12-10 05:39:14.167665391 -0500 @@ -140,6 +140,9 @@ #ifdef TARGET_ARCH_ppc # include "interpreter_ppc.hpp" #endif +#ifdef TARGET_ARCH_aarch64 +# include "interpreter_aarch64.hpp" +#endif }; --- old/src/share/vm/interpreter/interpreterGenerator.hpp 2014-12-10 05:39:15.627536094 -0500 +++ new/src/share/vm/interpreter/interpreterGenerator.hpp 2014-12-10 05:39:15.417554692 -0500 @@ -58,6 +58,9 @@ #ifdef TARGET_ARCH_ppc # include "interpreterGenerator_ppc.hpp" #endif +#ifdef TARGET_ARCH_aarch64 +# include "interpreterGenerator_aarch64.hpp" +#endif }; --- old/src/share/vm/interpreter/interpreterRuntime.hpp 2014-12-10 05:39:16.877425395 -0500 +++ new/src/share/vm/interpreter/interpreterRuntime.hpp 2014-12-10 05:39:16.667443992 -0500 @@ -177,6 +177,9 @@ #ifdef TARGET_ARCH_ppc # include "interpreterRT_ppc.hpp" #endif +#ifdef TARGET_ARCH_aarch64 +# include "interpreterRT_aarch64.hpp" +#endif // Interpreter's frequency counter overflow --- old/src/share/vm/interpreter/templateInterpreter.hpp 2014-12-10 05:39:18.127314695 -0500 +++ new/src/share/vm/interpreter/templateInterpreter.hpp 2014-12-10 05:39:17.917333292 -0500 @@ -204,6 +204,9 @@ #ifdef TARGET_ARCH_ppc # include "templateInterpreter_ppc.hpp" #endif +#ifdef TARGET_ARCH_aarch64 +# include "templateInterpreter_aarch64.hpp" +#endif }; --- old/src/share/vm/interpreter/templateInterpreterGenerator.hpp 2014-12-10 05:39:19.377203995 -0500 +++ new/src/share/vm/interpreter/templateInterpreterGenerator.hpp 2014-12-10 05:39:19.167222593 -0500 @@ -98,6 +98,9 @@ #ifdef TARGET_ARCH_ppc # include "templateInterpreterGenerator_ppc.hpp" #endif +#ifdef TARGET_ARCH_aarch64 +# include "templateInterpreterGenerator_aarch64.hpp" +#endif }; --- old/src/share/vm/interpreter/templateTable.hpp 2014-12-10 05:39:20.627093296 -0500 +++ new/src/share/vm/interpreter/templateTable.hpp 2014-12-10 05:39:20.407112779 -0500 @@ -362,6 +362,9 @@ #ifdef TARGET_ARCH_MODEL_ppc_64 # include "templateTable_ppc_64.hpp" #endif +#ifdef TARGET_ARCH_MODEL_aarch64 +# include "templateTable_aarch64.hpp" +#endif }; #endif /* !CC_INTERP */ --- old/src/share/vm/memory/metaspace.cpp 2014-12-10 05:39:21.886981710 -0500 +++ new/src/share/vm/memory/metaspace.cpp 2014-12-10 05:39:21.657002079 -0500 @@ -3020,10 +3020,55 @@ // Don't use large pages for the class space. bool large_pages = false; +#ifndef AARCH64 ReservedSpace metaspace_rs = ReservedSpace(compressed_class_space_size(), _reserve_alignment, large_pages, requested_addr, 0); +#else // AARCH64 + ReservedSpace metaspace_rs; + + // Our compressed klass pointers may fit nicely into the lower 32 + // bits. + if ((uint64_t)requested_addr + compressed_class_space_size() < 4*G) { + metaspace_rs = ReservedSpace(compressed_class_space_size(), + _reserve_alignment, + large_pages, + requested_addr, 0); + } + + if (! metaspace_rs.is_reserved()) { + // Try to align metaspace so that we can decode a compressed klass + // with a single MOVK instruction. We can do this iff the + // compressed class base is a multiple of 4G. + for (char *a = (char*)align_ptr_up(requested_addr, 4*G); + a < (char*)(1024*G); + a += 4*G) { + +#if INCLUDE_CDS + if (UseSharedSpaces + && ! can_use_cds_with_metaspace_addr(a, cds_base)) { + // We failed to find an aligned base that will reach. Fall + // back to using our requested addr. + metaspace_rs = ReservedSpace(compressed_class_space_size(), + _reserve_alignment, + large_pages, + requested_addr, 0); + break; + } +#endif + + metaspace_rs = ReservedSpace(compressed_class_space_size(), + _reserve_alignment, + large_pages, + a, 0); + if (metaspace_rs.is_reserved()) + break; + } + } + +#endif // AARCH64 + if (!metaspace_rs.is_reserved()) { #if INCLUDE_CDS if (UseSharedSpaces) { --- old/src/share/vm/opto/ad.hpp 2014-12-10 05:39:23.276858612 -0500 +++ new/src/share/vm/opto/ad.hpp 2014-12-10 05:39:23.066877210 -0500 @@ -46,5 +46,8 @@ #ifdef TARGET_ARCH_MODEL_ppc_64 # include "adfiles/ad_ppc_64.hpp" #endif +#ifdef TARGET_ARCH_MODEL_aarch64 +# include "adfiles/ad_aarch64.hpp" +#endif #endif // SHARE_VM_OPTO_AD_HPP --- old/src/share/vm/opto/c2_globals.hpp 2014-12-10 05:39:24.516748798 -0500 +++ new/src/share/vm/opto/c2_globals.hpp 2014-12-10 05:39:24.306767396 -0500 @@ -38,6 +38,9 @@ #ifdef TARGET_ARCH_ppc # include "c2_globals_ppc.hpp" #endif +#ifdef TARGET_ARCH_aarch64 +# include "c2_globals_aarch64.hpp" +#endif #ifdef TARGET_OS_FAMILY_linux # include "c2_globals_linux.hpp" #endif --- old/src/share/vm/opto/graphKit.cpp 2014-12-10 05:39:25.796635442 -0500 +++ new/src/share/vm/opto/graphKit.cpp 2014-12-10 05:39:25.566655810 -0500 @@ -3813,7 +3813,7 @@ // Smash zero into card if( !UseConcMarkSweepGC ) { - __ store(__ ctrl(), card_adr, zero, bt, adr_type, MemNode::release); + __ store(__ ctrl(), card_adr, zero, bt, adr_type, MemNode::unordered); } else { // Specialized path for CM store barrier __ storeCM(__ ctrl(), card_adr, zero, oop_store, adr_idx, bt, adr_type); --- old/src/share/vm/opto/library_call.cpp 2014-12-10 05:39:27.256506144 -0500 +++ new/src/share/vm/opto/library_call.cpp 2014-12-10 05:39:26.936534484 -0500 @@ -2588,11 +2588,13 @@ // rough approximation of type. need_mem_bar = true; // For Stores, place a memory ordering barrier now. - if (is_store) { - insert_mem_bar(Op_MemBarRelease); - } else { - if (support_IRIW_for_not_multiple_copy_atomic_cpu) { - insert_mem_bar(Op_MemBarVolatile); + if (UseBarriersForVolatile) { + if (is_store) { + insert_mem_bar(Op_MemBarRelease); + } else { + if (support_IRIW_for_not_multiple_copy_atomic_cpu) { + insert_mem_bar(Op_MemBarVolatile); + } } } } @@ -2683,7 +2685,7 @@ } } - if (is_volatile) { + if (is_volatile && UseBarriersForVolatile) { if (!is_store) { insert_mem_bar(Op_MemBarAcquire); } else { @@ -2692,7 +2694,6 @@ } } } - if (need_mem_bar) insert_mem_bar(Op_MemBarCPUOrder); return true; --- old/src/share/vm/opto/memnode.hpp 2014-12-10 05:39:28.656382161 -0500 +++ new/src/share/vm/opto/memnode.hpp 2014-12-10 05:39:28.436401644 -0500 @@ -503,6 +503,10 @@ // Conservatively release stores of object references in order to // ensure visibility of object initialization. static inline MemOrd release_if_reference(const BasicType t) { + // AArch64 doesn't need a release store here because object + // initialization contains the necessary barriers. + AARCH64_ONLY(return unordered); + const MemOrd mo = (t == T_ARRAY || t == T_ADDRESS || // Might be the address of an object reference (`boxing'). t == T_OBJECT) ? release : unordered; --- old/src/share/vm/opto/optoreg.hpp 2014-12-10 05:39:29.946267919 -0500 +++ new/src/share/vm/opto/optoreg.hpp 2014-12-10 05:39:29.726287402 -0500 @@ -48,6 +48,9 @@ #ifdef TARGET_ARCH_MODEL_ppc_64 # include "adfiles/adGlobals_ppc_64.hpp" #endif +#ifdef TARGET_ARCH_MODEL_aarch64 +# include "adfiles/adGlobals_aarch64.hpp" +#endif //------------------------------OptoReg---------------------------------------- // We eventually need Registers for the Real World. Registers are essentially --- old/src/share/vm/opto/parse2.cpp 2014-12-10 05:39:31.196157219 -0500 +++ new/src/share/vm/opto/parse2.cpp 2014-12-10 05:39:30.976176702 -0500 @@ -1689,7 +1689,8 @@ a = pop(); // the array itself const TypeOopPtr* elemtype = _gvn.type(a)->is_aryptr()->elem()->make_oopptr(); const TypeAryPtr* adr_type = TypeAryPtr::OOPS; - Node* store = store_oop_to_array(control(), a, d, adr_type, c, elemtype, T_OBJECT, MemNode::release); + Node* store = store_oop_to_array(control(), a, d, adr_type, c, elemtype, T_OBJECT, + StoreNode::release_if_reference(T_OBJECT)); break; } case Bytecodes::_lastore: { --- old/src/share/vm/opto/parse3.cpp 2014-12-10 05:39:32.506041206 -0500 +++ new/src/share/vm/opto/parse3.cpp 2014-12-10 05:39:32.286060689 -0500 @@ -283,7 +283,9 @@ // If reference is volatile, prevent following memory ops from // floating down past the volatile write. Also prevents commoning // another volatile read. - if (is_vol) insert_mem_bar(Op_MemBarRelease); + if (is_vol) { + insert_mem_bar(UseBarriersForVolatile ? Op_MemBarRelease : Op_MemBarCPUOrder); + } // Compute address and memory type. int offset = field->offset_in_bytes(); @@ -325,7 +327,7 @@ if (is_vol) { // If not multiple copy atomic, we do the MemBarVolatile before the load. if (!support_IRIW_for_not_multiple_copy_atomic_cpu) { - insert_mem_bar(Op_MemBarVolatile); // Use fat membar + insert_mem_bar(UseBarriersForVolatile ? Op_MemBarVolatile : Op_MemBarCPUOrder); // Use fat membar } // Remember we wrote a volatile field. // For not multiple copy atomic cpu (ppc64) a barrier should be issued --- old/src/share/vm/prims/jni_md.h 2014-12-10 05:39:33.755930506 -0500 +++ new/src/share/vm/prims/jni_md.h 2014-12-10 05:39:33.545949104 -0500 @@ -39,6 +39,9 @@ #ifdef TARGET_ARCH_ppc # include "jni_ppc.h" #endif +#ifdef TARGET_ARCH_aarch64 +# include "jni_aarch64.h" +#endif /* --- old/src/share/vm/prims/methodHandles.hpp 2014-12-10 05:39:35.005819806 -0500 +++ new/src/share/vm/prims/methodHandles.hpp 2014-12-10 05:39:34.785839290 -0500 @@ -194,6 +194,9 @@ #ifdef TARGET_ARCH_ppc # include "methodHandles_ppc.hpp" #endif +#ifdef TARGET_ARCH_aarch64 +# include "methodHandles_aarch64.hpp" +#endif // Tracing static void trace_method_handle(MacroAssembler* _masm, const char* adaptername) PRODUCT_RETURN; --- old/src/share/vm/runtime/arguments.cpp 2014-12-10 05:39:36.275707336 -0500 +++ new/src/share/vm/runtime/arguments.cpp 2014-12-10 05:39:36.035728590 -0500 @@ -1161,7 +1161,8 @@ } // Increase the code cache size - tiered compiles a lot more. if (FLAG_IS_DEFAULT(ReservedCodeCacheSize)) { - FLAG_SET_ERGO(uintx, ReservedCodeCacheSize, ReservedCodeCacheSize * 5); + FLAG_SET_ERGO(uintx, ReservedCodeCacheSize, + MIN2(CODE_CACHE_DEFAULT_LIMIT, ReservedCodeCacheSize * 5)); } // Enable SegmentedCodeCache if TieredCompilation is enabled and ReservedCodeCacheSize >= 240M if (FLAG_IS_DEFAULT(SegmentedCodeCache) && ReservedCodeCacheSize >= 240*M) { @@ -2544,11 +2545,11 @@ "Invalid ReservedCodeCacheSize=%dK. Must be at least %uK.\n", ReservedCodeCacheSize/K, min_code_cache_size/K); status = false; - } else if (ReservedCodeCacheSize > 2*G) { - // Code cache size larger than MAXINT is not supported. + } else if (ReservedCodeCacheSize > CODE_CACHE_SIZE_LIMIT) { + // Code cache size larger than CODE_CACHE_SIZE_LIMIT is not supported. jio_fprintf(defaultStream::error_stream(), "Invalid ReservedCodeCacheSize=%dM. Must be at most %uM.\n", ReservedCodeCacheSize/M, - (2*G)/M); + CODE_CACHE_SIZE_LIMIT/M); status = false; } else if (NonNMethodCodeHeapSize < min_code_cache_size){ jio_fprintf(defaultStream::error_stream(), --- old/src/share/vm/runtime/atomic.inline.hpp 2014-12-10 05:39:37.635586894 -0500 +++ new/src/share/vm/runtime/atomic.inline.hpp 2014-12-10 05:39:37.425605492 -0500 @@ -43,6 +43,9 @@ #ifdef TARGET_OS_ARCH_linux_ppc # include "atomic_linux_ppc.inline.hpp" #endif +#ifdef TARGET_OS_ARCH_linux_aarch64 +# include "atomic_linux_aarch64.inline.hpp" +#endif // Solaris #ifdef TARGET_OS_ARCH_solaris_x86 --- old/src/share/vm/runtime/frame.hpp 2014-12-10 05:39:38.885476195 -0500 +++ new/src/share/vm/runtime/frame.hpp 2014-12-10 05:39:38.665495678 -0500 @@ -469,6 +469,9 @@ #ifdef TARGET_ARCH_ppc # include "frame_ppc.hpp" #endif +#ifdef TARGET_ARCH_aarch64 +# include "frame_aarch64.hpp" +#endif }; --- old/src/share/vm/runtime/frame.inline.hpp 2014-12-10 05:39:40.135365495 -0500 +++ new/src/share/vm/runtime/frame.inline.hpp 2014-12-10 05:39:39.925384093 -0500 @@ -76,6 +76,9 @@ #ifdef TARGET_ARCH_ppc # include "frame_ppc.inline.hpp" #endif +#ifdef TARGET_ARCH_aarch64 +# include "frame_aarch64.inline.hpp" +#endif #endif // SHARE_VM_RUNTIME_FRAME_INLINE_HPP --- old/src/share/vm/runtime/globals.hpp 2014-12-10 05:39:41.405253024 -0500 +++ new/src/share/vm/runtime/globals.hpp 2014-12-10 05:39:41.165274279 -0500 @@ -52,6 +52,9 @@ #ifdef TARGET_ARCH_ppc # include "globals_ppc.hpp" #endif +#ifdef TARGET_ARCH_aarch64 +# include "globals_aarch64.hpp" +#endif #ifdef TARGET_OS_FAMILY_linux # include "globals_linux.hpp" #endif @@ -91,6 +94,9 @@ #ifdef TARGET_OS_ARCH_linux_ppc # include "globals_linux_ppc.hpp" #endif +#ifdef TARGET_OS_ARCH_linux_aarch64 +# include "globals_linux_aarch64.hpp" +#endif #ifdef TARGET_OS_ARCH_aix_ppc # include "globals_aix_ppc.hpp" #endif @@ -110,8 +116,8 @@ #ifdef TARGET_ARCH_arm # include "c1_globals_arm.hpp" #endif -#ifdef TARGET_ARCH_ppc -# include "c1_globals_ppc.hpp" +#ifdef TARGET_ARCH_aarch64 +# include "c1_globals_aarch64.hpp" #endif #ifdef TARGET_OS_FAMILY_linux # include "c1_globals_linux.hpp" @@ -128,6 +134,9 @@ #ifdef TARGET_OS_FAMILY_bsd # include "c1_globals_bsd.hpp" #endif +#ifdef TARGET_ARCH_ppc +# include "c1_globals_ppc.hpp" +#endif #endif #ifdef COMPILER2 #ifdef TARGET_ARCH_x86 @@ -142,6 +151,9 @@ #ifdef TARGET_ARCH_ppc # include "c2_globals_ppc.hpp" #endif +#ifdef TARGET_ARCH_aarch64 +# include "c2_globals_aarch64.hpp" +#endif #ifdef TARGET_OS_FAMILY_linux # include "c2_globals_linux.hpp" #endif @@ -3952,6 +3964,9 @@ experimental(bool, AlwaysAtomicAccesses, false, \ "Accesses to all variables should always be atomic") \ \ + experimental(bool, UseBarriersForVolatile, false, \ + "Use explicit memory barriers for volatile accesses") \ + \ product(bool, EnableTracing, false, \ "Enable event-based tracing") \ \ --- old/src/share/vm/runtime/icache.hpp 2014-12-10 05:39:42.785130812 -0500 +++ new/src/share/vm/runtime/icache.hpp 2014-12-10 05:39:42.565150295 -0500 @@ -83,6 +83,9 @@ #ifdef TARGET_ARCH_ppc # include "icache_ppc.hpp" #endif +#ifdef TARGET_ARCH_aarch64 +# include "icache_aarch64.hpp" +#endif --- old/src/share/vm/runtime/javaCalls.hpp 2014-12-10 05:39:44.025020998 -0500 +++ new/src/share/vm/runtime/javaCalls.hpp 2014-12-10 05:39:43.815039595 -0500 @@ -46,6 +46,9 @@ #ifdef TARGET_ARCH_ppc # include "jniTypes_ppc.hpp" #endif +#ifdef TARGET_ARCH_aarch64 +# include "jniTypes_aarch64.hpp" +#endif // A JavaCallWrapper is constructed before each JavaCall and destructed after the call. // Its purpose is to allocate/deallocate a new handle block and to save/restore the last --- old/src/share/vm/runtime/javaFrameAnchor.hpp 2014-12-10 05:39:45.274910298 -0500 +++ new/src/share/vm/runtime/javaFrameAnchor.hpp 2014-12-10 05:39:45.064928896 -0500 @@ -92,6 +92,9 @@ #ifdef TARGET_ARCH_ppc # include "javaFrameAnchor_ppc.hpp" #endif +#ifdef TARGET_ARCH_aarch64 +# include "javaFrameAnchor_aarch64.hpp" +#endif public: --- old/src/share/vm/runtime/orderAccess.inline.hpp 2014-12-10 05:39:46.524799598 -0500 +++ new/src/share/vm/runtime/orderAccess.inline.hpp 2014-12-10 05:39:46.304819081 -0500 @@ -41,6 +41,9 @@ #ifdef TARGET_OS_ARCH_linux_arm # include "orderAccess_linux_arm.inline.hpp" #endif +#ifdef TARGET_OS_ARCH_linux_aarch64 +# include "orderAccess_linux_aarch64.inline.hpp" +#endif #ifdef TARGET_OS_ARCH_linux_ppc # include "orderAccess_linux_ppc.inline.hpp" #endif --- old/src/share/vm/runtime/os.hpp 2014-12-10 05:39:47.834683585 -0500 +++ new/src/share/vm/runtime/os.hpp 2014-12-10 05:39:47.614703068 -0500 @@ -823,6 +823,9 @@ #ifdef TARGET_OS_ARCH_aix_ppc # include "os_aix_ppc.hpp" #endif +#ifdef TARGET_OS_ARCH_linux_aarch64 +# include "os_linux_aarch64.hpp" +#endif #ifdef TARGET_OS_ARCH_bsd_x86 # include "os_bsd_x86.hpp" #endif --- old/src/share/vm/runtime/prefetch.inline.hpp 2014-12-10 05:39:49.114570229 -0500 +++ new/src/share/vm/runtime/prefetch.inline.hpp 2014-12-10 05:39:48.894589712 -0500 @@ -40,6 +40,9 @@ #ifdef TARGET_OS_ARCH_linux_arm # include "prefetch_linux_arm.inline.hpp" #endif +#ifdef TARGET_OS_ARCH_linux_aarch64 +# include "prefetch_linux_aarch64.inline.hpp" +#endif #ifdef TARGET_OS_ARCH_linux_ppc # include "prefetch_linux_ppc.inline.hpp" #endif --- old/src/share/vm/runtime/registerMap.hpp 2014-12-10 05:39:50.354460415 -0500 +++ new/src/share/vm/runtime/registerMap.hpp 2014-12-10 05:39:50.134479898 -0500 @@ -135,6 +135,9 @@ #ifdef TARGET_ARCH_ppc # include "registerMap_ppc.hpp" #endif +#ifdef TARGET_ARCH_aarch64 +# include "registerMap_aarch64.hpp" +#endif }; --- old/src/share/vm/runtime/stubRoutines.hpp 2014-12-10 05:39:51.604349715 -0500 +++ new/src/share/vm/runtime/stubRoutines.hpp 2014-12-10 05:39:51.384369198 -0500 @@ -105,6 +105,9 @@ #ifdef TARGET_ARCH_MODEL_ppc_64 # include "stubRoutines_ppc_64.hpp" #endif +#ifdef TARGET_ARCH_MODEL_aarch64 +# include "stubRoutines_aarch64.hpp" +#endif static jint _verify_oop_count; --- old/src/share/vm/runtime/thread.hpp 2014-12-10 05:39:52.864238130 -0500 +++ new/src/share/vm/runtime/thread.hpp 2014-12-10 05:39:52.634258498 -0500 @@ -1693,6 +1693,9 @@ #ifdef TARGET_OS_ARCH_linux_ppc # include "thread_linux_ppc.hpp" #endif +#ifdef TARGET_OS_ARCH_linux_aarch64 +# include "thread_linux_aarch64.hpp" +#endif #ifdef TARGET_OS_ARCH_aix_ppc # include "thread_aix_ppc.hpp" #endif --- old/src/share/vm/runtime/threadLocalStorage.hpp 2014-12-10 05:39:54.164123002 -0500 +++ new/src/share/vm/runtime/threadLocalStorage.hpp 2014-12-10 05:39:53.944142485 -0500 @@ -68,6 +68,9 @@ #ifdef TARGET_OS_ARCH_linux_ppc # include "threadLS_linux_ppc.hpp" #endif +#ifdef TARGET_OS_ARCH_linux_aarch64 +# include "threadLS_linux_aarch64.hpp" +#endif #ifdef TARGET_OS_ARCH_aix_ppc # include "threadLS_aix_ppc.hpp" #endif --- old/src/share/vm/runtime/vmStructs.cpp 2014-12-10 05:39:55.474006989 -0500 +++ new/src/share/vm/runtime/vmStructs.cpp 2014-12-10 05:39:55.244027357 -0500 @@ -122,6 +122,9 @@ #ifdef TARGET_ARCH_ppc # include "vmStructs_ppc.hpp" #endif +#ifdef TARGET_ARCH_aarch64 +# include "vmStructs_aarch64.hpp" +#endif #ifdef TARGET_OS_ARCH_linux_x86 # include "vmStructs_linux_x86.hpp" #endif @@ -146,6 +149,9 @@ #ifdef TARGET_OS_ARCH_linux_ppc # include "vmStructs_linux_ppc.hpp" #endif +#ifdef TARGET_OS_ARCH_linux_aarch64 +# include "vmStructs_linux_aarch64.hpp" +#endif #ifdef TARGET_OS_ARCH_aix_ppc # include "vmStructs_aix_ppc.hpp" #endif --- old/src/share/vm/runtime/vm_version.cpp 2014-12-10 05:39:56.813888319 -0500 +++ new/src/share/vm/runtime/vm_version.cpp 2014-12-10 05:39:56.593907802 -0500 @@ -196,6 +196,7 @@ ARM_ONLY("arm") \ PPC32_ONLY("ppc") \ PPC64_ONLY("ppc64") \ + AARCH64_ONLY("aarch64") \ SPARC_ONLY("sparc") #endif // ZERO --- old/src/share/vm/utilities/bytes.hpp 2014-12-10 05:39:58.063777619 -0500 +++ new/src/share/vm/utilities/bytes.hpp 2014-12-10 05:39:57.843797102 -0500 @@ -40,5 +40,8 @@ #ifdef TARGET_ARCH_ppc # include "bytes_ppc.hpp" #endif +#ifdef TARGET_ARCH_aarch64 +# include "bytes_aarch64.hpp" +#endif #endif // SHARE_VM_UTILITIES_BYTES_HPP --- old/src/share/vm/utilities/copy.hpp 2014-12-10 05:39:59.303667805 -0500 +++ new/src/share/vm/utilities/copy.hpp 2014-12-10 05:39:59.083687288 -0500 @@ -337,6 +337,9 @@ #ifdef TARGET_ARCH_ppc # include "copy_ppc.hpp" #endif +#ifdef TARGET_ARCH_aarch64 +# include "copy_aarch64.hpp" +#endif }; --- old/src/share/vm/utilities/globalDefinitions.hpp 2014-12-10 05:40:00.553557105 -0500 +++ new/src/share/vm/utilities/globalDefinitions.hpp 2014-12-10 05:40:00.333576588 -0500 @@ -417,6 +417,11 @@ ProfileRTM = 0x0 // Use RTM with abort ratio calculation }; +// The maximum size of the code cache. Can be overridden by targets. +#define CODE_CACHE_SIZE_LIMIT (2*G) +// Allow targets to reduce the default size of the code cache. +#define CODE_CACHE_DEFAULT_LIMIT CODE_CACHE_SIZE_LIMIT + #ifdef TARGET_ARCH_x86 # include "globalDefinitions_x86.hpp" #endif @@ -432,6 +437,9 @@ #ifdef TARGET_ARCH_ppc # include "globalDefinitions_ppc.hpp" #endif +#ifdef TARGET_ARCH_aarch64 +# include "globalDefinitions_aarch64.hpp" +#endif /* * If a platform does not support native stack walking --- old/src/share/vm/utilities/macros.hpp 2014-12-10 05:40:01.843442863 -0500 +++ new/src/share/vm/utilities/macros.hpp 2014-12-10 05:40:01.623462346 -0500 @@ -401,6 +401,14 @@ #define NOT_ARM(code) code #endif +#ifdef AARCH64 +#define AARCH64_ONLY(code) code +#define NOT_AARCH64(code) +#else +#define AARCH64_ONLY(code) +#define NOT_AARCH64(code) code +#endif + #ifdef JAVASE_EMBEDDED #define EMBEDDED_ONLY(code) code #define NOT_EMBEDDED(code) --- /dev/null 2014-11-19 12:19:41.930000000 -0500 +++ new/agent/src/share/classes/sun/jvm/hotspot/debugger/MachineDescriptionAArch64.java 2014-12-10 05:40:02.873351647 -0500 @@ -0,0 +1,39 @@ +/* + * Copyright (c) 2003, 2014, Oracle and/or its affiliates. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 only, as + * published by the Free Software Foundation. + * + * This code is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License + * version 2 for more details (a copy is included in the LICENSE file that + * accompanied this code). + * + * You should have received a copy of the GNU General Public License version + * 2 along with this work; if not, write to the Free Software Foundation, + * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. + * + * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA + * or visit www.oracle.com if you need additional information or have any + * questions. + * + */ + +package sun.jvm.hotspot.debugger; + +public class MachineDescriptionAArch64 extends MachineDescriptionTwosComplement implements MachineDescription { + public long getAddressSize() { + return 8; + } + + public boolean isLP64() { + return true; + } + + public boolean isBigEndian() { + return false; + } +} --- /dev/null 2014-11-19 12:19:41.930000000 -0500 +++ new/make/linux/makefiles/aarch64.make 2014-12-10 05:40:04.073245375 -0500 @@ -0,0 +1,32 @@ +# +# Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. +# DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. +# +# This code is free software; you can redistribute it and/or modify it +# under the terms of the GNU General Public License version 2 only, as +# published by the Free Software Foundation. +# +# This code is distributed in the hope that it will be useful, but WITHOUT +# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +# version 2 for more details (a copy is included in the LICENSE file that +# accompanied this code). +# +# You should have received a copy of the GNU General Public License version +# 2 along with this work; if not, write to the Free Software Foundation, +# Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. +# +# Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA +# or visit www.oracle.com if you need additional information or have any +# questions. +# +# + +# The copied fdlibm routines in sharedRuntimeTrig.o must not be optimized +OPT_CFLAGS/sharedRuntimeTrig.o = $(OPT_CFLAGS/NOOPT) +# The copied fdlibm routines in sharedRuntimeTrans.o must not be optimized +OPT_CFLAGS/sharedRuntimeTrans.o = $(OPT_CFLAGS/NOOPT) +# Must also specify if CPU is little endian +CFLAGS += -DVM_LITTLE_ENDIAN + +CFLAGS += -D_LP64=1 --- /dev/null 2014-11-19 12:19:41.930000000 -0500 +++ new/make/linux/platform_aarch64 2014-12-10 05:40:05.263139989 -0500 @@ -0,0 +1,15 @@ +os_family = linux + +arch = aarch64 + +arch_model = aarch64 + +os_arch = linux_aarch64 + +os_arch_model = linux_aarch64 + +lib_arch = aarch64 + +compiler = gcc + +sysdefs = -DLINUX -D_GNU_SOURCE -DAARCH64