src/share/vm/c1/c1_LIR.cpp

rev 7258 : 8064611: AARCH64: Changes to HotSpot shared code
Summary: Everything except cpu/ and os_cpu/.
Reviewed-by: kvn

*** 65,75 ****
    return FrameMap::nr2floatreg(fpu_regnrHi());
  }
  
  #endif
  
! #ifdef ARM
  
  FloatRegister LIR_OprDesc::as_float_reg() const {
    return as_FloatRegister(fpu_regnr());
  }
  
--- 65,75 ----
    return FrameMap::nr2floatreg(fpu_regnrHi());
  }
  
  #endif
  
! #if defined(ARM) || defined (AARCH64)
  
  FloatRegister LIR_OprDesc::as_float_reg() const {
    return as_FloatRegister(fpu_regnr());
  }
  
*** 152,162 ****
--- 152,166 ----
    // Note: offsets higher than 4096 must not be rejected here. They can
    // be handled by the back-end or will be rejected if not.
  #endif
  #ifdef _LP64
    assert(base()->is_cpu_register(), "wrong base operand");
+ #ifndef AARCH64
    assert(index()->is_illegal() || index()->is_double_cpu(), "wrong index operand");
+ #else
+   assert(index()->is_illegal() || index()->is_double_cpu() || index()->is_single_cpu(), "wrong index operand");
+ #endif
    assert(base()->type() == T_OBJECT || base()->type() == T_LONG || base()->type() == T_METADATA,
           "wrong type for addresses");
  #else
    assert(base()->is_single_cpu(), "wrong base operand");
    assert(index()->is_illegal() || index()->is_single_cpu(), "wrong index operand");
*** 1574,1583 ****
--- 1578,1592 ----
      out->print("%s", as_xmm_double_reg()->name());
    } else if (is_single_fpu()) {
      out->print("fpu%d", fpu_regnr());
    } else if (is_double_fpu()) {
      out->print("fpu%d", fpu_regnrLo());
+ #elif defined(AARCH64)
+   } else if (is_single_fpu()) {
+     out->print("fpu%d", fpu_regnr());
+   } else if (is_double_fpu()) {
+     out->print("fpu%d", fpu_regnrLo());
  #elif defined(ARM)
    } else if (is_single_fpu()) {
      out->print("s%d", fpu_regnr());
    } else if (is_double_fpu()) {
      out->print("d%d", fpu_regnrLo() >> 1);