src/share/vm/c1/c1_LIR.hpp

rev 7258 : 8064611: AARCH64: Changes to HotSpot shared code
Summary: Everything except cpu/ and os_cpu/.
Reviewed-by: kvn

*** 448,459 ****
  #ifdef X86
    XMMRegister as_xmm_float_reg() const;
    XMMRegister as_xmm_double_reg() const;
    // for compatibility with RInfo
    int fpu () const                                  { return lo_reg_half(); }
! #endif // X86
! #if defined(SPARC) || defined(ARM) || defined(PPC)
    FloatRegister as_float_reg   () const;
    FloatRegister as_double_reg  () const;
  #endif
  
    jint      as_jint()    const { return as_constant_ptr()->as_jint(); }
--- 448,459 ----
  #ifdef X86
    XMMRegister as_xmm_float_reg() const;
    XMMRegister as_xmm_double_reg() const;
    // for compatibility with RInfo
    int fpu () const                                  { return lo_reg_half(); }
! #endif
! #if defined(SPARC) || defined(ARM) || defined(PPC) || defined(AARCH64)
    FloatRegister as_float_reg   () const;
    FloatRegister as_double_reg  () const;
  #endif
  
    jint      as_jint()    const { return as_constant_ptr()->as_jint(); }
*** 539,549 ****
       , _index(LIR_OprDesc::illegalOpr())
       , _scale(times_1)
       , _type(type)
       , _disp(0) { verify(); }
  
! #if defined(X86) || defined(ARM)
    LIR_Address(LIR_Opr base, LIR_Opr index, Scale scale, intx disp, BasicType type):
         _base(base)
       , _index(index)
       , _scale(scale)
       , _type(type)
--- 539,549 ----
       , _index(LIR_OprDesc::illegalOpr())
       , _scale(times_1)
       , _type(type)
       , _disp(0) { verify(); }
  
! #if defined(X86) || defined(ARM) || defined(AARCH64)
    LIR_Address(LIR_Opr base, LIR_Opr index, Scale scale, intx disp, BasicType type):
         _base(base)
       , _index(index)
       , _scale(scale)
       , _type(type)
*** 620,630 ****
                                                                               (reg2 << LIR_OprDesc::reg2_shift) |
                                                                               LIR_OprDesc::double_type          |
                                                                               LIR_OprDesc::fpu_register         |
                                                                               LIR_OprDesc::double_size); }
  #endif
! #ifdef X86
    static LIR_Opr double_fpu(int reg)            { return (LIR_Opr)(intptr_t)((reg  << LIR_OprDesc::reg1_shift) |
                                                                               (reg  << LIR_OprDesc::reg2_shift) |
                                                                               LIR_OprDesc::double_type          |
                                                                               LIR_OprDesc::fpu_register         |
                                                                               LIR_OprDesc::double_size); }
--- 620,630 ----
                                                                               (reg2 << LIR_OprDesc::reg2_shift) |
                                                                               LIR_OprDesc::double_type          |
                                                                               LIR_OprDesc::fpu_register         |
                                                                               LIR_OprDesc::double_size); }
  #endif
! #if defined(X86) || defined(AARCH64)
    static LIR_Opr double_fpu(int reg)            { return (LIR_Opr)(intptr_t)((reg  << LIR_OprDesc::reg1_shift) |
                                                                               (reg  << LIR_OprDesc::reg2_shift) |
                                                                               LIR_OprDesc::double_type          |
                                                                               LIR_OprDesc::fpu_register         |
                                                                               LIR_OprDesc::double_size); }