1 /*
   2  * Copyright (c) 1998, 2014, Oracle and/or its affiliates. All rights reserved.
   3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   4  *
   5  * This code is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 only, as
   7  * published by the Free Software Foundation.
   8  *
   9  * This code is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  *
  23  */
  24 
  25 #ifndef SHARE_VM_CODE_VMREG_HPP
  26 #define SHARE_VM_CODE_VMREG_HPP
  27 
  28 #include "asm/register.hpp"
  29 #include "memory/allocation.hpp"
  30 #include "utilities/globalDefinitions.hpp"
  31 
  32 #ifdef COMPILER2
  33 #include "opto/adlcVMDeps.hpp"
  34 #include "utilities/ostream.hpp"
  35 #endif
  36 
  37 //------------------------------VMReg------------------------------------------
  38 // The VM uses 'unwarped' stack slots; the compiler uses 'warped' stack slots.
  39 // Register numbers below VMRegImpl::stack0 are the same for both.  Register
  40 // numbers above stack0 are either warped (in the compiler) or unwarped
  41 // (in the VM).  Unwarped numbers represent stack indices, offsets from
  42 // the current stack pointer.  Warped numbers are required during compilation
  43 // when we do not yet know how big the frame will be.
  44 
  45 class VMRegImpl;
  46 typedef VMRegImpl* VMReg;
  47 
  48 class VMRegImpl {
  49 // friend class OopMap;
  50 friend class VMStructs;
  51 friend class OptoReg;
  52 // friend class Location;
  53 private:
  54   enum {
  55     BAD_REG = -1
  56   };
  57 
  58 
  59 
  60   static VMReg stack0;
  61   // Names for registers
  62   static const char *regName[];
  63   static const int register_count;
  64 
  65 
  66 public:
  67 
  68   static VMReg  as_VMReg(int val, bool bad_ok = false) { assert(val > BAD_REG || bad_ok, "invalid"); return (VMReg) (intptr_t) val; }
  69 
  70   const char*  name() {
  71     if (is_reg()) {
  72       return regName[value()];
  73     } else if (!is_valid()) {
  74       return "BAD";
  75     } else {
  76       // shouldn't really be called with stack
  77       return "STACKED REG";
  78     }
  79   }
  80   static VMReg Bad() { return (VMReg) (intptr_t) BAD_REG; }
  81   bool is_valid() const { return ((intptr_t) this) != BAD_REG; }
  82   bool is_stack() const { return (intptr_t) this >= (intptr_t) stack0; }
  83   bool is_reg()   const { return is_valid() && !is_stack(); }
  84 
  85   // A concrete register is a value that returns true for is_reg() and is
  86   // also a register you could use in the assembler. On machines with
  87   // 64bit registers only one half of the VMReg (and OptoReg) is considered
  88   // concrete.
  89   //  bool is_concrete();
  90 
  91   // VMRegs are 4 bytes wide on all platforms
  92   static const int stack_slot_size;
  93   static const int slots_per_word;
  94 
  95 
  96   // This really ought to check that the register is "real" in the sense that
  97   // we don't try and get the VMReg number of a physical register that doesn't
  98   // have an expressible part. That would be pd specific code
  99   VMReg next() {
 100     assert((is_reg() && value() < stack0->value() - 1) || is_stack(), "must be");
 101     return (VMReg)(intptr_t)(value() + 1);
 102   }
 103   VMReg next(int i) {
 104     assert((is_reg() && value() < stack0->value() - i) || is_stack(), "must be");
 105     return (VMReg)(intptr_t)(value() + i);
 106   }
 107   VMReg prev() {
 108     assert((is_stack() && value() > stack0->value()) || (is_reg() && value() != 0), "must be");
 109     return (VMReg)(intptr_t)(value() - 1);
 110   }
 111 
 112 
 113   intptr_t value() const         {return (intptr_t) this; }
 114 
 115   void print_on(outputStream* st) const;
 116   void print() const { print_on(tty); }
 117 
 118   // bias a stack slot.
 119   // Typically used to adjust a virtual frame slots by amounts that are offset by
 120   // amounts that are part of the native abi. The VMReg must be a stack slot
 121   // and the result must be also.
 122 
 123   VMReg bias(int offset) {
 124     assert(is_stack(), "must be");
 125     // VMReg res = VMRegImpl::as_VMReg(value() + offset);
 126     VMReg res = stack2reg(reg2stack() + offset);
 127     assert(res->is_stack(), "must be");
 128     return res;
 129   }
 130 
 131   // Convert register numbers to stack slots and vice versa
 132   static VMReg stack2reg( int idx ) {
 133     return (VMReg) (intptr_t) (stack0->value() + idx);
 134   }
 135 
 136   uintptr_t reg2stack() {
 137     assert( is_stack(), "Not a stack-based register" );
 138     return value() - stack0->value();
 139   }
 140 
 141   static void set_regName();
 142 
 143 #ifdef TARGET_ARCH_x86
 144 # include "vmreg_x86.hpp"
 145 #endif
 146 #ifdef TARGET_ARCH_sparc
 147 # include "vmreg_sparc.hpp"
 148 #endif
 149 #ifdef TARGET_ARCH_zero
 150 # include "vmreg_zero.hpp"
 151 #endif
 152 #ifdef TARGET_ARCH_arm
 153 # include "vmreg_arm.hpp"
 154 #endif
 155 #ifdef TARGET_ARCH_ppc
 156 # include "vmreg_ppc.hpp"
 157 #endif
 158 
 159 
 160 };
 161 
 162 //---------------------------VMRegPair-------------------------------------------
 163 // Pairs of 32-bit registers for arguments.
 164 // SharedRuntime::java_calling_convention will overwrite the structs with
 165 // the calling convention's registers.  VMRegImpl::Bad is returned for any
 166 // unused 32-bit register.  This happens for the unused high half of Int
 167 // arguments, or for 32-bit pointers or for longs in the 32-bit sparc build
 168 // (which are passed to natives in low 32-bits of e.g. O0/O1 and the high
 169 // 32-bits of O0/O1 are set to VMRegImpl::Bad).  Longs in one register & doubles
 170 // always return a high and a low register, as do 64-bit pointers.
 171 //
 172 class VMRegPair {
 173 private:
 174   VMReg _second;
 175   VMReg _first;
 176 public:
 177   void set_bad (                   ) { _second=VMRegImpl::Bad(); _first=VMRegImpl::Bad(); }
 178   void set1    (         VMReg v  ) { _second=VMRegImpl::Bad(); _first=v; }
 179   void set2    (         VMReg v  ) { _second=v->next();  _first=v; }
 180   void set_pair( VMReg second, VMReg first    ) { _second= second;    _first= first; }
 181   void set_ptr ( VMReg ptr ) {
 182 #ifdef _LP64
 183     _second = ptr->next();
 184 #else
 185     _second = VMRegImpl::Bad();
 186 #endif
 187     _first = ptr;
 188   }
 189   // Return true if single register, even if the pair is really just adjacent stack slots
 190   bool is_single_reg() const {
 191     return (_first->is_valid()) && (_first->value() + 1 == _second->value());
 192   }
 193 
 194   // Return true if single stack based "register" where the slot alignment matches input alignment
 195   bool is_adjacent_on_stack(int alignment) const {
 196     return (_first->is_stack() && (_first->value() + 1 == _second->value()) && ((_first->value() & (alignment-1)) == 0));
 197   }
 198 
 199   // Return true if single stack based "register" where the slot alignment matches input alignment
 200   bool is_adjacent_aligned_on_stack(int alignment) const {
 201     return (_first->is_stack() && (_first->value() + 1 == _second->value()) && ((_first->value() & (alignment-1)) == 0));
 202   }
 203 
 204   // Return true if single register but adjacent stack slots do not count
 205   bool is_single_phys_reg() const {
 206     return (_first->is_reg() && (_first->value() + 1 == _second->value()));
 207   }
 208 
 209   VMReg second() const { return _second; }
 210   VMReg first()  const { return _first; }
 211   VMRegPair(VMReg s, VMReg f) {  _second = s; _first = f; }
 212   VMRegPair(VMReg f) { _second = VMRegImpl::Bad(); _first = f; }
 213   VMRegPair() { _second = VMRegImpl::Bad(); _first = VMRegImpl::Bad(); }
 214 };
 215 
 216 #endif // SHARE_VM_CODE_VMREG_HPP