src/cpu/aarch64/vm/nativeInst_aarch64.hpp

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  36 // We have interfaces for the following instructions:
  37 // - NativeInstruction
  38 // - - NativeCall
  39 // - - NativeMovConstReg
  40 // - - NativeMovConstRegPatching
  41 // - - NativeMovRegMem
  42 // - - NativeMovRegMemPatching
  43 // - - NativeJump
  44 // - - NativeIllegalOpCode
  45 // - - NativeGeneralJump
  46 // - - NativeReturn
  47 // - - NativeReturnX (return with argument)
  48 // - - NativePushConst
  49 // - - NativeTstRegMem
  50 
  51 // The base class for different kinds of native instruction abstractions.
  52 // Provides the primitive operations to manipulate code relative to this.
  53 
  54 class NativeInstruction VALUE_OBJ_CLASS_SPEC {
  55   friend class Relocation;

  56  public:
  57   enum { instruction_size = 4 };
  58   inline bool is_nop();
  59   bool is_dtrace_trap();
  60   inline bool is_illegal();
  61   inline bool is_return();
  62   bool is_jump();
  63   inline bool is_jump_or_nop();
  64   inline bool is_cond_jump();
  65   bool is_safepoint_poll();
  66   inline bool is_mov_literal64();
  67   bool is_movz();
  68   bool is_movk();

  69 
  70  protected:
  71   address addr_at(int offset) const    { return address(this) + offset; }
  72 
  73   s_char sbyte_at(int offset) const    { return *(s_char*) addr_at(offset); }
  74   u_char ubyte_at(int offset) const    { return *(u_char*) addr_at(offset); }
  75 
  76   jint int_at(int offset) const         { return *(jint*) addr_at(offset); }

  77 
  78   intptr_t ptr_at(int offset) const    { return *(intptr_t*) addr_at(offset); }
  79 
  80   oop  oop_at (int offset) const       { return *(oop*) addr_at(offset); }
  81 
  82 
  83   void set_char_at(int offset, char c)        { *addr_at(offset) = (u_char)c; }
  84   void set_int_at(int offset, jint  i)        { *(jint*)addr_at(offset) = i; }
  85   void set_ptr_at (int offset, intptr_t  ptr) { *(intptr_t*) addr_at(offset) = ptr; }

  86   void set_oop_at (int offset, oop  o)        { *(oop*) addr_at(offset) = o; }
  87 
  88  public:
  89 
  90   // unit test stuff
  91   static void test() {}                 // override for testing
  92 
  93   inline friend NativeInstruction* nativeInstruction_at(address address);
  94 
  95   static bool is_adrp_at(address instr);
  96   static bool is_ldr_literal_at(address instr);
  97   static bool is_ldrw_to_zr(address instr);
  98 
  99   static bool maybe_cpool_ref(address instr) {
 100     return is_adrp_at(instr) || is_ldr_literal_at(instr);
 101   }
 102 };
 103 
 104 inline NativeInstruction* nativeInstruction_at(address address) {
 105   return (NativeInstruction*)address;


 113 inline NativeCall* nativeCall_at(address address);
 114 // The NativeCall is an abstraction for accessing/manipulating native call imm32/rel32off
 115 // instructions (used to manipulate inline caches, primitive & dll calls, etc.).
 116 
 117 class NativeCall: public NativeInstruction {
 118  public:
 119   enum Aarch64_specific_constants {
 120     instruction_size            =    4,
 121     instruction_offset          =    0,
 122     displacement_offset         =    0,
 123     return_address_offset       =    4
 124   };
 125 
 126   enum { cache_line_size = BytesPerWord };  // conservative estimate!
 127   address instruction_address() const       { return addr_at(instruction_offset); }
 128   address next_instruction_address() const  { return addr_at(return_address_offset); }
 129   int   displacement() const                { return (int_at(displacement_offset) << 6) >> 4; }
 130   address displacement_address() const      { return addr_at(displacement_offset); }
 131   address return_address() const            { return addr_at(return_address_offset); }
 132   address destination() const;

 133   void  set_destination(address dest)       {
 134     int offset = dest - instruction_address();
 135     unsigned int insn = 0b100101 << 26;
 136     assert((offset & 3) == 0, "should be");
 137     offset >>= 2;
 138     offset &= (1 << 26) - 1; // mask off insn part
 139     insn |= offset;
 140     set_int_at(displacement_offset, insn);
 141     ICache::invalidate_range(instruction_address(), instruction_size);
 142   }
 143 
 144   // Similar to replace_mt_safe, but just changes the destination.  The
 145   // important thing is that free-running threads are able to execute
 146   // this call instruction at all times.  If the call is an immediate BL
 147   // instruction we can simply rely on atomicity of 32-bit writes to
 148   // make sure other threads will see no intermediate states.
 149 
 150   // We cannot rely on locks here, since the free-running threads must run at
 151   // full speed.
 152   //
 153   // Used in the runtime linkage of calls; see class CompiledIC.
 154   // (Cf. 4506997 and 4479829, where threads witnessed garbage displacements.)
 155   void  set_destination_mt_safe(address dest) { set_destination(dest); }
 156 
 157   void  verify_alignment()                       { ; }
 158   void  verify();
 159   void  print();
 160 
 161   // Creation
 162   inline friend NativeCall* nativeCall_at(address address);
 163   inline friend NativeCall* nativeCall_before(address return_address);
 164 
 165   static bool is_call_at(address instr) {
 166     const uint32_t insn = (*(uint32_t*)instr);
 167     return (insn >> 26) == 0b100101;
 168   }
 169 
 170   static bool is_call_before(address return_address) {
 171     return is_call_at(return_address - NativeCall::return_address_offset);
 172   }
 173 
 174   // MT-safe patching of a call instruction.
 175   static void insert(address code_pos, address entry);
 176 
 177   static void replace_mt_safe(address instr_addr, address code_buffer);

















 178 };
 179 
 180 inline NativeCall* nativeCall_at(address address) {
 181   NativeCall* call = (NativeCall*)(address - NativeCall::instruction_offset);
 182 #ifdef ASSERT
 183   call->verify();
 184 #endif
 185   return call;
 186 }
 187 
 188 inline NativeCall* nativeCall_before(address return_address) {
 189   NativeCall* call = (NativeCall*)(return_address - NativeCall::return_address_offset);
 190 #ifdef ASSERT
 191   call->verify();
 192 #endif
 193   return call;
 194 }
 195 
 196 // An interface for accessing/manipulating native mov reg, imm instructions.
 197 // (used to manipulate inlined 64-bit data calls, etc.)


 361   static void test() {}
 362 
 363   // Insertion of native jump instruction
 364   static void insert(address code_pos, address entry);
 365   // MT-safe insertion of native jump at verified method entry
 366   static void check_verified_entry_alignment(address entry, address verified_entry);
 367   static void patch_verified_entry(address entry, address verified_entry, address dest);
 368 };
 369 
 370 inline NativeJump* nativeJump_at(address address) {
 371   NativeJump* jump = (NativeJump*)(address - NativeJump::instruction_offset);
 372 #ifdef ASSERT
 373   jump->verify();
 374 #endif
 375   return jump;
 376 }
 377 
 378 class NativeGeneralJump: public NativeJump {
 379 public:
 380   enum AArch64_specific_constants {
 381     instruction_size            =    4,
 382     instruction_offset          =    0,
 383     data_offset                 =    0,
 384     next_instruction_offset     =    4
 385   };
 386   static void insert_unconditional(address code_pos, address entry);
 387   static void replace_mt_safe(address instr_addr, address code_buffer);
 388   static void verify();
 389 };
 390 
 391 inline NativeGeneralJump* nativeGeneralJump_at(address address) {
 392   NativeGeneralJump* jump = (NativeGeneralJump*)(address);
 393   debug_only(jump->verify();)
 394   return jump;
 395 }
 396 
 397 class NativePopReg : public NativeInstruction {
 398  public:
 399   // Insert a pop instruction
 400   static void insert(address code_pos, Register reg);
 401 };
 402 
 403 
 404 class NativeIllegalInstruction: public NativeInstruction {


 431   uint32_t insn = *(uint32_t*)addr_at(0);
 432 
 433   if (Instruction_aarch64::extract(insn, 30, 26) == 0b00101) {
 434     // Unconditional branch (immediate)
 435     return true;
 436   } else if (Instruction_aarch64::extract(insn, 31, 25) == 0b0101010) {
 437     // Conditional branch (immediate)
 438     return true;
 439   } else if (Instruction_aarch64::extract(insn, 30, 25) == 0b011010) {
 440     // Compare & branch (immediate)
 441     return true;
 442   } else if (Instruction_aarch64::extract(insn, 30, 25) == 0b011011) {
 443     // Test & branch (immediate)
 444     return true;
 445   } else
 446     return false;
 447 }
 448 
 449 inline bool NativeInstruction::is_jump_or_nop() {
 450   return is_nop() || is_jump();






























 451 }
 452 
 453 #endif // CPU_AARCH64_VM_NATIVEINST_AARCH64_HPP


  36 // We have interfaces for the following instructions:
  37 // - NativeInstruction
  38 // - - NativeCall
  39 // - - NativeMovConstReg
  40 // - - NativeMovConstRegPatching
  41 // - - NativeMovRegMem
  42 // - - NativeMovRegMemPatching
  43 // - - NativeJump
  44 // - - NativeIllegalOpCode
  45 // - - NativeGeneralJump
  46 // - - NativeReturn
  47 // - - NativeReturnX (return with argument)
  48 // - - NativePushConst
  49 // - - NativeTstRegMem
  50 
  51 // The base class for different kinds of native instruction abstractions.
  52 // Provides the primitive operations to manipulate code relative to this.
  53 
  54 class NativeInstruction VALUE_OBJ_CLASS_SPEC {
  55   friend class Relocation;
  56   friend bool is_NativeCallTrampolineStub_at(address);
  57  public:
  58   enum { instruction_size = 4 };
  59   inline bool is_nop();
  60   bool is_dtrace_trap();
  61   inline bool is_illegal();
  62   inline bool is_return();
  63   bool is_jump();
  64   inline bool is_jump_or_nop();
  65   inline bool is_cond_jump();
  66   bool is_safepoint_poll();
  67   inline bool is_mov_literal64();
  68   bool is_movz();
  69   bool is_movk();
  70   bool is_sigill_zombie_not_entrant();
  71 
  72  protected:
  73   address addr_at(int offset) const    { return address(this) + offset; }
  74 
  75   s_char sbyte_at(int offset) const    { return *(s_char*) addr_at(offset); }
  76   u_char ubyte_at(int offset) const    { return *(u_char*) addr_at(offset); }
  77 
  78   jint int_at(int offset) const        { return *(jint*) addr_at(offset); }
  79   juint uint_at(int offset) const      { return *(juint*) addr_at(offset); }
  80 
  81   address ptr_at(int offset) const     { return *(address*) addr_at(offset); }
  82 
  83   oop  oop_at (int offset) const       { return *(oop*) addr_at(offset); }
  84 
  85 
  86   void set_char_at(int offset, char c)        { *addr_at(offset) = (u_char)c; }
  87   void set_int_at(int offset, jint  i)        { *(jint*)addr_at(offset) = i; }
  88   void set_uint_at(int offset, jint  i)       { *(juint*)addr_at(offset) = i; }
  89   void set_ptr_at (int offset, address  ptr)  { *(address*) addr_at(offset) = ptr; }
  90   void set_oop_at (int offset, oop  o)        { *(oop*) addr_at(offset) = o; }
  91 
  92  public:
  93 
  94   // unit test stuff
  95   static void test() {}                 // override for testing
  96 
  97   inline friend NativeInstruction* nativeInstruction_at(address address);
  98 
  99   static bool is_adrp_at(address instr);
 100   static bool is_ldr_literal_at(address instr);
 101   static bool is_ldrw_to_zr(address instr);
 102 
 103   static bool maybe_cpool_ref(address instr) {
 104     return is_adrp_at(instr) || is_ldr_literal_at(instr);
 105   }
 106 };
 107 
 108 inline NativeInstruction* nativeInstruction_at(address address) {
 109   return (NativeInstruction*)address;


 117 inline NativeCall* nativeCall_at(address address);
 118 // The NativeCall is an abstraction for accessing/manipulating native call imm32/rel32off
 119 // instructions (used to manipulate inline caches, primitive & dll calls, etc.).
 120 
 121 class NativeCall: public NativeInstruction {
 122  public:
 123   enum Aarch64_specific_constants {
 124     instruction_size            =    4,
 125     instruction_offset          =    0,
 126     displacement_offset         =    0,
 127     return_address_offset       =    4
 128   };
 129 
 130   enum { cache_line_size = BytesPerWord };  // conservative estimate!
 131   address instruction_address() const       { return addr_at(instruction_offset); }
 132   address next_instruction_address() const  { return addr_at(return_address_offset); }
 133   int   displacement() const                { return (int_at(displacement_offset) << 6) >> 4; }
 134   address displacement_address() const      { return addr_at(displacement_offset); }
 135   address return_address() const            { return addr_at(return_address_offset); }
 136   address destination() const;
 137 
 138   void  set_destination(address dest)       {
 139     int offset = dest - instruction_address();
 140     unsigned int insn = 0b100101 << 26;
 141     assert((offset & 3) == 0, "should be");
 142     offset >>= 2;
 143     offset &= (1 << 26) - 1; // mask off insn part
 144     insn |= offset;
 145     set_int_at(displacement_offset, insn);

 146   }
 147 













 148   void  verify_alignment()                       { ; }
 149   void  verify();
 150   void  print();
 151 
 152   // Creation
 153   inline friend NativeCall* nativeCall_at(address address);
 154   inline friend NativeCall* nativeCall_before(address return_address);
 155 
 156   static bool is_call_at(address instr) {
 157     const uint32_t insn = (*(uint32_t*)instr);
 158     return (insn >> 26) == 0b100101;
 159   }
 160 
 161   static bool is_call_before(address return_address) {
 162     return is_call_at(return_address - NativeCall::return_address_offset);
 163   }
 164 
 165   // MT-safe patching of a call instruction.
 166   static void insert(address code_pos, address entry);
 167 
 168   static void replace_mt_safe(address instr_addr, address code_buffer);
 169 
 170   // Similar to replace_mt_safe, but just changes the destination.  The
 171   // important thing is that free-running threads are able to execute
 172   // this call instruction at all times.  If the call is an immediate BL
 173   // instruction we can simply rely on atomicity of 32-bit writes to
 174   // make sure other threads will see no intermediate states.
 175 
 176   // We cannot rely on locks here, since the free-running threads must run at
 177   // full speed.
 178   //
 179   // Used in the runtime linkage of calls; see class CompiledIC.
 180   // (Cf. 4506997 and 4479829, where threads witnessed garbage displacements.)
 181 
 182   // The parameter assert_lock disables the assertion during code generation.
 183   void set_destination_mt_safe(address dest, bool assert_lock = true);
 184 
 185   address get_trampoline();
 186 };
 187 
 188 inline NativeCall* nativeCall_at(address address) {
 189   NativeCall* call = (NativeCall*)(address - NativeCall::instruction_offset);
 190 #ifdef ASSERT
 191   call->verify();
 192 #endif
 193   return call;
 194 }
 195 
 196 inline NativeCall* nativeCall_before(address return_address) {
 197   NativeCall* call = (NativeCall*)(return_address - NativeCall::return_address_offset);
 198 #ifdef ASSERT
 199   call->verify();
 200 #endif
 201   return call;
 202 }
 203 
 204 // An interface for accessing/manipulating native mov reg, imm instructions.
 205 // (used to manipulate inlined 64-bit data calls, etc.)


 369   static void test() {}
 370 
 371   // Insertion of native jump instruction
 372   static void insert(address code_pos, address entry);
 373   // MT-safe insertion of native jump at verified method entry
 374   static void check_verified_entry_alignment(address entry, address verified_entry);
 375   static void patch_verified_entry(address entry, address verified_entry, address dest);
 376 };
 377 
 378 inline NativeJump* nativeJump_at(address address) {
 379   NativeJump* jump = (NativeJump*)(address - NativeJump::instruction_offset);
 380 #ifdef ASSERT
 381   jump->verify();
 382 #endif
 383   return jump;
 384 }
 385 
 386 class NativeGeneralJump: public NativeJump {
 387 public:
 388   enum AArch64_specific_constants {
 389     instruction_size            =    4 * 4,
 390     instruction_offset          =    0,
 391     data_offset                 =    0,
 392     next_instruction_offset     =    4 * 4
 393   };
 394   static void insert_unconditional(address code_pos, address entry);
 395   static void replace_mt_safe(address instr_addr, address code_buffer);
 396   static void verify();
 397 };
 398 
 399 inline NativeGeneralJump* nativeGeneralJump_at(address address) {
 400   NativeGeneralJump* jump = (NativeGeneralJump*)(address);
 401   debug_only(jump->verify();)
 402   return jump;
 403 }
 404 
 405 class NativePopReg : public NativeInstruction {
 406  public:
 407   // Insert a pop instruction
 408   static void insert(address code_pos, Register reg);
 409 };
 410 
 411 
 412 class NativeIllegalInstruction: public NativeInstruction {


 439   uint32_t insn = *(uint32_t*)addr_at(0);
 440 
 441   if (Instruction_aarch64::extract(insn, 30, 26) == 0b00101) {
 442     // Unconditional branch (immediate)
 443     return true;
 444   } else if (Instruction_aarch64::extract(insn, 31, 25) == 0b0101010) {
 445     // Conditional branch (immediate)
 446     return true;
 447   } else if (Instruction_aarch64::extract(insn, 30, 25) == 0b011010) {
 448     // Compare & branch (immediate)
 449     return true;
 450   } else if (Instruction_aarch64::extract(insn, 30, 25) == 0b011011) {
 451     // Test & branch (immediate)
 452     return true;
 453   } else
 454     return false;
 455 }
 456 
 457 inline bool NativeInstruction::is_jump_or_nop() {
 458   return is_nop() || is_jump();
 459 }
 460 
 461 // Call trampoline stubs.
 462 class NativeCallTrampolineStub : public NativeInstruction {
 463  public:
 464 
 465   enum AArch64_specific_constants {
 466     instruction_size            =    4 * 4,
 467     instruction_offset          =    0,
 468     data_offset                 =    2 * 4,
 469     next_instruction_offset     =    4 * 4
 470   };
 471 
 472   address destination(nmethod *nm = NULL) const;
 473   void set_destination(address new_destination);
 474   ptrdiff_t destination_offset() const;
 475 };
 476 
 477 inline bool is_NativeCallTrampolineStub_at(address addr) {
 478   // Ensure that the stub is exactly
 479   //      ldr   xscratch1, L
 480   //      br    xscratch1
 481   // L:
 482   uint32_t *i = (uint32_t *)addr;
 483   return i[0] == 0x58000048 && i[1] == 0xd61f0100;
 484 }
 485 
 486 inline NativeCallTrampolineStub* nativeCallTrampolineStub_at(address addr) {
 487   assert(is_NativeCallTrampolineStub_at(addr), "no call trampoline found");
 488   return (NativeCallTrampolineStub*)addr;
 489 }
 490 
 491 #endif // CPU_AARCH64_VM_NATIVEINST_AARCH64_HPP