src/cpu/sparc/vm/vm_version_sparc.cpp

*** 354,363 ****
--- 354,369 ----
  
    if (FLAG_IS_DEFAULT(ContendedPaddingWidth) &&
      (cache_line_size > ContendedPaddingWidth))
      ContendedPaddingWidth = cache_line_size;
  
+   // This machine does not allow unaligned memory accesses
+   if (! FLAG_IS_DEFAULT(UseUnalignedAccesses)) {
+     warning("Unaligned memory access is not available on this CPU");
+     FLAG_SET_DEFAULT(UseUnalignedAccesses, false);
+   }
+ 
  #ifndef PRODUCT
    if (PrintMiscellaneous && Verbose) {
      tty->print_cr("L1 data cache line size: %u", L1_data_cache_line_size());
      tty->print_cr("L2 cache line size: %u", L2_cache_line_size());
      tty->print("Allocation");