--- old/src/cpu/sparc/vm/vm_version_sparc.cpp 2015-03-11 17:09:29.653240659 +0000 +++ new/src/cpu/sparc/vm/vm_version_sparc.cpp 2015-03-11 17:09:29.534244326 +0000 @@ -356,6 +356,12 @@ (cache_line_size > ContendedPaddingWidth)) ContendedPaddingWidth = cache_line_size; + // This machine does not allow unaligned memory accesses + if (! FLAG_IS_DEFAULT(UseUnalignedAccesses)) { + warning("Unaligned memory access is not available on this CPU"); + FLAG_SET_DEFAULT(UseUnalignedAccesses, false); + } + #ifndef PRODUCT if (PrintMiscellaneous && Verbose) { tty->print_cr("L1 data cache line size: %u", L1_data_cache_line_size());